Download Optical Ethernet Design

Slide 1
© 2001 By Default!
Optical Ethernet Design
Receiver Group G1
David Gewertz
Ryan Baldwin
Geoffrey Sizemore
Presented : February 14, 2002
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Slide 2
© 2001 By Default!
Outline

Understanding of previous team
progress
– removal, redesign, debug

Maxim Evalution Kit

Redesign transeiver for Gigabit Ethernet

Testing and verification
– understand chip functionality and future
applications
– replacement, improvement
– BER, compatibility, signal quality
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Slide 3
© 2001 By Default!
Previous Team’s Progress

Design Team Objectives
– Separation of optical transceiver from Intel card
– Redesign and fabrication of new board containing
optical functionality
– Reintegration of board with Intel setup
– Verification to meet optical ethernet specifications
– Use of evaluation kits in further design efforts
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Slide 4
© 2001 By Default!
Pitfalls and Resolutions
Transmission line
noise
Power supply
interference
Different current
requirements for
multiple components
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• Avoided right angles in printed
circuitry
• Length considerations (1/101/4 of a wavelength)
• Differential signaling
• Load balancing (50-Ohm)
• Filtering required to isolate
current sources
• Multiple power supplies
• Decoupling capacitors
Slide 5
© 2001 By Default!
Final Circuit Diagram (Fall 2001)
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Slide 6
© 2001 By Default!
Maxim Evaluation Kits

MAX3266 Evaluation Board Diagram
Photodiode emulation circuit replaced by
photodetector
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Slide 7
© 2001 By Default!
Maxim Evaluation Kits

Circuit Modifications to Minimize Current Loss
– Replacing series resistors and adding a 67-Ohm resistor in
parallel
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Slide 8
© 2001 By Default!
MAX3266 Board Functionality

Photodiode emulation

Transimpedance Amplifier (TIA) on chip
– inexpensively mimic the output of a photodetector
for chip feature testing
–
–
–
–
converts current to voltage
converts single-ended input to differential output
1 mA p-p input = 250 mV p-p output
10 micro-A p-p input = 2.5 mV p-p output
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Slide 9
© 2001 By Default!
Maxim Evaluation Kits

MAX3264 Evaluation Board Diagram
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Slide 10
© 2001 By Default!
MAX3264 Board Functionality

Proper termination impedance and series
capacitors to maintain voltage regularity
 Buffer on chip
– maintains integrity of output from TIA

Limiting Amplifier on chip

RMS Power Detection
– provides 55 dB gain with 1.2 Volt max
– low jitter enables higher speeds
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Slide 11
© 2001 By Default!
Testing and Verification

BERT
– Tektronix GTS 1250 (1250 Mb/s)
– desired BER = 10-12 or 1 error every terabit
• Example - For a 4 MB MP3, that would be one bit error
for every 31,000 songs transferred

Tektronix CSA 7xxx Scope
– accurately measures and records Gb eye
diagrams
– uses specially designed Communications Signal
Analyzer software
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Slide 12
© 2001 By Default!
Design
Single PCB with both chips
 Interface with other design groups (OE,
TX)
 Interference-free implementation of a
single power source to drive all active
components

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Slide 13
© 2001 By Default!
Conclusions
Gb Ethernet technology has been
researched and understood
 Fall 2001 group projects have been
studied for increased understanding and
legacy development
 Maxim data sheets have been analyzed
 Initial research has been completed

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Slide 14
© 2001 By Default!
Conclusions

Next Steps
– Get previous team’s testbed up and
functional
– Connect and test Maxim boards
– Understand development of a receiver
module and implement it using our own
design
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