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ELEC353 S. al Zahir Sign-Magnitude Representation -7 -6 -5 1111 1110 +0 0000 +1 0001 1101 0010 +2 + -4 1100 0011 +3 0 100 = + 4 -3 1011 0100 +4 1 100 = - 4 -2 1010 0101 1001 -1 +5 - 0110 1000 -0 0111 +6 +7 High order bit is sign: 0 = positive (or zero), 1 = negative Low order bits represent the magnitude: 0 (0002) thru 7 (1112) Number range for n bits = ± (2n-1) Two representations for 0 UBC ELEC353 S. al Zahir Sign-Magnitude Representations Addition and Subtraction of Numbers 1- Both operands have same sign: • Result sign bit is the same as the operands' sign 2- Operands have different sign: • Operation is subtraction. • Sign of result depends on sign of number with the larger magnitude R = X-Y if X>Y subtract |Y| from |X|, sign(R) = sign(X). if X<Y subtract |X| from Y|, sign(R) = sign(Y). 4 0100 -4 1100 +3 0011 + (-3) 1011 7 0111 -7 1111 4 0 100 -4 1 100 -3 1 011 +3 0 011 1 0 001 -1 1 001 UBC ELEC353 S. al Zahir Ones Complement Representation Disadvantages of Sign-Magnitude Representation: • Cumbersome addition/subtraction • Must compare magnitudes to determine sign of result Ones Complement Representation: Definitions N is positive number, then N is its negative 1's complement n N = (2 - 1) - N 2 4 = 10000 -1 = 00001 Example: 1's complement of 7 Shortcut method: simply compute bit wise complement 0111 --> 1000 1111 2 4 = -1 in 1's comp. = 10000 -7 = 00111 1000 = -7 in 1's comp. UBC ELEC353 S. al Zahir Ones Complement Representation -0 -1 -2 1111 1110 +0 0000 +1 0001 1101 0010 +2 + -3 1100 0011 +3 0 100 = + 4 -4 1011 0100 +4 1 011 = - 4 -5 1010 0101 1001 -6 +5 - 0110 1000 -7 0111 +6 +7 • Subtraction implemented by addition using 1's complement • Still two representations of 0! This causes some problems • Some complexities in addition UBC ELEC353 S. al Zahir Two Complement Representations N* =2’s comp of N Similar to 1's complement except shifted by one position clockwise -1 -2 -3 1111 1110 N* = 2n - N +0 0000 +1 0001 1101 0010 +2 + -4 1100 0011 +3 0 100 = + 4 -5 1011 0100 +4 1 100 = - 4 -6 1010 0101 1001 -7 +5 - 0110 1000 -8 0111 +6 +7 • Only one representation for 0 • One more negative number than positive number UBC ELEC353 S. al Zahir Two Complement Representations n N* = 2 - N 4 2 = 10000 Example: Twos complement of 7 sub 7 = 0111 1001 = repr. of -7 4 2 = 10000 Example: Twos complement of -7 sub -7 = 1001 0111 = repr. of 7 Shortcut method: Twos complement = bitwise complement + 1 0111 -> 1000 + 1 -> 1001 (representation of -7) 1001 -> 0110 + 1 -> 0111 (representation of 7) UBC ELEC353 S. al Zahir Number Systems Ones Complement Calculations Add carry-out of sign-bit to LSB (assuming no overflow) Method: 1- Add two n-bit numbers starting from LSB 2- If there is an end carry (into position n+1), then remove carry and add a 1 to the LSB (end-around carry). 4 0100 -4 1011 +3 0011 + (-3) 1100 7 0111 -7 10111 End around carry 1 1000 4 0100 -4 1011 -3 1100 +3 0011 1 10000 -1 1110 End around carry 1 0001 UBC ELEC353 S. al Zahir Number Systems Ones Complement Calculations Why does end-around carry work? Its equivalent to subtracting 2n and adding 1 (i.e. performing -2n+1) 4 0100 -3 1100 1 10000 1 Case 1 (M > N): S = M - N = M + N = M + (2n - 1 - N) = (M - N) + 2n - 1 After end-around carry SUM = S -2n+1= (M - N) + 2n - 1 - 2n+ 1 = M - N Case 2 (-M-N, where M + N < 2n-1); -M + (-N) = M + N = (2n - M - 1) + (2n - N - 1) = 2n + [2n - 1 - (M + N)] - 1 after end around carry: = 2n - 1 - (M + N) 0001 -4 1011 + (-3) 1100 -7 10111 1 this is the correct form for representing -(M + N) in 1's complement 1000 UBC ELEC353 S. al Zahir Number Systems Twos Complement Calculations Method (If no overflow): 1- Add two n-bit numbers starting from LSB 2- Discard the carry out of the sign-bit. Overflow condition for 2’s complement: if carry into sign-bit differs from carry out of sign-bit then the results is an overflow 4 0100 -4 1100 +3 0011 + (-3) 1101 7 0111 -7 11001 4 0100 -4 1100 -3 1101 +3 0011 1 10001 -1 1111 Simpler addition scheme makes twos complement the most common choice for integer number systems within digital systems UBC Number Systems ELEC353 S. al Zahir Twos Complement Calculations Discarding End Carry: is equivalent to subtracting 2n Case 1 (-M+N, where N > M): S = -M + N = M* + N = (2n - M) + N = 2n - (N - M) After discarding end carry SUM = S -2n = 2n - (N - M) - 2n = N - M Case 2 (-M + (-N), where M + N < 2n-1): S = -M + (-N) = M* + N* = (2n - M) + (2n - N) = 2n - (M+N) + 2n After discarding end carry SUM = S -2n = 2n - (M+N) + 2n - 2n = 2n - (M+N) = (M+N)* 4 0100 -3 1101 1 10001 -4 1100 + (-3) 1101 -7 11001 UBC ELEC353 S. al Zahir Overflow Conditions (2’s Complement) Overflow occurs when the result of adding two positive (or two negative) n-bit numbers requires more than n bits to be expressed correctly. Overflow indications: Adding two positive numbers results in a negative number Adding two negative numbers results in a positive number -1 -2 -3 -4 -1 +0 1111 1110 0001 1101 0010 1100 -5 0100 1010 0101 1001 -7 0110 1000 -8 0111 +6 +7 5 + 3 = -9 -3 +2 0011 1011 -6 -2 +1 0000 +3 -4 1111 +1 0000 1110 0001 1101 0010 1100 -5 1011 +4 +5 +0 1010 -6 +2 0011 +3 0100 +4 0101 1001 -7 0110 1000 0111 -8 +7 -7 - 2 = +7 UBC +6 +5 ELEC353 S. al Zahir Overflow Examples 5 0111 0101 -7 1000 1001 3 0011 -2 1100 -8 1000 7 10111 Overflow Overflow 5 0000 0101 -3 1111 1101 2 0010 -5 1011 7 0111 -8 11000 No overflow No overflow Simple Check: Overflow occurs when carry into sign-bit does not equal the carry out of the sign-bit. UBC ELEC353 S. al Zahir Logic Circuits for Binary Addition With twos-complement numbers, adders can perform both addition and subtraction. Half Adder Circuit Ai Bi Sum Carry 0 0 0 0 0 1 1 0 1 0 1 0 1 1 0 1 Ai 0 Bi 0 0 1 1 1 1 0 Sum = Ai Bi + Ai Bi Ai 0 Bi 0 0 1 1 0 0 1 Carry = Ai Bi = Ai + Bi Ai Sum Bi Half-adder Schematic Carry UBC ELEC353 S. al Zahir Logic Circuits for Binary Addition Full Adder A3 B3 Cascaded Multi-bit Adder A2 B2 A1 B1 + + S3 C3 A0 B0 + S2 C2 + S1 usually interested in adding more than two bits this motivates the need for the full adder UBC C1 S0