Download Xilinx 7 Series FPGAs Slash Power Consumption by 50% and

Xilinx Artix-7, Kintex-7 and Virtex-7 FPGA Families
Frequently Asked Questions
June 21, 2010
Xilinx 7 Series FPGAs Slash Power Consumption by 50% and
Reach 2 Million Logic Cells on Industry’s First Scalable Architecture
GENERAL
1. What is Xilinx announcing today?
Xilinx is introducing its 7 series FPGAs built on the industry’s lowest power and only unified
FPGA architecture that scales across low-cost and ultra high-end families. The new 28nm
Artix™-7, Kintex™-7, and Virtex®-7 families extend Xilinx’s Targeted Design Platform
strategy by combining breakthrough innovations in power efficiency, performance/capacity,
and price/performance with unprecedented levels of scalability and productivity to make
programmable logic more accessible to a broader community of users, end markets and
applications.
2. How do the 28nm FPGA families differ from the current generation Virtex-6 and
Spartan-6 FPGA families?
The 7 series FPGA families all share a unified architecture implemented on 28nm process
technology optimized for low power with high performance. This unique combination
delivers 50% total power reduction and enables a 2X price/performance improvement, 2X
increase in system performance and the world’s first 2 million-logic-cell FPGA (providing
2.5X higher capacity compared to previous generations). As a result, designers can now
easily scale their applications for system performance, capacity, or cost within and across the
28nm families while staying within power budgets.
3. When will Xilinx 7 series FPGAs be available in software?
Early access ISE® Design Suite software supporting the new FPGA families has been
shipped to a limited number of early adopter customers and partners.
4. When will the new 28nm devices begin shipping?
First shipments will begin in Q1 CY2011.
5. Will the EasyPath program be available for the 7 series?
Yes. EasyPath™ options will be available with the production release of Virtex-7 FPGAs for
a guaranteed 35% cost reduction with no incremental conversion or engineering investment.
6. How do the new FPGAs compare with competitive 28nm FPGA offerings?
Xilinx offers the most complete programmable product portfolio with the industry’s lowest
Xilinx 7 Series FPGAs – Frequently Asked Questions
power-consumption, higher-usable performance and highest-capacity. The choice of a high-k
metal gate (HKMG), high-performance, low-power process optimized for lower-static power
means that Xilinx’s 28nm devices consume 50% less static power and 30% lower total power
compared to FPGAs built on the alternative 28nm high-performance process. The 7 series
FPGAs are also the only FPGAs built on a unified architecture. Competing FPGAs cannot
match the lower power, price-performance, and scalability advantages provided by Xilinx’s
unified 28nm families.
7. Why was a high performance, low power 28nm process chosen for the new families?
As we worked with customers to define the next generation 7 series FPGA family it became
clear that power consumption was a universal requirement that was impacting the usage of
FPGAs in many markets. Also, at the 28nm process node, static power consumption was
approaching a crossover point with dynamic power consumption and was contributing
equally to total power consumption. The 28nm HKMG (high-k metal gate) High
Performance, Low Power (HPL) process was chosen for the ability to effectively manage
static power and at the same time deliver the performance required by the next generation of
FPGAs.
8. What are the key factors behind lower dynamic power?
Reducing dynamic power consumption is the combination of a number of architectural and
technical decisions including the choice of transistors and the use of low-k dielectric
substrate. Intelligent clock gating and fifth generation partial reconfiguration techniques
introduced with ISE Design Suite 12 enable designers to realize additional dynamic power
savings. Initial results demonstrate:
 25~30% lower dynamic power consumption vs. 40nm/45nm low-power offerings
 30% lower I/O dynamic power consumption vs. 40nm/45nm low-power offerings
 Additional 20% dynamic power reduction with intelligent clock gating and partial
reconfiguration
For more information on 28nm power-reducing technologies, visit: 28nm Technology
Overview White Paper.
9. Virtex and Spartan products have always been on different processes. How can Xilinx
service both markets with a single process?
Xilinx’s 28nm high performance, low power process provides the capabilities needed for the
markets served by both Spartan and Virtex FPGAs. However, process is only one aspect of
the overall performance/power trade-off. The differentiation in power and performance is
enabled by the various architectural innovations and choice of transistors for each sub-family.
Xilinx further maximizes the value of its 28nm process with a common scalable architecture
across product families and enhanced software tools to deliver ASIC-class capabilities to
meet cost and power budgets with greater productivity through design migration and IP reuse.
10. What is meant by ‘unified architecture’?
All 7 series devices are designed with the same architectural building blocks (logic fabric,
Block RAM, clocking technology, DSP slices, SelectIO™ technology) that are combined in
differing proportions to create the three new FPGA families optimized from the lowest to the
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Xilinx 7 Series FPGAs – Frequently Asked Questions
highest device density and capability for a diverse range of end-product requirements. This
fourth generation implementation of Xilinx’s Application Specific Modular Block
(ASMBL™) architecture with its unique columnar technology (first introduced in the Virtex4 FPGA family) enables designers to most effectively utilize the full range of logic density
(from 20,000 to 2 million logic cells) and deploy the right combination of resources for their
applications.
11. What are the customer benefits of the unified architecture?
The unified architecture provides scalability and increases productivity by enabling
customers and partners to leverage IP and design investments across multiple devices and
families. It simplifies portability across the three new FPGA families by minimizing the need
to re-code, re-simulate, and fix bugs when retargeting an existing design or IP block to a
smaller or larger device.
12. Why is there a focus on power with the new architecture?
Power is the key limiting factor to opening programmable logic to new applications and
markets serviced by ASICs and ASSPs. Xilinx focused on lowering overall power
consumption with its 28nm architecture to provide not only lower overall power consumption,
but also more usable performance for high-end systems. By lowering power, Xilinx can
deliver FPGA families supporting 2.37TMACs in DSP performance, increase capacity up to
2 million logic cells that run at up to 600MHz, and 1.9Tbps high-speed connectivity.
With FPGAs that offer 50% lower total power compared to the same design implemented in
the previous generation Xilinx FPGAs and 30% lower power than competitive 28nm FPGAs,
designers need not make trade-offs between performance and power.
13. Why is Xilinx moving to multiple families instead of just the Virtex and Spartan
families?
By moving to multiple families with a common architecture for low cost to ultra high-end
FPGAs, Xilinx is able expand the reach of programmable technology to an increasingly
diverse community of designers and more rapidly deliver design platforms targeted for new
applications and new markets. Xilinx customers can easily scale FPGA-based applications up
or down to reduce cost and power or increase performance and capacity in order to
implement programmable solutions in a range of systems that had been previously possible
only with ASSPs or ASICs. In addition, Xilinx customers and partners alike can reduce
development and deployment costs by leveraging their design/IP investments across Xilinx’s
entire 28nm offering.
14. How do the 7 series FPGA families support Xilinx’s Targeted Design Platform
strategy?
The 28nm FPGA families provide the silicon foundation for the next-generation of Xilinx’s
Targeted Design Platforms aimed at further accelerating innovation and reducing the costs of
developing systems that meet the insatiable demand for lower power, more bandwidth, and
higher performance. Xilinx Targeted Design Platforms combine FPGA device technology
with an enhanced design environment that increases efficiency and productivity, open
standard AMBA4/AXI4-interconnect ready IP for plug-and-play design, scalable
development kits and boards for out-of-the box implementation, and an evolving suite of
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Xilinx 7 Series FPGAs – Frequently Asked Questions
market-specific targeted reference designs. For more information about Xilinx Targeted
Design Platforms, visit:
http://www.xilinx.com/publications/prod_mktg/Targeted_Design_Platform_Product_Brochure.pdf
15. Will Xilinx continue development of Spartan-6 and Virtex-6 FPGA families?
Xilinx will continue to manufacture and support Spartan-6 and Virtex-6 FPGA products
which are now entering production.
16. Can designs be ported from previous generations to the new FPGA families?
Yes. Not only does the unified architecture enable design portability between the Artix-7,
Kintex-7 and Virtex-7 families, it also greatly simplifies the porting of existing designs from
previous generation Virtex-6 and Spartan-6 FPGAs. Because FPGA elements of the unified
28nm architecture are derived from the Virtex-6 family, designers can also start new designs
in Virtex-6 and Spartan-6 FPGA and port those designs with confidence to 28nm FPGAs.
NEW FPGA FAMILIES
17. What are the key capabilities and features of the new Artix-7 FPGA family?
The Artix-7 family provides the industry’s lowest power, lowest cost FPGAs with small
form-factor packaging and Virtex-based architectural improvements that address the
requirements of high-volume, footprint-size sensitive markets previously served by Spartan
series FPGAs. With logic densities ranging from 20K to 355K, Artix-7 devices are 30%
faster and consume 50% lower power with 50% smaller footprint and 35% lower price point
than Spartan-6 FPGAs.
18. What types of applications and end markets does the Artix-7 FPGA family address?
The Artix-7 FPGA family targets a variety of cost, size and power-sensitive applications,
including portable ultrasound medical equipment, military communications systems, DSLR
lens modules for high-end professional/consumer cameras, and avionics video distribution
systems.
19. What are the key capabilities and features of the new Kintex-7 FPGA family?
The Kintex-7 family introduces a new class of FPGA with a balanced offering of high-end
capabilities that delivers Virtex-6 FPGA performance at less than half the price for 2X
improvement in price-performance and 50% lower power. These highly optimized devices
are designed for cost-effective signal processing with logic densities ranging from 30K to
400K, abundant DSP slices, internal memory, and 10Gbps serial transceivers at an attractive
price point for mid-density applications previously served by Virtex-6 FPGAs.
20. What types of applications and end markets does the Kintex-7 FPGA family address?
The Kintex-7 FPGA family provides the signal processing performance, power consumption,
and cost that is ideally suited for implementing Long Term Evolution (LTE) wireless radio
and baseband subsystems. Support for advanced partial reconfiguration capabilities enable
developers to further lower power and cost for wide deployment in femto, pico, and
mainstream base stations. Kintex-7 FPGAs provide the connectivity, memory, and logic
performance at price-performance points targeted for high-volume wired communications
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Xilinx 7 Series FPGAs – Frequently Asked Questions
equipment, such as 10G Passive Optical Network (PON) Optical Line Terminal (OLT) line
cards that bring high-speed networking to the neighborhood/home. The new devices also
meet the aggressive power and cost requirements of high definition 3D flat panel displays,
and deliver the performance and bandwidth needed for next-generation broadcast video-ondemand systems.
21. Why did Xilinx create an ultra high-end class of FPGA with the Virtex-7 family?
The choice of a 28nm process technology with a focus on lowering static power, combined
with architectural innovations and advanced tools that lower dynamic power, enabled Xilinx
to offer ultra high-end programmable devices that offer twice the capacity and consume 50%
less power than what is currently available today. The new Virtex-7 devices push the limits
of FPGA technologies in terms of the number and performance of embedded transceivers,
DSP slices, memory blocks, and high-speed I/O. Devices with 28Gbps transceivers will also
be introduced.
22. What are the key capabilities and features of the new Virtex-7 FPGA family?
The Virtex-7 FPGA family is optimized for communications systems requiring the highest
performance and highest bandwidth serial connectivity. Virtex-7 FPGAs take the industry’s
most successful FPGA architecture to new levels by delivering a 2X system improvement at
50% lower power than Virtex-6 FPGAs. The Virtex-7 family sets new industry benchmarks
with 1.8x boost in high-bandwidth DSP processing with up to 3,960 DSP slices, 1.5x
increase in I/O bandwidth enabled by up to 80 embedded transceivers (the highest transceiver
count in a single FPGA), 2X greater memory bandwidth with 2,133Mbps memory interfacing
performance, and up to 2 million logic cells for 2.5x more logic capacity than any previous or
existing FPGA.
23. What types of applications and end markets does the Virtex-7 FPGA family address?
Virtex-7 FPGAs are aimed at the requirements of the highest performance wireless, wired,
and broadcast infrastructure applications. The TeraMACC signal processing capabilities of
Virtex-7 FPGAs enable 400G bridging and switch fabric wired communications, advanced
radar, and high-performance computing systems. Product developers can replace ASICs and
multi-chipset ASSP solutions with single-FPGA implementations of 100GE line cards, 300G
Interlaken Bridges, 100G OTN muxponders, and 400G optical network cards. In addition,
these ultra high-end devices provide the logic density, performance, and I/O bandwidth
needed to build next-generation test and measurement equipment. Virtex-7 FPGAs also
enable ASIC designers to use fewer devices during prototyping and emulation to lower cost
and reduce interconnect/design complexity.
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