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Synchronization Strategies in Cascaded H-Bridge
Multi Level Inverters for Carrier Based Sinusoidal
PWM Techniques
Abstract:
This paper proposes synchronization strategies for cascaded H-Bridge multi level
inverter (CHBMLI) topologies with carrier based sinusoidal pulse width
modulation (PWM) techniques. It is presented how synchronous carriers are
generated in desired phase and frequency from the instantaneous voltage
references to maintain 3-Ф, half wave and quarter wave symmetries among
inverter pole voltage outputs for carrier based sinusoidal PWM of CHBMLI. To
achieve dynamic synchronization, the triangular carriers are generated from the
instantaneous voltage references in a phase locked manner. The scheme is
experimentally tested with phase shifted PWM technique for both open loop Vbyf
and closed loop vector control of squirrel cage induction motor drive supplied from
a 3-Ф 5 level CHBMLI and the results are presented.
Existing system:
 In high power and medium voltage applications, the power converters are
operated at low switching frequency. This is very well defined in the
literature as low pulse ratio operation of the converters.
 The applications consist of traction drives (both VSI and CSI fed drives),
grid applications (as bidirectional converters, active power filters) etc. As
the pulse ratio is less in these power converters, lower order harmonics
including sub-harmonics are introduced in line currents resulting in higher
total harmonic distortion (THD).
 Hence, synchronization among PWM voltages is necessary. Along with
synchronization, the PWM voltage should maintain half wave, quarter wave
and 3-Ф symmetries.
Proposed system:
This paper experimentally verifies the validity of the proposed PSPWM technique
for both open loop Vbyf and closed loop vector control of a squirrel cage
induction motor drive supplied from a 3-Ф 5 level CHBMLI.
Circuit diagram:
Reference:
[1] G. Narayanan and V.T. Ranganathan, “Two novel synchronized busclamping
PWM strategies based on space vector approach for high
power drives,” IEEE Trans. Power.Electron., vol.17, no.1, pp.84-93,Jan2002.
[2] Guiseppe S. Buja and Goivanni B. Indri, “Optimal Pulsewidth
Modulation for Feeding AC Motors”, IEEE Trans.Ind.Appl.,vol.IA13,no.1,pp.38-44,Jan./Feb.1977.
[3] A.Edpuganti and A.K.Rathore, “Optimal Low-Switching Frequency
Pulsewidth Modulation of Medium Voltage Seven-Level Cascade-5/3H
Inverter,” IEEE Trans.Power.Electron ,vol.30, no.1, pp.496-503,
Jan.2015.
[4] A.K.Rathore, J.Holtz and T.Boller, “Synchronous Optimal Pulsewidth
Modulation for Low-Switching-Frequency Control of Medium-Voltage
Multilevel Inverters,” IEEE Transactions on Industrial Electronics,,
vol.57, no.7, pp.2374-2381, July 2010.