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Multiple-Choice
(Some of the following questions have more than one correct answer. Circle all correct answers.)
1. A program that combines object files into an executable program is called a _________.
a. compiler
b. loader
c. linker
d. assembler
2. A computer directly executes programs written in its _______ language.
a. system
b. native
c. interpreted
d. machine
3. Is the expression X  (Y  Z) equivalent to (X  Y)  (X  Z) for all possible inputs of
X, Y, and Z?
a. yes
b. no
4. The following C++ expression can be written using only two lines of assembly language
code:
X = (Y + 4) * 3;
a. true
b. false
5. A single hexadecimal digit can be used to represent 5 binary bits.
a. true
b. false
6. The most significant bit in a binary byte is numbered bit 7.
a. true
b. false
7. A quadword is 8 bytes.
a. true
b. false
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8. A word (on Intel systems) is 16 bits.
a. true
b. false
9. A doubleword is 64 bits.
a. true
b. false
10. A signed integer stores the sign in the least significant bit (LSB).
a. true
b. false
11. If an integer's sign bit is 1, the integer is negative.
a. true
b. false
12. A signed byte can be equal to +128.
a. true
b. false
13. The expression X  Y is only true when X and Y are both true.
a. true
b. false
14. The expression (X  Y) is true when X and Y are both false.
a. true
b. false
15. The three most basic operators in Boolean algebra are AND, OR, and NOT.
a. true
b. false
16. The integer range of standard ASCII codes is:
b. 0 to 127
c. 0 to 270
d. 0 to 65,535
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17. How many bits are used by Unicode characters?
a. 7
b. 8
c. 16
d. 24
18. Which type of program must usually run on multiple platforms?
a. device driver
b. business application
c. embedded system
d. assembler
19. Which of the following best describes the relationship between assembly language and
machine language?
a. one to many
b. one to one
c. many to one
d. many to many
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20. A program is considered portable if it . . .
a. can be rewritten in a different programming language without losing its meaning.
b. can be quickly copied from conventional RAM into high-speed RAM.
c. can be executed on multiple platforms.
d. none of the above
21. A device driver would ordinarily be written in . . .
a. machine language
b. assembly language
c. a platform-independent language, such as Java
d. an application-oriented language
22. Which of the following are embedded systems applications?
a. an accounting program
b. a javascript program running on a Web page
c. a Nintendo® video game
d. a phone book searching program in a cellular phone
23. Suppose a program written in language L1 must be executed on a machine running a
program running in language L0. What important operation must take place?
a. translation of the entire L1 program into L0 code
b. translation of the L0 program into L1 code
c. creation of a language L3 that interprets L0 instructions
d. interpretation of each L1 statement using L0 code as the L1 program is running
24. Conventional machine language instructions are executed by which virtual machine
level?
a. microarchitecture level
b. ISA level
c. assembly language level
d. operating system level
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25. Which language (or virtual machine) uses short mnemonics such as ADD and SUB to
identify instructions?
a. conventional machine language
b. ISA-level language
c. assembly language
d. microcode interpreter
26. What is the largest unsigned integer that may be stored in 16 bits?
a. 32767
b. 65536
c. 65535
d. 32768
27. What is the largest signed integer that may be stored in 32 bits?
a. 232
b. 232
c. 231
d. 231
28. The two's complement of an integer is formed by doing which of the following?
a. reversing (inverting) the bits and adding 1
b. adding 1 and reversing the bits
c. calculating the integer's additive inverse
d. changing the highest bit to a 1
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Fill in the Blanks and Short Answer
1. The technique of executing instructions in parallel is called ________.
2. Which unit in the IA-32 instruction cycle performs page protection checks?
3. Which component of an operating system is responsible for switching control between
tasks?
4. Identify three types of segments that would be referenced by segment registers.
5. Name two RISC-like features incorporated by Intel into the IA-32 family.
6. List at least five types of ports found on a typical PC motherboard.
7. Why are serial ports typically slower than parallel ports?
Multiple-Choice
8. What is the name of the lowest 8 bits of the EDX register?
a. DL
b. DH
c. DX
d. none of the above
9. How much memory can be addressed in Real-address mode?
a. 640 K
b. 1 MB
c. 16 MB
d. 4 GB
10. How much memory can be addressed in Protected mode?
a. 640 K
b. 1 MB
c. 16 MB
d. 4 GB
11. Which of the following linear addresses matches the segment-offset address 08F0:0200?
a. 09100h
b. 09200h
c. 0AF0h
d. 08F2h
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12. If you wanted to turn a device on and off using computer software, which type of port
interface would be best?
a. USB
b. keyboard
c. serial
d. parallel
13. What is the name of the bus architecture commonly used with Pentium processors?
a. ISA
b. PCI
c. EISA
d. RAM-BUS
14. Segment-offset addressing is used in which processor mode(s)?
a. Protected
b. Virtual-8086
c. Real-address
d. System management
15. How is Virtual-8086 mode similar to Real-address mode?
a. permits the use of virtual memory (paging)
b. uses a segment descriptor table to track memory usage
c. uses only 16-bit registers for input-output
d. simulates 8086-based computer running in Real-address mode
16. High-speed memory that reduces the frequency of access by the CPU to conventional
memory is called
a. local memory
b. cache memory
c. system memory
d. virtual memory
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17. Why are device drivers needed, given that BIOS programs can do the same task?
a. device drivers allow for the introduction of new devices
b. device drivers have faster performance than BIOS programs
c. BIOS programs are only used by the operating system in Real-address mode
d. device drivers have more direct access to hardware than BIOS programs
18. An interpreter program inside the CPU is written in a language called a(n) _______.
a. machine language interpreter
b. digital driver program
c. microprogram
d. system decoder
19. In regard to multitasking, a task's state consists of which three elements?
a. status flags, program counter, register contents
b. register contents, task variables, program counter
c. task variables, segment descriptor, register contents
d. segment descriptor, status flags, task variables
20. Within the CPU, all calculations and logic operations take place inside the ___________ .
a. registers
b. ALU
c. CU
d. MBU
21. The three types of buses connected to the CPU are:
a. data, address, control
b. data, system, address
c. address, control, memory
d. fetch-decode, control, execution
22. During which phase of the instruction execution cycle is the program counter
incremented?
a. decode
b. execute
c. operand fetch
d. fetch
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23. The four parts of a CPU are:
a. data bus, memory unit, control unit, arithmetic logic unit
b. address bus, registers, control unit, arithmetic logic unit
c. clock, memory unit, control unit, instruction fetch unit
d. clock, registers, control unit, arithmetic logic unit
24. What is the name of the time delay in a CPU caused by differences between the speed of
the CPU, the system bus, and memory circuits?
a. wait cycle
b. wait state
c. dead cycle
d. memory write cycle
25. List the three primary steps of the instruction execution cycle, in sequential order:
a. fetch, decode, memory write
b. fetch, memory read, execute
c. decode, fetch, execute
d. fetch, decode, execute
26. Which stage in the IA-32 instruction cycle is responsible for translating logical addresses
to linear addresses and performing protection checks?
a segment unit
b. code prefetch unit
c. execution unit
d. paging unit
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27. What are the six stages, or units involved in executing a single IA-32 instruction?
a. code prefetch, instruction decode, execution, segment, paging, memory store
b. bus interface, instruction decode, parallel analysis, execution, segment, paging
c. bus interface, code prefetch, instruction decode, execution, segment, paging
d. bus interface, code prefetch, instruction decode, execution, address translation, paging
28. Which flag is set when an unsigned value is too large to fit into a destination operand?
a. Sign
b. Carry
c. Overflow
d. Auxiliary Carry
29. In a 4-stage non-pipelined processor, how many clock cycles are required to execute 3
instructions? (Assume that each stage executes in a single clock cycle.)
a. 12
b. 8
c. 6
d. cannot be determined
30. In a 4-stage single-pipelined processor, how many clock cycles are required to execute 3
instructions? (Assume that each stage executes in a single clock cycle.)
a. 12
b. 8
c. 6
d. cannot be determined
31. In a 6-stage dual-pipelined processor, how many clock cycles are required to execute 5
instructions? (Assume that stage 4 requires two clock cycles, and that stage 4 has two
pipelines.)
a. 10
b. 11
c. 12
d. 15
32. Which of the following correctly describes the sequence of reading from memory during
a single clock cycle?
a.
Read line set low; Address placed on bus; Operand placed on data bus by memory
controller; Read line set high, indicating that data bus contains the requested data.
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b.
Address placed on bus; Operand placed on data bus by memory controller; Read
line set low; Read line set high, indicating that data bus contains the requested
data.
c.
Address placed on bus; Read line set low; Read line set high, indicating that data
bus contains the requested data; Operand placed on data bus by memory
controller.
d.
Address placed on bus; Read line set low; Operand placed on data bus by memory
controller; Read line set high, indicating that data bus contains the requested data.
33. Which register is known as a loop counter?
a. EAX
b. EBX
c. ECX
d. EDX
34. Which mode is the native state of the Intel processor?
a. Protected mode
b. Virtual-8086 mode
c. Real-address mode
d. System management mode
35. Real-address mode combines which two values to form addresses?
a. page, segment
b. segment, offset
c. descriptor, segment
d. offset, descriptor
36. When the CPU tries to execute part of a program that has been swapped out to disk, it
executes a
a. descriptor table load
b. general protection fault
c. page fault
d. page translation
37. Which type of RAM is typically used for cache memory?
a. static RAM
b. dynamic RAM
c. CMOS RAM
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d. Video RAM
(Some of the following questions have more than one correct answer. Circle all correct answers.)
38. Which of the following describe(s) RISC processors?
a. short, simple instructions, executed quickly
b. complex high-level instructions
c. requires microcode interpreter
d. instructions are executed directly by hardware
39. Which of the following is(are) advantages of USB ports over parallel ports?
a. bidirectional data transfer
b. query devices to get name and type of device
c. permits a hub to be connected
d. can suspend power to devices
40. Which type of output is the most general and portable to different computer systems?
a. writing directly to video memory
b. using C++ stream output statements
c. calling operating system functions
d. calling BIOS functions
41. Which type of output will execute the most quickly?
a. writing directly to video memory
b. using C++ stream output statements
c. calling operating system functions
d. calling BIOS functions
Multiple-Choice
1. Which directive identifies the part of a program containing instructions?
a. .DATA
b. .CODE
c. .STACK
d. .PROG
2. Which directive(s) are used when defining both signed and unsigned 64-bit integers?
a. QWORD and SQWORD
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b. DWORD
c. QWORD
d. DWORD and SDWORD
3. Which of the following are valid data definition statements that create an array of
unsigned bytes containing decimal 10, 20, and 30, named myArray.
a. myArray BYTE 10, 20, 30
b. BYTE myArray 10, 20, 30
c. BYTE myArray[3]: 10, 20,30
d. myArray BYTE DUP (3) 10,20,30
4. In the following data definition, assume that List2 begins at offset 2000h. What is the
offset of the third value (5)?
List2 WORD 3,4,5,6,7
a. 20008h
b. 2002h
c. 2000h
d. 2004h
5. Which letter choice shows the memory byte order, from low to high address, of the
following data definition?
BigVal DWORD 12345678h
a. 56h, 78h,12h,34h
b. 12h,34h,56h,78h
c. 78h,56h,34h,12h
d. 34h,12h,78h,56h
6.
T
a. True
b. False
7. The following is a valid data definition statement:
str1 \
BYTE "This string is quite long!",0
a. True
b. False
8. The following are both valid data definition statements:
List1 BYTE 10,20
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BYTE 30,40
a. True
b. False
(Some of the following questions have more than one correct answer. Circle all correct
answers.)
9. Which of the following are true about assembly language instructions and directives?
a. a directive is executed at runtime
b. an instruction is executed at runtime
c. a directive is executed at assembly time
d. an instruction is executed at assembly time
10. The basic parts of an instruction, in order from left to right, are:
a. label, mnemonic, operand(s), comment
b. comment, label, mnemonic, operand(s)
c. label, mnemonic, comment
d. mnemonic, operand(s), comment
11. Operands may be any of the following:
a. constant or constant expression
b. reserved word
c. register name
d. variable name (memory)
12. Which of the following will generate assembly errors?
a. var1 BYTE 1101b, 22, 35
b. var2 BYTE "ABCDE",18
c. var3 BYTE '$','98778',
d. var4 BYTE 256,19,40
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Fill in the Blanks and Short Answer
Use the following data definitions until notified otherwise:
byte1 BYTE 0FFh,1,2
byte2 BYTE 14h
word1 WORD 0FFFFh,1,2
word2 WORD 3
word3 SWORD 7FFFh,8000h
word4 SWORD 9000h
dword1 DWORD 10h,20h,30h,40h
dArray DWORD 10 DUP(?)
13. Write one or more statements that move the contents of word1 to word2.
14. For each of the following instructions, indicate whether it is legal (L) or illegal (I):
a. mov byte2,0FFh
b. mov word1,byte2
c. mov word2,10000h
d. mov si,word1
15. Indicate the hexadecimal value of the destination operand next to each instruction. Use
the letter I to indicate that a particular instruction is illegal:
mov dx,word3
movsx eax,byte1
mov dh,al
mov bx,dx
a.
b.
c.
d.
16. Write an instruction that moves the 32-bit address of word1 into the ESI register (assume
32-bit Protected mode).
17. Write an instruction that moves the lower 16 bits of dword1 into the BX register (hint:
use PTR).
18. Write an instruction that moves the lower 8 bits of word2 into the AL register.
19. Write an instruction that moves EBX to location word1:
20. What is the value of the expression (TYPE word1)?
21. What is the value of the expression (TYPE dword1)?
22. What is the value of the expression (LENGTHOF word1)?
23. What is the value of the expression (SIZEOF word1)?
Short Programming Problems
Use the following data definitions until notified otherwise:
byte1 BYTE 0FFh,1,2
byte2 BYTE 14h
word1 WORD 0FFFFh,1,2
word2 WORD 3
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word3 SWORD 7FFFh,8000h
word4 SWORD 9000h
dword1 DWORD 10h,20h,30h,40h
dArray DWORD 10 DUP(?)
24. Implement the following expression in assembly language, using 32-bit integers (you
may modify any registers you wish):
eax = dword1 + ebx - ecx
25. Implement the following expression in assembly language, using 32-bit integers (you
may modify any registers you wish):
eax = -dword1 + (edx - ecx) + 1
Multiple-Choice
26. The MOV instruction does not permit an immediate value to be moved to a segment
register.
a. true
b. false
27. The MOVSX instruction sign-extends an integer into a larger operand.
a. true
b. false
28. Select the answer choice that best implements the following expression. Do not permit
dword1, ECX, or EDX to be modified:
eax = -dword1 + (edx - ecx) + 1
a.
mov eax,dword1
neg eax
sub edx,ecx
add eax,edx
inc eax
b.
mov eax,dword1
neg eax
mov ebx,edx
sub ebx,ecx
add eax,ebx
inc eax
c.
neg dword1
mov ebx,edx
sub ebx,ecx
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add eax,ebx
inc eax
d.
mov eax,dword1
mov edx,ebx
sub ebx,ecx
add eax,ebx
inc eax
Some of the following questions have more than one correct answer. Circle all correct
answers:
Use the following data definitions until notified otherwise:
byte1 BYTE 0FFh,1,2
byte2 BYTE 14h
word1 WORD 0FFFFh,1,2
word2 WORD 3
word3 SWORD 7FFFh,8000h
word4 SWORD 9000h
dword1 DWORD 10h,20h,30h,40h
dArray DWORD 10 DUP(?)
29. What is the hexadecimal value of AX when this code executes?
mov esi,OFFSET word1
add esi,4
mov ax,[esi]
a. 1
b. 2
c. FFFFh
d. 3
30. What is the final hexadecimal value of AX when this code executes?
mov ebx,OFFSET dword1
sub ebx,2
mov ax,[ebx]
a. 0000h
b. 0010h
c. 9000h
d. 0020h
31. What is the final hexadecimal value of AL when this code executes?
mov ebx,OFFSET byte1
mov al,[ebx+3]
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a. 1
b. 2
c. 14h
d. 3
32. What is the final hexadecimal value of EAX when this code executes?
mov edx,8
mov eax,dword1[edx]
a. 00000010h
b. 20000000h
c. 00300000h
d. 00000030h
33. In Protected mode, which of the following define(s) a pointer variable containing the
offset of word1?
a. ptr1 DWORD word1
b. word1 DWORD ptr1
c. ptr2 DWORD PTR word1
d. ptr2 DWORD OFFSET word1
Use the following data for the remaining questions in this section:
word1 WORD 1000h,2000h,3000h,4000h,5000h
dword1 DWORD 10000h,20000h,30000h,40000h
34. What is the final value of AX after this code has executed?
mov esi,OFFSET word1
mov ecx,5
mov eax,100h
L1: add ax,[esi]
add ax,16
add esi,TYPE word1
Loop L1
a. F150h
b. 0150h
c. F016h
d. 0016h
35. What is the final value of AX after this code has executed?
mov edx,OFFSET word1+8
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mov ecx,2
mov ax,0
L1: mov ax,[edx]
add ax,20h
sub edx,4
Loop L1
a. 8040h
b. 9040h
c. 4020h
d. 3020h
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