Download 1. Voltage Divider Bias

Sitarambhai Naranjibhai Patel Institute
of Technology and Research Centre.
Prepared By:
Student’s name:
PEN Number:
Patel Pratik
140490111006
Sharma Rohit
140490111009
Branch:
Electronics and Communication.
Semester: 3
SUBJECT:
ELECTRONIC DEVICES AND CIRCUITS.
TOPIC:
TRANSISTOR BIASING.
Contents To Be Covered:
1)VOLTAGE DIVIDER BIASING.
2)ACCURATE VOLTAGE DIVIDE BIAS.
3)VDB LOAD LINE.
4)VDB Q-POINT.
5)OTHER TYPES OF BIASING.
1. Voltage Divider Bias:
+VCC
I1
R1
IC
RC
IB
Output
Input
I2
R2
IE
RE
Figure 1.1: Voltage divider Biasing.
Assume that I2 > 10IB.
R2
VB 
VCC
R1  R2
VE  VB  0.7V
IE 
VE
RE
Assume that ICQ @ IE (or hFE >> 1). Then
VCEQ  VCC  ICQ  RC  RE 
2.1 Accurate Voltage-Divider Bias:
For this circuit we will not take the
input resistance into consideration.
Essentially we are determining the
voltage across R2(VB) by the
proportional method.
 R 2 ||  DC RE 
VB  
 VCC
 R1  ( R2 ||  DC RE ) 
VB = (R2/R1 + R2)VCC
Figure 2.1: Accurate VDB
We now take the known base
voltage and subtract VBE to find out
what is dropped across RE.
Knowing the voltage across RE we
can apply Ohm’s law to determine
the current in the collector-emitter
side of the circuit.
Remember the current in the baseemitter circuit is much smaller, so
much in fact we can for all
practical purposes we say that IE
approximately equals IC.
IE ≈ IC
2.2 Analysis of Voltage-Divider Bias
Circuit.
Figure2.2: Analysis of VDB Circuits.
2.2 Analysis of voltage divider bias
circuit:
Total
resistance from base to ground is:
R2 R IN ( base)
R2  DC R E
A voltage divider
is formed by R1 and resistance from
base to ground in parallel with R2.
 R2  DC R E
VB  
 R1  R  DC R E
2

If DC RE

VCC


>>R2, (at least ten times greater), then the
formula simplifies to
 R2 
VB  
VCC
 R1  R 2 
Determine
emitter voltage VE.
VE=VB – VBE
Using Ohm’s Law, find emitter current IE.
IE = VE / RE
All the other circuit values,
IC ≈ I E
VC = VCC – ICRC
To
find VCE, apply KVL:
VCC – ICRC – IERE – VCE =0.
Since IC
≈ IE,
VCE ≈ VCC – IC (RC + RE)
3.1 VDB Load Line :
IC(sat) = VCC/(RC+RE)
DC Load Line
IC
(mA)
VCE(off) = VCC
VCE
Figure3.1: VDB Load Line.
VCC - ICRC - VCE - IERE  0
for IC >>I E
-1
VCC
IC 
VCE 
RC  RE
RC  RE
Point-slope form of straight line equation:
y=mx+c
4. VDB Q-point:

DC load line significance is that regardless of
the behavior of the transistor, the collector
current IC and the collector-emitter voltage VCE
must always lie on the load line, depends ONLY
on the VCC, RC and RE .
Figure4: VDB Q-point.
The
dc load line is a graph that represents all the possible
combinations of IC and VCE for a given amplifier.

For every possible value of IC, and amplifier will have a
corresponding value of VCE.
It
must be true at the same time as the transistor
characteristic.

Solve two condition using simultaneous equation ,
graphically as Q-point.
5.1 Other Transistor Biasing Circuits:
1) Emitter-bias circuits.
2) Feedback-bias circuits:
Feedback Circuits can be classified as:
-Collector-feedback bias.
-Emitter-feedback bias.
+VCC
5.2 Emitter bias:
IC
Assume that the transistor
operation is in active region.
VEE  0.7V
IB 
RB   hFE  1 RE
I C  hFE I B
RC
IB
Q1
Input
RB
RE
IE
I E   hFE  1 I B
VCE  VCC  IC RC  I E RE  VEE
-VEE
Figure 5.2: Emitter Bias
Output
5.3 Collector-feedback bias:
+VCC
VCC   IC  I B  RC  I B RB  VBE
I CQ  hFE I B
VCC  VBE
IB 
(hFE  1) RC  RB
VCEQ  VCC   hFE  1 I B RC
RC
RB
IB
IC
IE
 VCC  I CQ RC
Figure5.3: Collector feedback
bias.
5.5 Emitter-feedback bias:
+VCC
VCC  VBE
IB 
RB   hFE  1 RE
I CQ  hFE I B
RB
I E   hFE  1 I B
IB
VCEQ  VCC  I C RC  I E RE
 VCC  I CQ  RC  RE 
IC
IE
RC
RE
Figure 5.5: Emitter Feedback Bias.
THANK YOU !