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EE6301 Digital Logic Circuits
Unit-I
Number Systems & Digital logic family
UNIT I - NUMBER SYSTEMS AND LOGIC FAMILY
Syllabus:
Review of number systems; types and conversion, codes. Boolean algebra: De-Morgan’s
theorem, switching functions and simplification using K-maps and Quine McCluskey method.
Numerical Presentation
In science, technology, business, and, in fact, most other fields of endeavor, we are
constantly dealing with quantities. Quantities are measured, monitored, recorded,
manipulated arithmetically, observed, or in some other way utilized in most physical
systems. It is important when dealing with various quantities that we be able to represent
their values efficiently and accurately. There are basically two ways of representing the
numerical value of quantities: analog and digital.
Analog Representation
In analog representation a quantity is represented by a voltage, current, or meter
movement that is proportional to the value of that quantity. Analog quantities such as those
cited above have an important characteristic: they can vary over a continuous range of
values. Below is a diagram of analog voltage vs time:
Digital Representation
In digital representation the quantities are represented not by proportional quantities
but by symbols called digits. As an example, consider the digital watch, which provides the
time of day in the form of decimal digits which represent hours and minutes (and sometimes
seconds). As we know, the time of day changes continuously, but the digital watch reading
does not change continuously; rather, it changes in steps of one per minute (or per second). In
other words, this digital representation of the time of day changes in discrete steps, as
compared with the representation of time provided by an analog watch, where the dial
reading changes continuously. Below is a diagram of digital voltage vs. time:
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Department of EEE
EE6301 Digital Logic Circuits
Unit-I
Number Systems & Digital logic family
The major difference between analog and digital quantities, then, can be simply stated as
follows:
Analog = continuous
Digital = discrete (step by step)
Advantages and Limitations of Digital Techniques
Advantages
1. Easier to design. Exact values of voltage or current are not important, only the range
(HIGH or LOW) in which they fall.
2. Information storage is easy.
3. Accuracy and precision are greater.
4. Operation can be programmed. Analog systems can also be programmed, but the
variety and complexity of the available operations is severely limited.
5. Digital circuits are less affected by noise. As long as the noise is not large enough to
prevent us from distinguishing a HIGH from a LOW.
6. More digital circuitry can be fabricated on IC chips.
Limitations
There is really only one major drawback when using digital techniques:
The real world is mainly analog.
Most physical quantities are analog in nature, and it is these quantities that are often the
inputs and outputs that are being monitored, operated on, and controlled by a system.
To take advantage of digital techniques when dealing with analog inputs and outputs, three
steps must be followed:
1. Convert the real-world analog inputs to digital form. (ADC)
2. Process (operate on) the digital information.
3. Convert the digital outputs back to real-world analog form. (DAC)
The following diagram shows a temperature control system that requires analog/digital
conversions in order to allow the use of digital processing techniques.
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Department of EEE
EE6301 Digital Logic Circuits
Unit-I
Number Systems & Digital logic family
Number Systems
A number system specifies how values are represented. Human uses DECIMAL
Number System. There are ten digits in Decimal Number System: 0,1,2,3,4,5,6,7,8,9
Digital Computers use Binary Numbers, which have only two digits: 0,1
There are other number systems, including: Octal and Hexadecimal.
Number System Terminology
In Number System, a value of an n-digit number a n-1a n-2…a1a 0 is:
N = a n-1 x r n-1 + a n-2 x r n-2 +…+ a 1 x r 1 + a 0 x r 0
where a n-1,a n-2,…,a1,a 0 are coefficients
r is called the Base or Radix
Decimal is Base-10 system, r = 10
Binary is Base-2 system, r = 2
Octal is Base-8 system, r = 8
Hexadecimal is Base-16 system, r = 16
Decimal Number System
The decimal system is composed of 10 numerals or symbols. These 10 symbols are 0,
1, 2, 3, 4, 5, 6, 7, 8, 9; using these symbols as digits of a number, we can express any
quantity. The decimal system, also called the base-10 system because it has 10 digits. Values
are represented by the digits and their positions in the number and the type of number system
is called Positional Number System
103
=1000
Most
Significant
Digit
102
101 100
=100 =10 =1
10-1
.
Decimal
point
10-2
=0.1 =0.01
10-3
=0.001
Least
Significant
Digit
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Department of EEE
EE6301 Digital Logic Circuits
Unit-I
Number Systems & Digital logic family
8973 is Eight Thousand Nine Hundred and Seventy Three:
8 = 8000 = 8 x 103 (Thousands Place)
9 = 900 = 9 x 102 (Hundreds Place)
7 = 70 = 7 x 101 (Tens Place)
3 = 3 = 3 x 100 (Units Place)
Binary Number System
An n-bit binary number a n-1a n-2…a1a 0 has a value:
N = a n-1 x 2 n-1 + a n-2 x 2 n-2 +…+ a 1 x 2 1 + a 0 x 2 0
This base-2 system can be used to represent any quantity that can be represented in
decimal or other number system.
23
22
=8
=4 =2 =1
Most
Significant Bit
21
20
.
2-1
2-2
2-3
=1/2
=1/4
=1/8
Binary
point
Least
Significant Bit
e.g. A 4-bit binary number 10112 is:
N = 1 x 23 + 0 x 22 + 1 x 21 + 1 x 20
= 8 + 0 + 2 + 1 = 1110
e.g. A 6-bit binary number 1100102 is:
N = 1x25 + 1x24 + 0x23 + 0x22 + 1x21 + 0x20
= 32 + 16 + 0 + 0 + 2 = 5010
The Binary counting sequence is shown in the table:
Representing Binary Quantities
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Department of EEE
EE6301 Digital Logic Circuits
Unit-I
Number Systems & Digital logic family
In digital systems the information that is being processed is usually presented in
binary form. Binary quantities can be represented by any device that has only two operating
states or possible conditions. Eg. a switch has only open or closed. We arbitrarily (as we
define them) let an open switch represent binary 0 and a closed switch represent binary 1.
Thus we can represent any binary number by using series of switches.
Typical Voltage Assignment
Binary 1: Any voltage between 2V to 5V
Binary 0: Any voltage between 0V to 0.8V
Not used: Voltage between 0.8V to 2V, this may cause error in a digital circuit.
We can see another significant difference between digital and analog systems. In
digital systems, the exact value of a voltage is not important; eg, a voltage of 3.6V means the
same as a voltage of 4.3V. In analog systems, the exact value of a voltage is important.
Binary to Decimal Number Conversion
Binary numbers can be converted to Decimal numbers by using:
N = a n-1 x 2 n-1 + a n-2 x 2 n-2 +…+ a 1 x 2 1 + a 0 x 2 0
1 1 0 1 12
24+23+0+21+20
(binary)
= 16+8+0+2+1
= 2710 (decimal)
and
101101012
27+0+25+24+0+22+0+20
(binary)
= 128+0+32+16+0+4+0+1
= 18110 (decimal)
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Department of EEE
EE6301 Digital Logic Circuits
Unit-I
Number Systems & Digital logic family
Decimal to Binary Number Conversion
Decimal numbers can be converted to binary numbers by dividing the decimal number by 2
successively.
This method uses repeated division by 2. Ex. Convert 2510 to binary
25/ 2
12/ 2
6/2
3/2
1/2
Result
= 12+ remainder of 1
= 6 + remainder of 0
= 3 + remainder of 0
= 1 + remainder of 1
= 0 + remainder of 1
2510 =
1 (Least Significant Bit)
0
0
1
1 (Most Significant Bit)
1 1 0 0 12
The Flow chart for repeated-division method is as follow:
e.g. 16810 = 101010002
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Department of EEE
EE6301 Digital Logic Circuits
Unit-I
Number Systems & Digital logic family
Octal Number System
Octal Numbers are base 8
Octal has 8 digits: 0, 1, 2, 3, 4, 5, 6, 7
An n-bit octal number a n-1a n-2…a1a 0 has a decimal value:
a n-1 x 8 n-1 + a n-2 x 8 n-2 +…+ a 1 x 8 1 + a 0 x 8 0
83
82
=512
=64
81
80
=8 =1
Most
Significant
Digit
.
8-1
8-2
8-3
=1/8
=1/64
=1/512
Least
Significant
Digit
Octal
point
The conversion of octal to decimal can be done with the above equation
e.g. 2638 = 2x82 + 6x81 + 3x80
= 128 + 48 + 3 = 17910
e.g 24.68 = 2 x (81) + 4 x (80) + 6 x (8-1) = 20.7510
Decimal to Octal Number Conversion
Can be done by successive division of 8
This method uses repeated division by 8.
e.g. Convert 17710 to octal and binary:
177/8
22/ 8
2/8
= 22+ remainder of 1
= 2 + remainder of 6
= 0 + remainder of 2
Result
17710 =
Convert to Binary
1 (Least Significant Bit)
6
2 (Most Significant Bit)
2618
= 0101100012
e.g. 93810 = 16528
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Department of EEE
EE6301 Digital Logic Circuits
Unit-I
Number Systems & Digital logic family
Hexadecimal Number System
Hexadecimal Numbers are base 16
There are 16 digits: 0 to 9, A, B, C, D, E, F
163
=4096
162
161 160
=256 =16 =1
Most
Significant
Digit
16-1
.
16-2
=1/16 =1/256
16-3
=1/4096
Least
Significant
Digit
Hexadec.
point
An n-bit hexadecimal number a decimal value:
a n-1 x 16 n-1 + a n-2 x 16 n-2 +…+ a 1 x 16 1 + a 0 x 16 0
The conversion of hexadecimal to decimal can be done with the above equation
e.g. B5E16 = 11x162 + 5x161 + 14x160
= 2816 + 80 + 14 = 291010
Decimal to Hexadecimal Conversion
This method uses repeated division by 16.
e.g. Convert 37810 to hexadecimal and binary:
378/16
23/ 16
1 / 16
Result
= 23+ remainder of 10
= 1 + remainder of 7
= 0 + remainder of 1
37810 =
A (Least Significant Bit)
7
1 (Most Significant Bit)
17A16
Convert to Binary
=
0001
0111
10102
e.g. 279310 = AE916
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Department of EEE
EE6301 Digital Logic Circuits
Unit-I
Number Systems & Digital logic family
Conversion between Binary and Octal
Conversion between Binary and Octal is convenient
Each Octal digit equals to 3 bits
e.g. 3 6 2 8 - 011 110 010 2
5 4 1 8 - 101 100 001 2
e.g. 010 101 110 2 - 2 5 6 8
111 010 001 2 - 7 2 1 8
Conversion between Binary and Hex
Conversion between Binary and Hexadecimal is also convenient
Each Hexadecimal digit equals to 4 bits
E 2 8 0 16 - 1110 0010 1000 0000 2
F B 1 16
- 1111 1011 0001 2
Conversion among number systems
7318 = 111 011 0012
= 0001 1101 10012
= 1 D 9 16
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Department of EEE
EE6301 Digital Logic Circuits
7318
Unit-I
Number Systems & Digital logic family
= 1x162 + 13x161 + 9x160
= 256 + 208 + 9
= 47310
= 7x82 + 3x81 + 1x80
= 448 + 24 + 1
= 47310
Signed Binary Numbers
In ordinary arithmetic, a minus sign “-” is used to represent negative numbers,e.g.-38
In digital electronic circuits, everything is represented with bits (0, 1).There are
several ways to represent the signed binary numbers with just bits, e.g.:
 Signed Magnitude Representation
 1’s Complement Representation
 2’s Complement Representation
Signed Magnitude Number System
The most significant bit (MSB) is a sign bit
If the MSB is 0, the number is positive
If the MSB is 1, the number is negative
e.g.
01101 = +13
11101 = -13
e.g.
00000 = +0
10000 = -0
Disadvantage (a):2 patterns represent 0
(b): Handle sign bit separately
1’s Complement Number System
Positive numbers and the corresponding negative numbers complement each other
Complement is inversion (Logic NOT)
e.g.
01101 = +13
10010 = -1
e.g.
00000 = +0
11111 = -0
Disadvantage (a):2 patterns represent 0
(b): Handle sign bit separately25
2’s Complement Number Conversion
To find the 2’s complement number for a negative decimal, we can find the binary of
the positive decimal and then take its 2’scomplement.Two’s complement is obtained
by adding one to the one’s complement
e.g. -910
9 = 01001
Invert bits: 10110
Plus 1: 10111 = -910
Check: -16 + 0 + 4 + 2 + 1 = -9
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Department of EEE
EE6301 Digital Logic Circuits
Unit-I
Number Systems & Digital logic family
Value Range
For 4-bit binary, the range is:
Value Range
For n-bit binary, the range is:
CODES
Group of bits assigned to represent, identify or relate to multivalued items of
information. By assigning each item of information a unique combination of bits the
information is transferred from one form to another. The group of bits may be numbers,
alphabets, control functions and special characters.
An n-bit binary code is a group of n bits that assume up to 2n combinations of 1’s and
0’s with each combination representing one element of the set being enclosed.
Types
Weighted codes
Non – weighted codes
Self complementing codes
Reflective codes
Alphanumeric codes
Error detecting and correcting codes
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Department of EEE
EE6301 Digital Logic Circuits
Unit-I
Number Systems & Digital logic family
1. Weighted Codes
Each bit has a positional value of 8, 4, 2 or 1 in binary codes. Examples are
8421, 2421, 3321, 4221, 5211, 5311, 5421, 6311, 7421, 742’1’,
842’1’
All the above codes are used to represent a given decimal digit into four bit
binary word.
S.No. Decimal
Number
1.
0
2.
1
3.
2
4.
3
5.
4
6.
5
7.
6
8.
7
9.
8
10.
9
8421
2421
3321
4221
5311
5421
6311
7421
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
0000
0001
0010
0011
0100
1011
1100
1101
1110
1111
0000
0001
0010
0011
0101
0110
0111
1101
1110
1111
0000
0001
0010
0011
1000
0111
1100
1101
1110
1111
0000
0001
0011
0100
0101
1000
1001
1010
1100
1101
0000
0001
0010
0011
0100
0101
0110
0111
1011
1100
0000
0001
0011
0100
0101
0111
1000
1001
1011
1100
0000
0001
0010
0011
0100
0101
0110
0111
1001
1010
742’1’ 842’1’
0000
0111
0110
0101
0100
1010
1001
1000
1111
1110
0000
0111
0110
0101
0100
1011
1010
1001
1000
1111
2. Non-weighted Codes:
Each bit has no positional value
1. Excess-3 code
2. Gray code
3. Five bit BCD
3. Self complementing codes (or) Reflective codes
Code for one digit will be the complement of other
1. 2421
2. 5211
3. Excess-3
4. Sequential Codes
Succeeding number is one more than the previous one
1. 8421
2. Excess-3
5. Alphanumeric codes
1. ASCII
2. EBCDIC
3. Hollerith
6. Error detecting and correcting codes
For reliable transmission and storage of digital data, error detection and correction is
required. Below are a few examples of codes which permit error detection and error
correction after detection
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Department of EEE
EE6301 Digital Logic Circuits
Unit-I
Number Systems & Digital logic family
Error Detecting Codes
When data is transmitted from one point to another, like in wireless transmission, or it
is just stored, like in hard disks and memories, there are chances that data may get corrupted.
To detect these data errors, we use special codes, which are error detection codes.
Parity
In parity codes, every data byte, or nibble (according to how user wants to use it) is
checked if they have even number of ones or even number of zeros. Based on this
information an additional bit is appended to the original data. Thus if we consider 8-bit data,
adding the parity bit will make it 9 bit long.
At the receiver side, once again parity is calculated and matched with the received
parity (bit 9), and if they match, data is ok, otherwise data is corrupt.
There are two types of parity:


Even parity: Checks if there is an even number of ones; if so, parity bit is
zero. When the number of ones is odd then parity bit is set to 1.
Odd Parity: Checks if there is an odd number of ones; if so, parity bit is zero.
When number of ones is even then parity bit is set to 1.
Error-Correcting Codes
Error-correcting codes not only detect errors, but also correct them. This is used
normally in Satellite communication, where turn-around delay is very high as is the
probability of data getting corrupt.
ECC (Error correcting codes) are used also in memories, networking, Hard disk,
CDROM, DVD etc. Normally in networking chips (ASIC), we have 2 Error detection bits
and 1 Error correction bit.
Hamming Code
Hamming code adds a minimum number of bits to the data transmitted in a noisy
channel, to be able to correct every possible one-bit error. It can detect (not correct) two-bits
errors and cannot distinguish between 1-bit and 2-bits inconsistencies. It can't - in general detect 3(or more)-bits errors.
The idea is that the failed bit position in an n-bit string (which we'll call X) can be
represented in binary with log2(n) bits, hence we'll try to get it adding just log2(n) bits.
First, we set m = n + log2(n) to the encoded string length and we number each bit
position starting from 1 through m. Then we place these additional bits at power-of-two
positions that is 1, 2, 4, 8..., while remaining ones (3, 5, 6, 7...) hold the bit string in the
original order.
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Department of EEE
EE6301 Digital Logic Circuits
Unit-I
Number Systems & Digital logic family
Now we set each added bit to the parity of a group of bits. We group bits this way: we
form a group for every parity bit, where the following relation holds:
Position (bit) AND position (parity) = position (parity)
(Note that: AND is the bit-wise boolean AND; parity bits are included in the groups; each bit
can belong to one or more groups.)
So bit 1 groups bits 1, 3, 5, 7... while bit 2 groups bits 2, 3, 6, 7, 10... , bit 4 groups bits 4, 5,
6, 7, 12, 13... and so on.
Thus, by definition, X (the failed bit position defined above) is the sum of the incorrect parity
bits positions (0 for no errors).
To understand why it is so, let's call Xn the nth bit of X in binary representation. Now
consider that each parity bit is tied to a bit of X: parity1 -> X1, parity2 -> X2, parity4 -> X3,
parity8 -> X4 and so on - for programmers: they are the respective AND masks. By
construction, the failed bit makes fail only the parity bits which correspond to the 1s in X, so
each bit of X is 1 if the corresponding parity is wrong and 0 if it is correct.
Note that the longer the string, the higher the throughput n/m and the lower the
probability that no more than one bit fails. So the string to be sent should be broken into
blocks whose length depends on the transmission channel quality (the cleaner the channel,
the bigger the block). Also, unless it's guaranteed that at most one bit per block fails, a
checksum or some other form of data integrity check should be added.
Alphanumeric Codes
The binary codes that can be used to represent all the letters of the alphabet, numbers
and mathematical symbols, punctuation marks, are known as alphanumeric codes or
character codes. These codes enable us to interface the input-output devices like the
keyboard, printers, video displays with the computer.
ASCII Code
ASCII stands for American Standard Code for Information Interchange. It has
become a world standard alphanumeric code for microcomputers and computers. It is a 7-bit
code representing 27 = 128 different characters. These characters represent 26 upper case
letters (A to Z), 26 lowercase letters (a to z), 10 numbers (0 to 9), 33 special characters and
symbols and 33 control characters.
The 7-bit code is divided into two portions, The leftmost 3 bits portion is called zone
bits and the 4-bit portion on the right is called numeric bits.
An 8-bit version of ASCII code is known as USACC-II 8 or ASCII-8. The 8-bit
version can represent a maximum of 256 characters.
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Department of EEE
EE6301 Digital Logic Circuits
Unit-I
Number Systems & Digital logic family
EBCDIC Code
EBCDIC stands for Extended Binary Coded Decimal Interchange. It is mainly used
with large computer systems like mainframes. EBCDIC is an 8-bit code and thus
accommodates up to 256 characters. An EBCDIC code is divided into two portions: 4 zone
bits (on the left) and 4 numeric bits (on the right).
Hollerith code
Hollerith developed a way of feeding information into digital computers using
punched cards. The code used in this system to represent alphanumeric information is known
as Hollerith code. Punch card has 80 columns and 12 rows. Each column represents an
alphanumeric character with holes in appropriate rows. A hole is sensed as ‘1’ and absence of
hole is sensed as ‘0’ by the circuit in card reader. The 12 rows are marked starting from top
as 12,11,0,1,2,3,4,5,6,7,8,9,. Each row is 1-bit information. So, Hollerith code is a12-bit
code. The first 3 rows are zone punch rows and the remaining 9 are numeric punch rows. The
numbers are represented in the column by single punch whereas alphabets are represented
using 2 punches.
Binary Coded Decimal (BCD)
Binary numbers are used by computers and human beings are familiar with decimals.
To facilitate the easy conversion between binary and decimal, BCD is used.
In BCD number system, each decimal digit is represented by 4 bits
Group of 4 binary bits is a nibble. A nibble representing a number greater than 9 is
invalid BCD
Decimal to BCD Conversion
Binary 1010 to 1111 are not used in BCD
Example 1. Decimal 56
in BCD is 0101 0110
in binary is 00111000
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Department of EEE
EE6301 Digital Logic Circuits
Unit-I
Number Systems & Digital logic family
BCD addition




Add the given BCD numbers using binary addition
If the sum – nibble (group of 4 bits) is equal to or less than 9 (without carry)
then it is valid BCD.
If the sum – nibble (group of 4 bits) is greater than 9 (or) if a carry is
generated then it is invalid BCD.
To make the invalid BCD valid add 01102 to the nibble and if a carry is
generated add it to the next higher order BCD digit.
Examples
1. Add 4 and 5
4-> 0100
5-> 0101
--------1001 -> 9 -> valid BCD
--------2. Add 4 and 8
4-> 0100
8-> 1000
--------1100
--------1100 is invalid BCD since it is greater than 1001 so add 0110 to 1100 and
the result is 1 0010 which is equal to 12.
3. Add 8 and 9
8-> 1000
9-> 1001
--------10001
--------In the addition carry is generated so the result is invalid BCD. To make it
valid add 0110 to 10001 and the result is 1 0111 which is equal to 17.
Excess-3 (XS-3) code
1. Non weighted BCD code
2. Add three to each nibble of BCD code to get the XS3 code.
3. This code helps in performing subtraction operations in the earlier
computers.
4. The table below shows the BCD and XS-3 codes for decimal digits 0 to 9
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Department of EEE
EE6301 Digital Logic Circuits
Unit-I
Number Systems & Digital logic family
Decimal
BCD
Excess-3
0
1
2
3
4
5
6
7
8
9
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
Decimal to XS-3 conversion
(Ex).Convert 436 into XS-3 code
BCD equivalent of 436 is 0100 0011 0110
Add 3 (i.e) 0011 to each group of 4 bits
0100 0011 0110
0011 0011 0011
---------------------0111 0110 1001
---------------------7
6
9
- Xs-3 in decimal
Gray code




It is a minimum change code where only one bit in the code group changes while
going from one step to the next. Binary numbers have more than 1 bits changing
when increasing or decreasing continuously e.g. 0011 to 0100 (3 to 4): 3 bits
change. In digital electronic circuits, sometimes it is desired to have only 1 bit
changed In this case, Gray Code can be used In Gray Code, the adjacent
numbers have only 1 bit different
It is also called as unit – distance code.
In this code no weight can be attached with each bit position therefore it is
unsuitable for arithmetic operations.
Gray codes are useful in input and output devices and in analog and digital
converters.
Gray to Binary conversion





MSB of the gray code is same as binary number. So write the MSB as it is.
Add the MSB of the output with bit immediately on right in input and record the
sum. If a carry is generated it is ignored.
Continue adding the bits in the output to immediate input bit in right till the LSB
is reached.
The binary equivalent has same number of bits as the gray code.
This can be achieved by using X-OR gate.
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Department of EEE
EE6301 Digital Logic Circuits
Unit-I
Number Systems & Digital logic family
Example
Convert 1011 to binary
Binary to Gray conversion



MSB of the binary is same as MSB of gray code.
Add the MSB of binary with immediate bit to right in binary and that is the
next gray bit. If a carry is generated it is ignored.
Repeat the procedure till the LSB is reached.
Example:
Convert 1011 to gray code
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Department of EEE
EE6301 Digital Logic Circuits
Unit-I
Number Systems & Digital logic family
Boolean Variables & Truth Tables
Boolean algebra differs in a major way from ordinary algebra in that Boolean
constants and variables are allowed to have only two possible values, 0 or 1.
Boolean 0 and 1 do not represent actual numbers but instead represent the state of a voltage
variable, or what is called its logic level.
Some common representation of 0 and 1 is shown in the following diagram.
In Boolean algebra, there are three basic logic operations: AND ,OR, and NOT.
These logic gates are digital circuits constructed from diodes, transistors, and resistors
connected in such a way that the circuit output is the result of a basic logic operation (OR,
AND, NOT) performed on the inputs.
Truth Table
A truth table is a means for describing how a logic circuit's output depends on the
logic levels present at the circuit's inputs.
In the following two-input logic circuit, the table lists all possible combinations of
logic levels present at inputs A and B along with the corresponding output level X.
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Department of EEE
EE6301 Digital Logic Circuits
Unit-I
Number Systems & Digital logic family
When either input A OR B is 1, the output X is 1. Therefore the "?" in the box is an OR gate.
OR Operation
The expression X = A + B reads as "X equals A OR B". The + sign stands for the OR
operation, not for ordinary addition.
The OR operation produces a result of 1 when any of the input variable is 1.
The OR operation produces a result of 0 only when all the input variables are 0.
An example of three input OR gate and its truth table is as follows:
With the OR operation, 1 + 1 = 1, 1+ 1 + 1 = 1 and so on.
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EE6301 Digital Logic Circuits
Unit-I
Number Systems & Digital logic family
AND Operation
The expression X = A * B reads as "X equals A AND B".
The multiplication sign stands for the AND operation, same for ordinary multiplication of 1s
and 0s.The AND operation produces a result of 1 occurs only for the single case when all of
the input variables are 1.The output is 0 for any case where one or more inputs are 0
An example of three input AND gate and its truth table is as follows:
With the AND operation, 1*1 = 1, 1*1*1 = 1 and so on.
NOT Operation
The NOT operation is unlike the OR and AND operations in that it can be performed
on a single input variable. For example, if the variable A is subjected to the NOT operation,
the result x can be expressed as x = A' where the prime (') represents the NOT operation. This
expression is read as:
x equals NOT A
x equals the inverse of A
x equals the complement of A
Each of these is in common usage and all indicate that the logic value of x = A' is
opposite to the logic value of A. The truth table of the NOT operation is as follows:
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EE6301 Digital Logic Circuits
Unit-I
Number Systems & Digital logic family
1' = 0 because NOT 1 is 0
0' = 1 because NOT 0 is 1
The NOT operation is also referred to as inversion or complementation, and these terms are
used interchangeably.
NOR Operation
NOR and NAND gates are used extensively in digital circuitry. These gates combine
the basic operations AND, OR and NOT, which make it relatively easy to describe then using
Boolean algebra.
NOR gate symbol is the same as the OR gate symbol except that it has a small circle
on the output. This small circle represents the inversion operation. Therefore the output
expression of the two input NOR gate is:
X = (A + B)'
An example of three inputs OR gate can be constructed by a NOR gate plus a NOT
gate:
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Department of EEE
EE6301 Digital Logic Circuits
Unit-I
Number Systems & Digital logic family
NAND Operation
NAND gate symbol is the same as the AND gate symbol except that it has a small
circle on the output. This small circle represents the inversion operation. Therefore the output
expression of the two input NAND gate is:
X = (AB)'
Describing Logic Circuits Algebraically
Any logic circuit, no matter how complex, may be completely described using the
Boolean operations, because the OR gate, AND gate, and NOT circuit are the basic building
blocks of digital systems.
This is an example of the circuit using Boolean expression:
If an expression contains both AND and OR operations, the AND operations are performed
first (X=AB+C: AB is performed first), unless there are parentheses in the expression, in
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EE6301 Digital Logic Circuits
Unit-I
Number Systems & Digital logic family
which case the operation inside the parentheses is to be performed first (X= (A+B) +C: A+B
is performed first).
Circuits containing Inverters
Whenever an INVERTER is present in a logic-circuit diagram, its output expression
is simply equal to the input expression with a prime (') over it.
Evaluating Logic Circuit Outputs
Once the Boolean expression for a circuit output has been obtained, the output logic level can
be determined for any set of input levels.
These are two examples of the evaluating logic circuit output:
Let A=0, B=1, C=1, D=1
X
= A'BC (A+D)'
= 0'*1*1* (0+1)'
= 1 *1*1* (1)'
= 1 *1*1* 0
=0
Let A=0, B=0, C=1, D=1, E=1
X
= [D+ ((A+B)C)'] * E
= [1 + ((0+0)1 )'] * 1
= [1 + (0*1)'] * 1
= [1+ 0'] *1
= [1+ 1 ] * 1
=1
In general, the following rules must always be followed when evaluating a Boolean
expression:
1. First, perform all inversions of single terms; that is, 0 = 1 or 1 = 0.
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EE6301 Digital Logic Circuits
Unit-I
Number Systems & Digital logic family
2. Then perform all operations within parentheses.
3. Perform an AND operation before an OR operation unless parentheses indicate otherwise.
4. If an expression has a bar over it, perform the operations of the expression first and then
invert the result.
Determining Output Level from a Diagram
The output logic level for given input levels can also be determined directly from the
circuit diagram without using the Boolean expression.
Implementing Circuits from Boolean Expression
If the operation of a circuit is defined by a Boolean expression, a logic-circuit
diagram can he implemented directly from that expression.
Suppose that we wanted to construct a circuit whose output is y = AC+BC' + A'BC.
This Boolean expression contains three terms (AC, BC', A'BC), which are ORed together.
This tells us that a three-input OR gate is required with inputs that are equal to AC, BC', and
A'BC, respectively.
Each OR-gate input is an AND product term, which means that an AND gate with
appropriate inputs can be used to generate each of these terms. Note the use of INVERTERs
to produce the A' and C' terms required in the expression.
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Department of EEE
EE6301 Digital Logic Circuits
Unit-I
Number Systems & Digital logic family
Boolean Theorems
Investigating the various Boolean theorems (rules) can help us to simplify logic
expressions and logic circuits.
Multivariable Theorems
The theorems presented below involve more than one variable:
(9)
(10)
(11)
x + y = y + x (commutative law)
x * y = y * x (commutative law)
x+ (y+z) = (x+y) +z = x+y+z (associative law)
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EE6301 Digital Logic Circuits
(12)
(13a)
(13b)
(14)
(15)
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Number Systems & Digital logic family
x (yz) = (xy) z = xyz (associative law)
x (y+z) = xy + xz
(w+x)(y+z) = wy + xy + wz + xz
x + xy = x [proof see below]
x + x'y = x + y
Proof of (14)
x + xy
= x (1+y)
= x * 1 [using theorem (6)]
= x [using theorem (2)]
DeMorgan's Theorem
DeMorgan's theorems are extremely useful in simplifying expressions in which a
product or sum of variables is inverted. The two theorems are:
(16)
(x+y)' = x' * y'
Theorem (16) says that when the OR sum of two variables is inverted, this is the same as
inverting each variable individually and then ANDing these inverted variables.
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EE6301 Digital Logic Circuits
(17)
Unit-I
Number Systems & Digital logic family
(x*y)' = x' + y'
Theorem (17) says that when the AND product of two variables is inverted, this is the same
as inverting each variable individually and then ORing them.
Example
X
= [(A'+C) * (B+D')]'
= (A'+C)' + (B+D')' [by theorem (17)]
= (A''*C') + (B'+D'') [by theorem (16)]
= AC' + B'D
Three Variables DeMorgan's Theorem
(18)
(x+y+z)' = x' * y' * z'
(19)
(xyz)' = x' + y' + z'
Universality of NAND & NOR Gates
It is possible to implement any logic expression using only NAND gates and no other
type of gate. This is because NAND gates, in the proper combination, can be used to perform
each of the Boolean operations OR, AND, and INVERT.
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EE6301 Digital Logic Circuits
Unit-I
Number Systems & Digital logic family
In a similar manner, it can be shown that NOR gates can be arranged to implement any of the
Boolean operations.
Alternate Logic Gate Representations
The left side of the illustration shows the standard symbol for each logic gate, and the
right side shows the alternate symbol. The alternate symbol for each gate is obtained from the
standard symbol by doing the following:
1. Invert each input and output of the standard symbol. This is done by adding
bubbles (small circles) on input and output lines that do not have bubbles, and
by removing bubbles that are already there.
2. Change the operation symbol from AND to OR, or from OR to AND. (In
the special case of the INVERTER, the operation symbol is not changed.)
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EE6301 Digital Logic Circuits
Unit-I
Number Systems & Digital logic family
Several points should be stressed regarding the logic symbol equivalences:
1. The equivalences are valid for gates with any number of inputs.
2. None of the standard symbols have bubbles on their inputs, and all the alternate
symbols do.
3. The standard and alternate symbols for each gate represent the same physical
circuit: there is no difference in the circuits represented by the two symbols.
4. NAND and NOR gates are inverting gates, and so both the standard and alternate
symbols for each will have a bubble on either the input or the output. AND and OR gates are
non inverting gates, and so the alternate symbols for each will have bubbles on both inputs
and output.
Concept of Active Logic Levels:
When an input or output line on a logic circuit symbol has no bubble on it, that line is
said to be active-HIGH. When an input or output line does have a bubble on it, that line is
said to be active-LOW. The presence or absence of a bubble, then, determines the activeHIGH/active-LOW status of a circuit's inputs and output, and is used to interpret the circuit
operation.
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Department of EEE
EE6301 Digital Logic Circuits
Unit-I
Number Systems & Digital logic family
Boolean Function
A Boolean function is an algebraic expression consists of binary variables, the constants 0 &
1, and the Boolean operators. For a set of given values of the variables, the function is
evaluated to either 0 or 1.
e.g. f = x • y + x • z’
The Boolean function f has 3 binary variables x, y and z.
The function is 1 if x and y are both 1 or if x is 1 and z is 0. Otherwise, f = 0.
Operator Precedence
The operator precedence is:
1. Parentheses
2. NOT
3. AND
4. OR
e.g. f = x • y + x • z’
Precedence: z’, x • y, x • z’, x • y + x • z’
e.g. f = (a +b) • (c+d’)
Precedence: a+b, d’, c+d’, (a +b) • (c+d’)
The parentheses precedence is the same as in normal algebra
Boolean Function Truth Table
Boolean function can be represented by truth table as well.If the function has n
variables, its truth table will have 2n rows
e.g. f = x • y + x • z’
f has 3 variables so 23 combinations
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f is 1 when the expression is evaluated to 1 otherwise it is 0.
Minterm
In a Boolean function, a binary variable (x) may appear either in its normal form (x)
or in its complement form (x’).Consider 2 binary variables x and y and an AND operation,
there are 4 and only 4 possible combinations: x’•y’, x’•y, x•y’ & x•y
Each of the 4 product terms is called a MINTERM or STANDARD PRODUCT
By definition, a Minterm is a product which consists of all the variables in the normal
form or the complement form but NOT BOTH.
e.g. for a function with 2 variables x and y:
x•y’ is a minterm but x’ is NOT a minterm
e.g. for a function with 3 variables x, y andz:
x’yz’ is a minterm but xy’ is NOT a minterm
Maxterm
Consider 2 binary variables x and y and an OR operation, there are 4 and only 4
possible combinations: x’+y’, x’+y, x+y’, x+y.Each of the 4 sum terms is called a
MAXTERM or STANDARD SUM.By definition, a Maxterm is a sum in which each
variable appears once and only once either in its normal form or its complement form but
NOT BOTH.
Minterms and Maxterms for 3 Variables
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EE6301 Digital Logic Circuits
Unit-I
Number Systems & Digital logic family
Minterm Boolean Expression
Boolean functions can be expressed with minterms,
e.g.f1(x,y,z) = m1 + m4 + m6 = Σm(1, 4, 6)
f2(x,y,z) = m2 + m4 + m6+ m7
= Σm(2, 4, 6, 7)
Maxterm Boolean Expression
Boolean functions can also be expressed with maxterms,
e.g.f1’ = x’y’z’+x’yz’+x’yz+xy’z+xyz
f1 = (x’y’z’+x’yz’+x’yz+xy’z+xyz)’
= (x+y+z)(x+y’+z)(x+y’+z’)(x’+y+z’)(x’+y’+z’)
= M0•M2•M3•M5•M7
= Π M(0, 2, 3, 5, 7)
f2 = M0•M1•M3•M5
= Π M(0, 1, 3, 5)
Literal
A Literal is a variable in a product or sum term
xy’ is a 2-literal product term
x’yz has 3 literals
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EE6301 Digital Logic Circuits
Unit-I
Number Systems & Digital logic family
x’ + xy’ + x’yz is an expression of sum of products with 3 product terms.The
3 product terms have 1, 2 and 3 literals respectively
x’(x+y’)(x’+y+z) is an expression of product of sums.The 3 sum terms have 1,
2 and 3 literals
Express Boolean Functions in Minterms
If product terms in a Boolean function are not minterms, they can be converted to minterms
e.g. f(a,b,c) = a’ + bc’ + ab’c
Function f has 3 variables, therefore, each minterm must have 3 literals
Neither a’ nor bc’ are minterms.They can be converted to minterm.ab’c is a
minterm
Conversion to Minterms
e.g. f(a,b,c) = a’ + bc’ + ab’c
To convert a’ to a minterm, the 2 variables (b, c) must be added, without changing its
functionality .Since a’=a’•1 & 1 = b+b’, a’= a’(b + b’) = a’b + a’b’
Similarly, a’b = a’b(c + c’) = a’bc + a’bc’ and a’b’ = a’b’(c+c’) = a’b’c + a’b’c’
bc’ = bc’(a+a’) = abc’ + a’bc’
f = a’bc+a’bc’+a’b’c+a’b’c’+abc’+a’bc’+ab’c
Express Boolean Functions in Maxterms
By using the Distribution Law: x+yz = (x+y)(x+z), a Boolean function can be
converted to an expression in product of maxterms
e.g. f(a,b,c) = a’+bc’
= (a’+b)(a’+c’) {not maxterms}
= (a’+b+cc’)(a’+c’+bb’) {cc’=0}
= (a’+b+c)(a’+b+c’)(a’+c’+b)(a’+c’+b’)
= (a’+b+c)(a’+b+c’)(a’+c’+b’)
Boolean Function Manipulation
Boolean functions can be manipulated with Boolean algebra. Manipulation can
transform logic expressions, but still keep the same logic functionality. Manipulation can
reduce the complexity, hence, easier to be implemented in hardware, i.e. fewer logic gates.
Boolean Function Manipulation Example
f = xy’ + xyz + x’z
= x(y’ + yz) + x’z {common factor}
= x[(y’+y)(y’+z)] + x’z {Distribution law}
= x(y’+z) + x’z {y’ + y = 1}
= xy’ + xz + x’z {Distribution law}
= xy’ + (x + x’)z {common factor}
= xy’ + z {x + x’ = 1}
Simplify f1=abc+a’b+abc’ and f2=(a+b)’(a’+b’) to the minimum literals
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Unit-I
Number Systems & Digital logic family
f1 = abc+a’b+abc’ = ab(c+c’) + a’b = ab + a’b = (a+a’)b = b
f2 =(a+b)’(a’+b’) = a’b’(a’+b’) {DeMorgan}
= a’b’a’+a’b’b’
= a’b’ + a’b’ = a’b’
Review of Boolean algebra – codes
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Simplification using K-maps
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Quine McCluskey method
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Example
Find the minimal sum of products for the Boolean expression,
f= (1,2,3,7,8,9,10,11,14,15), using Quine-McCluskey method.
Firstly these minterms are represented in the binary form as shown in the table below.
The above binary representations are grouped into a number of sections in terms of
the number of 1's as shown in the table below.
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EE6301 Digital Logic Circuits
Unit-I
Number Systems & Digital logic family
Binary representation of minterms
Minterms
1
2
3
7
8
9
10
11
14
15
U
0
0
0
0
1
1
1
1
1
1
V
0
0
0
1
0
0
0
0
1
1
W
0
1
1
1
0
0
1
1
1
1
X
1
0
1
1
0
1
0
1
0
1
Group of minterms for different number of 1's
No of 1's
1
1
1
2
2
2
3
3
3
4
Minterms
1
2
8
3
9
10
7
11
14
15
U
0
0
1
0
1
1
0
1
1
1
V
0
0
0
0
0
0
1
0
1
1
W
0
1
0
1
0
1
1
1
1
1
X
1
0
0
1
1
0
1
1
0
1
Any two numbers in these groups which differ from each other by only one variable
can be chosen and combined, to get 2-cell combination, as shown in the table below.
2-Cell combinations
Combinations
(1,3)
(1,9)
(2,3)
(2,10)
(8,9)
(8,10)
U
0
0
1
1
V
0
0
0
0
0
0
W
0
1
1
0
-
X
1
1
0
0
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Unit-I
(3,7)
(3,11)
(9,11)
(10,11)
(10,14)
(7,15)
(11,15)
(14,15)
Number Systems & Digital logic family
0
1
1
1
1
1
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
0
1
1
-
From the 2-cell combinations, one variable and dash in the same position can be
combined to form 4-cell combinations as shown in the figure below.
Combinations
(1,3,9,11)
(2,3,10,11)
(8,9,10,11)
(3,7,11,15)
(10,11,14,15)
U
1
1
V
0
0
0
-
W
1
1
1
X
1
1
-
The cells (1,3) and (9,11) form the same 4-cell combination as the cells (1,9) and
(3,11). The order in which the cells are placed in a combination does not have any
effect. Thus the (1,3,9,11) combination could be written as (1,9,3,11).
From above 4-cell combination table, the prime implicants table can be plotted as
shown in table below.
Prime Implicants Table
Prime
Implicants
(1,3,9,11)
(2,3,10,11)
(8,9,10,11)
(3,7,11,15)
-
1
2
3
7
8
9
10
11
14
15
X
X
X
X
X
X
-
X
X
X
X
X
-
X
X
X
-
X
X
X
X
-
X
X
X
-
The columns having only one cross mark corresponds to essential prime implicants.
A yellow cross is used against every essential prime implicant. The prime implicants
sum gives the function in its minimal SOP form.
Y = V'X + V'W + UV' + WX + UW
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