Download Chapter 2 Test Bank

Chapter 2 Test Bank
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Last update: 09/27/2002
Copyright Kip Irvine. All rights reserved. You may use and modify this test for instructional
purposes as long as you have adopted Assembly Language for Intel-Based Computers (Irvine) for
your current semester course. You are welcome to edit and extract questions from this test as long
as you do not reproduce or distribute the questions outside of your own classroom.
Fill in the Blanks and Short Answer
1.
The technique of executing instructions in parallel is called ________.
pipelining
2.
Which unit in the IA-32 instruction cycle receives machine instructions from the BIU and inserts
them into the instruction queue?
code prefetch unit
3.
Which unit in the IA-32 instruction cycle performs page protection checks?
4.
Which component of an operating system is responsible for switching control between tasks?
scheduler
5.
Identify three types of segments that would be referenced by segment registers. code, data, stack
6.
If you were to multiply 1.5 by 2.6, which part of the CPU would you use?
unit
floating-point
7.
Name two RISC-like features incorporated by Intel into the IA-32 family.
superscalar
pipelining,
8.
In the Flat segmentation model, which table holds the addresses of segments?
descriptor table (GDT)
global
9.
List at least five types of ports found on a typical PC motherboard.
serial, USB, video, keyboard, joystick, mouse
paging
Choose from: parallel,
10. Which support processor synchronizes the CPU and the rest of the computer?
clock generator
8284/82C284
11. Which support processor transfers data to the printer?
8255 programmable parallel port
12. Why are serial ports typically slower than parallel ports?
parallel transfers multiple bits simultaneously)
(serial transfers 1 bit at a time,
Multiple-Choice
13. Which two 32-bit registers are known as extended index registers?
a. SI, DI
b. EAX, EBX
c. ESI, EDI
d. EBP, ESP
answer: c
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14. What is the name of the lowest 8 bits of the EDX register?
a. DL
b. DH
c. DX
d. none of the above
answer: a
15. How much memory can be addressed in Real-address mode?
a. 640 K
b. 1 MB
c. 16 MB
d. 4 GB
answer: b
16. How much memory can be addressed in Protected mode?
a. 640 K
b. 1 MB
c. 16 MB
d. 4 GB
answer: d
17. What special feature makes VRAM better-suited to use with a video adapter than DRAM?
a. VRAM uses static RAM
b. VRAM is dual-ported
c. VRAM does not require a refresh cycle
d. VRAM holds its memory when power is turned off
answer: b
18. Which of the following linear addresses matches the segment-offset address 08F0:0200?
a. 09100h
b. 09200h
c. 0AF0h
d. 08F2h
answer: a
19. Which type of I/O device uses the 16550 UART chip?
a. USB port
b. printer port
c. serial port
d. parallel port
answer: c
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20. If you wanted to turn a device on and off using computer software, which type of port interface
would be best?
a. USB
b. keyboard
c. serial
d. parallel
answer: a
21. What is the name of the bus architecture commonly used with Pentium processors?
a. ISA
b. PCI
c. EISA
d. RAM-BUS
answer: b
22. Segment-offset addressing is used in which processor mode(s)?
a. Protected
b. Virtual-8086
c. Real-address
d. System management
answer: b,c
23. How is Virtual-8086 mode similar to Real-address mode?
a. permits the use of virtual memory (paging)
b. uses a segment descriptor table to track memory usage
c. uses only 16-bit registers for input-output
d. simulates 8086-based computer running in Real-address mode
answer: d
24. High-speed memory that reduces the frequency of access by the CPU to conventional memory is
called
a. local memory
b. cache memory
c. system memory
d. virtual memory
answer: b
25. Why are device drivers needed, given that BIOS programs can do the same task?
a. device drivers allow for the introduction of new devices
b. device drivers have faster performance than BIOS programs
c. BIOS programs are only used by the operating system in Real-address mode
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d. device drivers have more direct access to hardware than BIOS programs
answer: a
26. An interpreter program inside the CPU is written in a language called a(n) _______.
a. machine language interpreter
b. digital driver program
c. microprogram
d. system decoder
answer: c
27. If you wanted to find out whether an integer contained an even number of 1 bits, which status flag
would be useful?
a. carry
b. overflow
c. sign
d. parity
answer: d
28. In regard to multitasking, a task's state consists of which three elements?
a. status flags, program counter, register contents
b. register contents, task variables, program counter
c. task variables, segment descriptor, register contents
d. segment descriptor, status flags, task variables
answer: b
29. Within the CPU, all calculations and logic operations take place inside the ___________ .
a. registers
b. ALU
c. CU
d. MBU
answer: b
30. The three types of buses connected to the CPU are:
a. data, address, control
b. data, system, address
c. address, control, memory
d. fetch-decode, control, execution
answer: a
31. If a clock oscillates 10 billion times per second, what is the duration of a single clock cycle?
a. 1 nanosecond
b. 1.0 x 10-9 seconds
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c. 1.0 x 1010 seconds
d. 1.0 x 10-10 seconds
answer: d
32. During which phase of the instruction execution cycle is the program counter incremented?
a. decode
b. execute
c. operand fetch
d. fetch
answer: d
33. The control unit (CU) coordinates the sequencing of steps involved in executing machine
instructions.
a. True
b. False
answer: a
34. The ALU performs only addition, subtraction, multiplication, and division operations.
a. True
b. False
answer: b
35. Data travels along a bus one bit at a time.
a. True
b. False
answer: b
36. The most basic unit of time for machine instructions is called the machine cycle.
a. True
b. False
answer: a
37. The upper half of the EAX register is called AX.
a. True
b. False
answer: b
38. The lower half of the EBX register is called BX.
a. True
b. False
answer: a
39. The Overflow flag is based on signed arithmetic.
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a. True
b. False
answer: a
40. The Zero flag is clear when the result of an arithmetic operation is zero.
a. True
b. False
answer: b
41. Registers in the floating-point unit are 80 bits long.
a. True
b. False
answer: a
42. Microprograms are interpreted and executed by machine instructions.
a. True
b. False
answer: b
43. In Real-address mode, only one program can run at a time.
a. True
b. False
answer: a
44. In Virtual-8086 mode, only a single virtual machine can run at one time.
a. True
b. False
answer: b
45. In the multi-segment model (Protected mode), each program is given its own local descriptor
table.
a. True
b. False
answer: a
46. Segment limit and base address are both fields within a segment descriptor.
a. True
b. False
answer: a
47. In Protected mode, the total memory used by all running programs can never be larger than the
computer's physical memory.
a. True
b. False
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answer: b
48. The four parts of a CPU are:
a. data bus, memory unit, control unit, arithmetic logic unit
b. address bus, registers, control unit, arithmetic logic unit
c. clock, memory unit, control unit, instruction fetch unit
d. clock, registers, control unit, arithmetic logic unit
answer: d
49. What is the name of the time delay in a CPU caused by differences between the speed of the CPU,
the system bus, and memory circuits?
a. wait cycle
b. wait state
c. dead cycle
d. memory write cycle
answer: b
50. List the three primary steps of the instruction execution cycle, in sequential order:
a. fetch, decode, memory write
b. fetch, memory read, execute
c. decode, fetch, execute
d. fetch, decode, execute
answer: d
51. Which stage in the IA-32 instruction cycle is responsible for translating logical addresses to linear
addresses and performing protection checks?
a segment unit
b. code prefetch unit
c. execution unit
d. paging unit
answer: a
52. What are the six stages, or units involved in executing a single IA-32 instruction?
a. code prefetch, instruction decode, execution, segment, paging, memory store
b. bus interface, instruction decode, parallel analysis, execution, segment, paging
c. bus interface, code prefetch, instruction decode, execution, segment, paging
d. bus interface, code prefetch, instruction decode, execution, address translation, paging
answer: c
53. Which flag is set when an unsigned value is too large to fit into a destination operand?
a. Sign
b. Carry
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c. Overflow
d. Auxiliary Carry
answer: b
54. In a 4-stage non-pipelined processor, how many clock cycles are required to execute 3
instructions? (Assume that each stage executes in a single clock cycle.)
a. 12
b. 8
c. 6
d. cannot be determined
answer: a
55. In a 4-stage single-pipelined processor, how many clock cycles are required to execute 3
instructions? (Assume that each stage executes in a single clock cycle.)
a. 12
b. 8
c. 6
d. cannot be determined
answer: c
56. In a 6-stage dual-pipelined processor, how many clock cycles are required to execute 5
instructions? (Assume that stage 4 requires two clock cycles, and that stage 4 has two pipelines.)
a. 10
b. 11
c. 12
d. 15
answer: b
57. Which of the following correctly describes the sequence of reading from memory during a single
clock cycle?
a.
Read line set low; Address placed on bus; Operand placed on data bus by memory
controller; Read line set high, indicating that data bus contains the requested data.
b.
Address placed on bus; Operand placed on data bus by memory controller; Read line set
low; Read line set high, indicating that data bus contains the requested data.
c.
Address placed on bus; Read line set low; Read line set high, indicating that data bus
contains the requested data; Operand placed on data bus by memory controller.
d.
Address placed on bus; Read line set low; Operand placed on data bus by memory
controller; Read line set high, indicating that data bus contains the requested data.
answer: d
58. Which register is known as a loop counter?
a. EAX
b. EBX
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c. ECX
d. EDX
answer: c
59. Which mode is the native state of the Intel processor?
a. Protected mode
b. Virtual-8086 mode
c. Real-address mode
d. System management mode
answer: a
60. Real-address mode combines which two values to form addresses?
a. page, segment
b. segment, offset
c. descriptor, segment
d. offset, descriptor
answer: b
61. When the CPU tries to execute part of a program that has been swapped out to disk, it executes a
a. descriptor table load
b. general protection fault
c. page fault
d. page translation
answer: c
62. What is the term used for executing horizontal and vertical retrace on a CRT video monitor?
a. digital delay
b. trace mapping
c. DAC (digital to analog conversion)
d. raster scanning
answer: d
63. Which type of RAM is typically used for cache memory?
a. static RAM
b. dynamic RAM
c. CMOS RAM
d. Video RAM
answer: a
(Some of the following questions have more than one correct answer. Circle all correct answers.)
64. Which of the following describe(s) RISC processors?
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a. short, simple instructions, executed quickly
b. complex high-level instructions
c. requires microcode interpreter
d. instructions are executed directly by hardware
answers: a, d
65. Which of the following is(are) advantages of USB ports over parallel ports?
a. bidirectional data transfer
b. query devices to get name and type of device
c. permits a hub to be connected
d. can suspend power to devices
answers: b,c,d
66. Which type of output is the most general and portable to different computer systems?
a. writing directly to video memory
b. using C++ stream output statements
c. calling operating system functions
d. calling BIOS functions
answer: b
67. Which type of output will execute the most quickly?
a. writing directly to video memory
b. using C++ stream output statements
c. calling operating system functions
d. calling BIOS functions
answer: a
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