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Lecture 010 – Introduction (3/24/10) Page 010-1 LECTURE 010 - INTRODUCTION TO CMOS ANALOG CIRCUIT DESIGN LECTURE ORGANIZATION Outline • Introduction • What is Analog Design? • Skillset for Analog IC Circuit Design • Trends in Analog IC Design • Notation, Terminology and Symbols • Summary CMOS Analog Circuit Design, 2nd Edition Reference Pages 1-16 CMOS Analog Circuit Design © P.E. Allen - 2010 Lecture 010 – Introduction (3/24/10) Page 010-2 INTRODUCTION Course Objective This course teaches analog integrated circuit design using CMOS technology. VDD VPB1 I4 SPECIFICATIONS I5 M4 I1 I2 VPB2 I6 I7 M6 M1 M2 + vIN − VNB1 M3 I 3 M5 M7 vOUT VNB2 M8 M9 M10 M11 CL 070209-01 CMOS Analog Circuit Design © P.E. Allen - 2010 Lecture 010 – Introduction (3/24/10) Page 010-3 Course Prerequisites • Basic understanding of electronics - Active and passive components - Large and small signal models - Frequency response • Circuit analysis techniques - Mesh and loop equations - Superposition, Thevenin and Norton’s equivalent circuits • Integrated circuit technology - Basics process steps - PN junctions CMOS Analog Circuit Design © P.E. Allen - 2010 Lecture 010 – Introduction (3/24/10) Page 010-4 Course Organization – Based on 2nd Ed. of CMOS Analog Circuit Design Chapter 9 Switched Capacitor Circuits Chapter 10 D/A and A/D Converters Systems Chapter 6 Simple CMOS & BiCMOS OTA's Chapter 7 High Performance OTA's Chapter 8 CMOS/BiCMOS Comparators Complex Simple Chapter 4 CMOS Subcircuits Chapter 5 CMOS Amplifiers Chapter Chapter10 2 CMOS/BiCMOS D/A and A/D Technology Converters Chapter Chapter11 3 CMOS/BiCMOS Analog Modeling Systems Circuits Devices Introduction CMOS Analog Circuit Design 070209-02 © P.E. Allen - 2010 Lecture 010 – Introduction (3/24/10) Page 010-5 References 1.) P.E. Allen and D.R. Holberg, CMOS Analog Circuit Design – 2nd Ed., Oxford University Press, 2002. 2.) P.R. Gray, P.J. Hurst, S.H. Lewis and R.G. Meyer, Analysis and Design of Analog Integrated Circuits – 4th Ed., John Wiley and Sons, Inc., 2001. 3.) B. Razavi, Design of Analog CMOS Integrated Circuits, McGraw-Hill, Inc., 2001. 4.) R.J. Baker, H.W. Li and D.E. Boyce, CMOS Circuit Design, Layout, and Simulation, IEEE Press, 1998. 5.) D. Johns and K. Martin, Analog Integrated Circuit Design, John Wiley and Sons, Inc., 1997. 6.) K.R. Laker and W.M.C. Sansen, Design of Analog Integrated Circuits and Systems, McGraw-Hill, Inc., 1994. 7.) R.L. Geiger, P.E. Allen and N.R. Strader, VLSI Techniques for Analog and Digital Circuits, McGraw-Hill, Inc., 1990. 8.) A. Hastings, The Art of Analog Layout – 2nd Ed., Prentice-Hall, Inc., 2005. 9.) J. Williams, Ed., Analog Circuit Design - Art, Science, and Personalities, Butterworth-Heinemann, 1991. 10.) R.A. Pease, Troubleshooting Analog Circuits, Butterworth-Heinemann, 1991. CMOS Analog Circuit Design Lecture 010 – Introduction (3/24/10) © P.E. Allen - 2010 Page 010-6 Course Philosophy This course emphasizes understanding of analog integrated circuit design. Although simulators are very powerful, the designer must understand the circuit before using the computer to simulate a circuit. CMOS Analog Circuit Design © P.E. Allen - 2010 Lecture 010 – Introduction (3/24/10) Page 010-7 WHAT IS ANALOG DESIGN? Analysis versus synthesis (design) System 1 System 2 System ANALYSIS Properties System 3 DESIGN Properties System 4 031028-01 • Analysis: Given a system, find its properties. The solution is unique. • Design: Given a set of properties, find a system possessing them. The solution is rarely unique. CMOS Analog Circuit Design © P.E. Allen - 2010 Lecture 010 – Introduction (3/24/10) Page 010-8 The Analog IC Design Process Conception of the idea Electrical Design Definition of the design Comparison with design specifications Implementation Comparison with design specifications Simulation Physical Definition Physical Design Physical Verification Parasitic Extraction Fabrication Fabrication Testing and Product Development Testing and Verification Product Fig. 1.1-2 CMOS Analog Circuit Design © P.E. Allen - 2010 Lecture 010 – Introduction (3/24/10) Page 010-9 What is Electrical Design? Electrical design is the process of going from the specifications to a circuit solution. The inputs and outputs of electrical design are: ;; L W W/L ratios Circuit or systems specifications Analog Integrated Circuit Design M3 vin + VDD M6 M4 M1 Cc vout CL M2 + VBias - M7 M5 VSS Topology DC Currents Fig. 1.1-3 The electrical design requires active and passive device electrical models for - Creating the design - Verifying the design - Determining the robustness of the design CMOS Analog Circuit Design © P.E. Allen - 2010 Page 010-10 Steps in Electrical Design 1.) Selection of a solution - Examine previous designs - Select a solution that is simple 2.) Investigate the solution - Analyze the performance (without a computer) - Determine the strengths and weaknesses of the solution 3.) Modification of the solution - Use the key principles, concepts and techniques to implement - Evaluate the modifications through analysis (still no computers) 4.) Verification of the solution - Use a simulator with precise models and verify the solution - Large disagreements with the hand analysis and computer verification should be carefully examined. 3.2 45 Lecture 010 – Introduction (3/24/10) M11 VDD -A M10 M3 M7 -A M6 -A DD -A V vIN -A + V M1 PB1 M2 M4 M6 M3 M8 -A M10 M5 M7 M9 M11 M5 M4 − VNB1 NB1 M2 M1 V + vIN − ??? M9 M8 VPB1 0601216-02 CMOS Analog Circuit Design © P.E. Allen - 2010 Lecture 010 – Introduction (3/24/10) Page 010-11 What is Physical Design? Physical design is the process of representing the electrical design in a layout consisting of many distinct geometrical rectangles at various levels. The layout is then used to create the actual, three-dimensional integrated circuit through a process called fabrication. CIRCUIT n+ p+ +5V Ground M2 vout (2.5V) M1 M2 vin (2.5V) White Metal Poly p-well n-substrate vout ;; ;;; ;; FABRICATION LAYOUT Blue Green Black Red Orange ;;;;;;;;; ;; ; ;;; ;;;;;;;;; ;;;; ;;;;;;;;; ;; ;; ;; ;;;;;;;;; ;; ;; ;; ;; ;; ;; ;;; ;; ;;; yy;;;; ;; yy p+ M1 p+ n+ n+ p-well n-substra te 031113-01 5V CMOS Analog Circuit Design Lecture 010 – Introduction (3/24/10) vin n -s u b s tr a te © P.E. Allen - 2010 Page 010-12 What is the Layout Process? 1.) The inputs are the W/L values and the schematic (generally from schematic entry used for simulation). 2.) A CAD tool is used to enter the various geometries. The designer must enter the location, shape, and level of the particular geometry. 3.) During the layout, the designer must obey a set of rules called design rules. These rules are for the purpose of ensuring the robustness and reliability of the technology. 4.) Once the layout is complete, then a process called layout versus schematic (LVS) is applied to determine if the physical layout represents the electrical schematic. 5.) The next step is now that the physical dimensions of the design are known, the parasitics can be extracted. These parasitics primarily include: a.) Capacitance from a conductor to ground b.) Capacitance between conductors c.) Bulk resistance 6.) The extracted parasitics are entered into the simulated database and the design is resimulated to insure that the parasitics will not cause the design to fail. CMOS Analog Circuit Design © P.E. Allen - 2010 Lecture 010 – Introduction (3/24/10) Page 010-13 Packaging† Packaging of the integrated circuit is an important part of the physical design process. The function of packaging is: 1.) Protect the integrated circuit 2.) Power the integrated circuit 3.) Cool the integrated circuit 4.) Provide the electrical and mechanical connection between the integrated circuit and the outside world. Packaging steps: Dicing the wafer Attachment of the chip to a lead frame Connecting the chip to a lead frame Encapsulating the chip and lead frame in a package 031115-01 Other considerations of packaging: • Speed • Parasitics (capacitive and inductive) † Rao Tummala, “Fundamentals of Microsystems Packaging,” McGraw-Hill, NY, 2001. CMOS Analog Circuit Design © P.E. Allen - 2010 Lecture 010 – Introduction (3/24/10) Page 010-14 What is Test Design? Test design is the process of coordinating, planning and implementing the measurement of the analog integrated circuit performance. Objective: To compare the experimental performance with the specifications and/or simulation results. Types of tests: • Functional – verification of the nominal specifications • Parametric – verification of the characteristics to within a specified tolerance • Static – verification of the static (AC and DC) characteristics of a circuit or system • Dynamic – verification of the dynamic (transient) characteristics of a circuit or system Additional Considerations: Should the testing be done at the wafer level or package level? How do you remove the influence (de-embed) of the measurement system from the measurement? CMOS Analog Circuit Design © P.E. Allen - 2010 Lecture 010 – Introduction (3/24/10) Page 010-15 ANALOG INTEGRATED CIRCUIT DESIGN SKILLSET Characteristics of Analog Integrated Circuit Design • Done at the circuits level • Complexity is high • Continues to provide challenges as technology evolves • Demands a strong understanding of the principles, concepts and techniques • Good designers generally have a good physics background • Must be able to make appropriate simplifications and assumptions • Requires a good grasp of both modeling and technology • Have a wide range of skills - breadth (analog only is rare) • Be able to learn from failure • Be able to use simulation correctly CMOS Analog Circuit Design © P.E. Allen - 2010 Lecture 010 – Introduction (3/24/10) Page 010-16 Understanding Technology Understanding technology helps the analog IC designer to know the limits of the technology and the influence of the technology on the design. Device Parasitics: Drain Collector RD CGD Gate RG RC Cμ CBD RB Bulk CGB Base CJS RB RSub CGS Connection Parasitics: +5V vin M2 vout Cπ CBS Substrate RS RE Source Emitter 050319-05 M2 vout vin +5V M1 M1 050304-01 CMOS Analog Circuit Design © P.E. Allen - 2010 Lecture 010 – Introduction (3/24/10) Page 010-17 Implications of Smaller Technology on IC Design The good: • Smaller geometries • Smaller parasitics • Higher transconductance • Higher bandwidths The bad: • Reduced voltages • Smaller channel resistances (lower gain) • More nonlinearity • Deviation from square-law behavior The challenging: • Increased substrate noise in mixed signal applications • Threshold voltages are not scaling with power supply • Reduced dynamic range • Poor matching at minimum channel length CMOS Analog Circuit Design © P.E. Allen - 2010 Lecture 010 – Introduction (3/24/10) Page 010-18 Understanding Modeling Modeling: Modeling is the process by which the electrical properties of an electronic circuit or system are represented by means of mathematical equations, circuit representations, graphs or tables. Models permit the predicting or verification of the performance of an electronic circuit or system. Electronic Circuits and Systems Equations, Circuit representations, graphs, tables Prediction or verification of circuit or system performance Electronic Modeling Process 030130-02 Examples: Ohm’s law, the large signal model of a MOSFET, the I-V curves of a diode, etc. Goal: Models that are simple and allow the designer to understand the circuit performance. CMOS Analog Circuit Design © P.E. Allen - 2010 Lecture 010 – Introduction (3/24/10) Page 010-19 Key Principles, Concepts and Techniques of Analog IC Design • Principles mean fundamental laws that Techniques are precise and never change. "Tricks" (Webster – A comprehensive and fundamental law, doctrine, or assumption. The laws or facts of nature underlying the working of an artificial Concepts Analog device.) Information IC Design that enhances Process • Concepts will include relationships, design “soft-laws” (ones that are generally true), analytical tools, things worth remembering. (Webster – An abstract idea generalized Principles (laws) from particular instances.) 040511-01 used in design • Techniques will include the assumptions, “tricks”, tools, methods that one uses to simplify and understand. (Webster – The manner in which technical details are treated, a method of accomplishing a desired aim or goal.) CMOS Analog Circuit Design Analog Design © P.E. Allen - 2010 Lecture 010 – Introduction (3/24/10) Page 010-20 Complexity in Analog Design Analog design is normally done in a non-hierarchical manner and makes little use of repeated blocks. As a consequence, analog design can become quite complex and challenging. How do you handle the complexity? Systems Systems Level (ADC) 1.) Use as much hierarchy as possible. 2.) Use appropriate organization Circuits Level (op amps) techniques. 3.) Document the design in an efficient manner. Circuits Block Level (amplifier) 4.) Make use of assumptions and simplifications. Sub-block Level (current sink) 5.) Use simulators appropriately. Components Components (transistor) 031030-03 CMOS Analog Circuit Design © P.E. Allen - 2010 Lecture 010 – Introduction (3/24/10) Page 010-21 Assumptions Assumptions: An assumption is taking something to be true without formal proof. Assumptions in analog circuit design are used for simplifying the analysis or design. The goal of an assumption is to separate the essential information from the nonessential information of a problem. The elements of an assumption are: 1.) Formulating the assumption to simplify the problem without eliminating the essential information. 2.) Application of the assumption to get a solution or result. 3.) Verification that the assumption was in fact appropriate. Examples: Neglecting a large resistance in parallel with a small resistance Miller effect to find a dominant pole Finding the roots of a second-order polynomial assuming the roots are real and separated CMOS Analog Circuit Design © P.E. Allen - 2010 Lecture 010 – Introduction (3/24/10) Page 010-22 WHERE IS ANALOG IC DESIGN TODAY? Analog IC Design has Reached Maturity There are established fields of application: • Digital-analog and analog-digital conversion • Disk drive controllers • Modems - filters • Bandgap reference • Analog phase lock loops • DC-DC conversion • Buffers • Codecs • Etc. Existing philosophy regarding analog circuits: “If it can be done economically by digital, don’t use analog.” Consequently: Analog finds applications where speed, area, or power have advantages over a digital approach. CMOS Analog Circuit Design © P.E. Allen - 2010 Lecture 010 – Introduction (3/24/10) Page 010-23 Analog IC Design Challenges Technology: • Digital circuits have scaled well with technology • Analog does not benefit as much from smaller features - Speed increases - Gain decreases - Matching decreases - Nonlinearity increases - New issues appear such as gate current leakage Analog Circuit Challenges: • Trade offs are necessary between linearity, speed, precision and power • As analog is combined with more digital, substrate interference will become worse CMOS Analog Circuit Design Lecture 010 – Introduction (3/24/10) © P.E. Allen - 2010 Page 010-24 Digitally Assisted Analog Circuits Use digital circuits which work better at scaled technologies to improve analog circuits that do not necessarily improve with technology scaling. Principles and Techniques: • Open-loop vs. closed loop - Open loop is less accurate but smaller Faster, less power - Closed-loop is more accurate but larger Slower, more power • Averaging - Increase of accuracy Smaller devices, more speed • Calibration - Accuracy increases Increased resolution with same area • Dynamic Element Matching - Enhancement of component precision • Doubly correlated sampling - Reduction of dc influences (noise, offset) Smaller devices, more speed • Etc. CMOS Analog Circuit Design © P.E. Allen - 2010 Lecture 010 – Introduction (3/24/10) Page 010-25 What is the Future of Analog IC Design? • More creative circuit solutions are required to achieve the desired performance. • Analog circuits will continue to be a part of large VLSI digital systems • Interference and noise will become even more serious as the chip complexity increases • Packaging will be an important issue and offers some interesting solutions • Analog circuits will always be at the cutting edge of performance • Analog designer must also be both a circuit and systems designer and must know: Technology and modeling Analog circuit design VLSI digital design System application concepts • There will be no significantly new and different technologies - innovation will combine new applications with existing or improved technologies • Semicustom methodology will eventually evolve with CAD tools that will allow: - Design capture and reuse - Quick extraction of model parameters from new technology - Test design - Automated design and layout of simple analog circuits CMOS Analog Circuit Design © P.E. Allen - 2010 Lecture 010 – Introduction (3/24/10) Page 010-26 NOTATION, TERMINOLOGY AND SYMBOLOGY Definition of Symbols for Various Signals Drain Current Signal Definition Quantity Subscript Example Total instantaneous value of the signal Lowercase Uppercase qA DC value of the signal Uppercase Uppercase QA AC value of the signal Lowercase Lowercase qa Complex variable, phasor, or rms value Uppercase Lowercase Qa of the signal Example: Idm id ID iD t Fig. 1.4-1 CMOS Analog Circuit Design © P.E. Allen - 2010 Lecture 010 – Introduction (3/24/10) Page 010-27 MOS Transistor Symbols D S Enhancement NMOS with VBS = 0V. G Enhancement PMOS with VBS = 0V. G S D D S Enhancement B NMOS with VBS 0V. G Enhancement B PMOS with VBS 0V. G S D D S Simple NMOS symbol G Simple PMOS symbol G S D CMOS Analog Circuit Design © P.E. Allen - 2010 Lecture 010 – Introduction (3/24/10) Page 010-28 Other Schematic Symbols + V - V - Differential amplifier, op amp, or comparator + AvV1 V1 + - I1 + + + V - - Independent voltage sources + + V2 V1 - - Voltage-controlled, voltage source Independent current source I2 GmV1 I1 Voltage-controlled, current source I2 + RmI1 +- V2 AiI1 Current-controlled, voltage source CMOS Analog Circuit Design Current-controlled, current source © P.E. Allen - 2010 Lecture 010 – Introduction (3/24/10) Page 010-29 Three-Terminal Notation QABC A = Terminal with the larger magnitude of potential B = Terminal with the smaller magnitude of potential C = Condition of the remaining terminal with respect to terminal B C = 0 There is an infinite resistance between terminal B and the 3rd terminal C = S There is a zero resistance between terminal B and the 3rd terminal C = R There is a finite resistance between terminal B and the 3rd terminal C = X There is a voltage source in series with a resistor between terminal B and the 3rd terminal in such a manner as to reverse bias a PN junction. Examples IDSS S VGS S D - CDGS + G (a.) G D + D IDS S (b.) BVDGO G - (c.) (a.) Capacitance from drain to gate with the source shorted to the gate. (b.) Drain-source current when gate is shorted to source (depletion device) (c.) Breakdown voltage from drain to gate with the source is open- circuited to the gate. CMOS Analog Circuit Design © P.E. Allen - 2010 Lecture 010 – Introduction (3/24/10) Page 010-30 SUMMARY • Successful analog IC design proceeds with understanding the circuit before simulation. • Analog IC design consists of three major steps: 1.) Electrical design Topology, W/L values, and dc currents 2.) Physical design (Layout) 3.) Test design (Testing) • Analog designers must be flexible and have a skill set that allows one to simplify and understand a complex problem • Analog IC design has reached maturity and is here to stay. • The appropriate philosophy is “If it can be done economically by digital, don’t use analog”. • As a result of the above, analog finds applications where speed, area, or power result in advantages over a digital approach. • Deep-submicron technologies will offer exciting challenges to the creativity of the analog designer. CMOS Analog Circuit Design © P.E. Allen - 2010