TSL257T HIGH-SENSITIVITY LIGHT-TO
... Measured with RL = 10 kΩ between output and ground. Optical measurements are made using small-angle incident radiation from a light-emitting diode (LED) optical source. The input irradiance Ee is supplied by an AlInGaP LED with peak wavelength λp = 640 nm. Irradiance responsivity is characterized ov ...
... Measured with RL = 10 kΩ between output and ground. Optical measurements are made using small-angle incident radiation from a light-emitting diode (LED) optical source. The input irradiance Ee is supplied by an AlInGaP LED with peak wavelength λp = 640 nm. Irradiance responsivity is characterized ov ...
Evaluates: MAX17112 MAX17112 Evaluation Kit General Description Features
... MAX17112 quiescent current. JU1 selects the shutdown mode. See Table 1 for jumper JU1 functions. When the shunt of JU1 is placed in the 1-2 position, the SHDN pin is connected to the on-board capacitor (C10). The internal 5µA current source of the MAX17112 charges this capacitor. When the voltage on ...
... MAX17112 quiescent current. JU1 selects the shutdown mode. See Table 1 for jumper JU1 functions. When the shunt of JU1 is placed in the 1-2 position, the SHDN pin is connected to the on-board capacitor (C10). The internal 5µA current source of the MAX17112 charges this capacitor. When the voltage on ...
0–10 V or 0–20 mA Analog Output Module
... SmartStack™ Module and where the module is located in the point map. The I/O Map is determined by the model number and location within the SmartStack™. The I/O Map is not edited by the user. The Module Setup is used in applications where it is necessary to change the default values of the outputs wh ...
... SmartStack™ Module and where the module is located in the point map. The I/O Map is determined by the model number and location within the SmartStack™. The I/O Map is not edited by the user. The Module Setup is used in applications where it is necessary to change the default values of the outputs wh ...
G = 0.2, Level Translation, 16-Bit ADC Driver AD8275
... operation reduces the power consumption of the amplifier and helps to protect the ADC from overdrive conditions. Internal, matched, precision laser-trimmed resistors ensure low gain error, low gain drift of 1 ppm/°C (maximum), and high common-mode rejection of 80 dB. Low offset and low offset drift, ...
... operation reduces the power consumption of the amplifier and helps to protect the ADC from overdrive conditions. Internal, matched, precision laser-trimmed resistors ensure low gain error, low gain drift of 1 ppm/°C (maximum), and high common-mode rejection of 80 dB. Low offset and low offset drift, ...
HAL 85x Programmable Hall-Effect Sensors with
... compensation, an A/D converter, digital signal processing, an open-drain output or output current source, an EEPROM memory with redundancy and lock function for the calibration data and the output characteristic, a serial interface for programming the EEPROM, and protection devices on all ...
... compensation, an A/D converter, digital signal processing, an open-drain output or output current source, an EEPROM memory with redundancy and lock function for the calibration data and the output characteristic, a serial interface for programming the EEPROM, and protection devices on all ...
Zero-Drift, Single-Supply, Rail-to-Rail I/O Quad, Operational Amplifier
... OUTPUT SWING (V p-p) ...
... OUTPUT SWING (V p-p) ...
ICL7106, ICL7107
... integrator, and comparator. Since the comparator is included in the loop, the A-Z accuracy is limited only by the noise of the system. In any case, the offset referred to the input is less than 10µV. Signal Integrate Phase During signal integrate, the auto-zero loop is opened, the internal short is ...
... integrator, and comparator. Since the comparator is included in the loop, the A-Z accuracy is limited only by the noise of the system. In any case, the offset referred to the input is less than 10µV. Signal Integrate Phase During signal integrate, the auto-zero loop is opened, the internal short is ...
Clipper Datasheet V3
... - MOSFET RdsON measurement - Junction Temperature Measurement - Diode Forward Recovery Measurement - SiC Diode Junction Temperature - Production measurement of thermal interface - Chip SOA sensing - Switching performance measurement ...
... - MOSFET RdsON measurement - Junction Temperature Measurement - Diode Forward Recovery Measurement - SiC Diode Junction Temperature - Production measurement of thermal interface - Chip SOA sensing - Switching performance measurement ...
A 40Gb/s clock and data recovery circuit in 0.18/spl mu/m CMOS
... flipflops efficiently; and (3) isolate the VCO from the data edges coupled through the phase detectors. The PD employs eight flipflops to strobe the data at 12.5ps intervals (Fig. 13.7.3). In a manner similar to an Alexander topology [3], the PD compares every two consecutive samples by means of an ...
... flipflops efficiently; and (3) isolate the VCO from the data edges coupled through the phase detectors. The PD employs eight flipflops to strobe the data at 12.5ps intervals (Fig. 13.7.3). In a manner similar to an Alexander topology [3], the PD compares every two consecutive samples by means of an ...
SN74LS47 BCD to 7−Segment Decoder/Driver
... are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor doe ...
... are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor doe ...
A 40Gb/s Clock and Data Recovery Circuit in 0.18um
... flipflops efficiently; and (3) isolate the VCO from the data edges coupled through the phase detectors. The PD employs eight flipflops to strobe the data at 12.5ps intervals (Fig. 13.7.3). In a manner similar to an Alexander topology [3], the PD compares every two consecutive samples by means of an ...
... flipflops efficiently; and (3) isolate the VCO from the data edges coupled through the phase detectors. The PD employs eight flipflops to strobe the data at 12.5ps intervals (Fig. 13.7.3). In a manner similar to an Alexander topology [3], the PD compares every two consecutive samples by means of an ...
TLV3011-EP, TLV3012-EP
... voltage used affects current consumption due to additional current drawn when the output is in a low state. This effect can be seen in Figure 3. External Hysteresis Comparator inputs have no noise immunity within the range of specified offset voltage (±12 mV). For noisy input signals, the comparator ...
... voltage used affects current consumption due to additional current drawn when the output is in a low state. This effect can be seen in Figure 3. External Hysteresis Comparator inputs have no noise immunity within the range of specified offset voltage (±12 mV). For noisy input signals, the comparator ...
OPERATION MANUAL LDM-1000 LVDT/RVDT Signal Conditioning Module
... screw terminal barrier strips. These plug-in strips are keyed to prevent improper connections in the unlikely event that the LDM1000 should require field replacement. The next few pages will take you, step by step, through the simple set-up and calibration process. This device may be set-up for seve ...
... screw terminal barrier strips. These plug-in strips are keyed to prevent improper connections in the unlikely event that the LDM1000 should require field replacement. The next few pages will take you, step by step, through the simple set-up and calibration process. This device may be set-up for seve ...
Cyclic ADC with Programmable Resolution and Bias Current
... defined references. For an ADC without redundancy the referred comparison allows the circuitry to obtain directly one bit of the conversion result, in such circumstances only one comparator would be required making the distinction between positive and negative input values. The constructed ADC uses ...
... defined references. For an ADC without redundancy the referred comparison allows the circuitry to obtain directly one bit of the conversion result, in such circumstances only one comparator would be required making the distinction between positive and negative input values. The constructed ADC uses ...
Integrating ADC
An integrating ADC is a type of analog-to-digital converter that converts an unknown input voltage into a digital representation through the use of an integrator. In its most basic implementation, the unknown input voltage is applied to the input of the integrator and allowed to ramp for a fixed time period (the run-up period). Then a known reference voltage of opposite polarity is applied to the integrator and is allowed to ramp until the integrator output returns to zero (the run-down period). The input voltage is computed as a function of the reference voltage, the constant run-up time period, and the measured run-down time period. The run-down time measurement is usually made in units of the converter's clock, so longer integration times allow for higher resolutions. Likewise, the speed of the converter can be improved by sacrificing resolution.Converters of this type can achieve high resolution, but often do so at the expense of speed. For this reason, these converters are not found in audio or signal processing applications. Their use is typically limited to digital voltmeters and other instruments requiring highly accurate measurements.