Si3210/15/16 DC-DC CONVERTER
... pin. (See Figure 5.) The circuit is designed to produce equal current flow from VDC to both the SDCL and SDCH pins with zero current flow through Q7. (R20 is set to be equal to R19 and the value of R18 is small.) When current flows through Q7, it generates a voltage drop across R18 and reduces the c ...
... pin. (See Figure 5.) The circuit is designed to produce equal current flow from VDC to both the SDCL and SDCH pins with zero current flow through Q7. (R20 is set to be equal to R19 and the value of R18 is small.) When current flows through Q7, it generates a voltage drop across R18 and reduces the c ...
DC to DC Square Root Transmitters, Isolated API 4440 G
... current for the range of interest plus an accurate DC digital voltmeter for best results. 1. Apply power to the module and allow a minimum 20 minute warm up time. 2. Connect a DC calibrator to the module input. 3. Connect an accurate DC voltmeter (or milliammeter, as required) to the module output ...
... current for the range of interest plus an accurate DC digital voltmeter for best results. 1. Apply power to the module and allow a minimum 20 minute warm up time. 2. Connect a DC calibrator to the module input. 3. Connect an accurate DC voltmeter (or milliammeter, as required) to the module output ...
DM74LS47 BCD to 7-Segment Decoder/Driver with Open
... HIGH level and the ripple-blanking output (RBO) goes to a LOW level (response condition). Note 5: When the blanking input/ripple-blanking output (BI/RBO) is OPEN or held at a HIGH level, and a LOW level is applied to lamp test input, all segment outputs go to a LOW level. ...
... HIGH level and the ripple-blanking output (RBO) goes to a LOW level (response condition). Note 5: When the blanking input/ripple-blanking output (BI/RBO) is OPEN or held at a HIGH level, and a LOW level is applied to lamp test input, all segment outputs go to a LOW level. ...
Evaluation Board User Guide UG-014
... evaluation board is available in standard voltage options. The ADP5022 uses a proprietary high speed, current mode, constant frequency PWM control scheme for excellent stability and transient response. To ensure the longest battery life in portable applications, the ADP5022 features a power save mod ...
... evaluation board is available in standard voltage options. The ADP5022 uses a proprietary high speed, current mode, constant frequency PWM control scheme for excellent stability and transient response. To ensure the longest battery life in portable applications, the ADP5022 features a power save mod ...
TPS54872 数据资料 dataSheet 下载
... The values for these components are selected to provide fast transient response times. Components R1 R2, R3, C1, C2, and C3 forms the loop compensation network for the circuit. For this design, a type 3 topology is used. The transfer function of the feedback network is chosen to provide maximum clos ...
... The values for these components are selected to provide fast transient response times. Components R1 R2, R3, C1, C2, and C3 forms the loop compensation network for the circuit. For this design, a type 3 topology is used. The transfer function of the feedback network is chosen to provide maximum clos ...
ECB and LCD Display Bias Supply with Accurate MAX1729 General Description
... In internal feedback mode, the signal at CTLIN is inversely buffered, level-shifted, and output at COMP through a resistor. Internal resistance (33kΩ typical) and C6 then filter the signal before it is used by the internal feedback network to set VOUT. If temperature compensation is used, the temper ...
... In internal feedback mode, the signal at CTLIN is inversely buffered, level-shifted, and output at COMP through a resistor. Internal resistance (33kΩ typical) and C6 then filter the signal before it is used by the internal feedback network to set VOUT. If temperature compensation is used, the temper ...
Analog Devices Welcomes Hittite Microwave Corporation
... Down Mode will be affected by this filter as the time required to charge the series capacitors is dependent on the filter cut-off frequency. If the input signal has a long traveling distance, and the kick-backs from the ADC not are effectively terminated at the signal source, the input network of fi ...
... Down Mode will be affected by this filter as the time required to charge the series capacitors is dependent on the filter cut-off frequency. If the input signal has a long traveling distance, and the kick-backs from the ADC not are effectively terminated at the signal source, the input network of fi ...
PEAK HOLD DETECTOR PH300
... boot-strap circuit in the input stage of the output buffer amplifier, minimizes the droop error which occurs during periods of long peakhold duration. Inputs to the IN terminal are gated through a linear gate (gate input), which is controlled by a TTL compatible logic signal. When the gate is open ( ...
... boot-strap circuit in the input stage of the output buffer amplifier, minimizes the droop error which occurs during periods of long peakhold duration. Inputs to the IN terminal are gated through a linear gate (gate input), which is controlled by a TTL compatible logic signal. When the gate is open ( ...
MAX551/MAX552 +3V/+5V, 12-Bit, Serial, Multiplying DACs in 10-Pin µMAX Package _______________General Description
... the DAC with all 0s or 1s and adjusting the VREF amplitude or varying R5 until the desired positive or negative output is obtained. In applications where gain trim is not required, omit resistors R1 and R2. If gain trim is desired and the DAC is operated over a wide temperature range, then low-tempc ...
... the DAC with all 0s or 1s and adjusting the VREF amplitude or varying R5 until the desired positive or negative output is obtained. In applications where gain trim is not required, omit resistors R1 and R2. If gain trim is desired and the DAC is operated over a wide temperature range, then low-tempc ...
ADL5310 数据手册DataSheet 下载
... which are set to 3 μA nominal for maximum input range by connecting 665 kΩ resistors between the 2.5 V VREF pins and the IRF1 and IRF2 inputs. Tying VRDZ to VREF effectively sets the x-intercept four decades below the reference current— typically 300 pA for a 3 µA reference. The use of individually ...
... which are set to 3 μA nominal for maximum input range by connecting 665 kΩ resistors between the 2.5 V VREF pins and the IRF1 and IRF2 inputs. Tying VRDZ to VREF effectively sets the x-intercept four decades below the reference current— typically 300 pA for a 3 µA reference. The use of individually ...
MAX17242/MAX17243 3.5V–36V, 2A/3A, Synchronous Buck
... step-down DC-DC converters with integrated MOSFETs operates over a 3.5V to 36V input voltage range, and can operate in drop-out condition by running at 99% duty cycle. The converters deliver up to 2A (MAX17242) and 3A (MAX17243) output current and generate fixed output voltages of 3.3V/5V, along wit ...
... step-down DC-DC converters with integrated MOSFETs operates over a 3.5V to 36V input voltage range, and can operate in drop-out condition by running at 99% duty cycle. The converters deliver up to 2A (MAX17242) and 3A (MAX17243) output current and generate fixed output voltages of 3.3V/5V, along wit ...
Op Amp Output Phase-Reversal and Input Over
... common-mode (CM) voltage is exceeded. It is usually caused when one of the internal stages of the op amp no longer has sufficient bias voltage across it and subsequently turns off. This causes the output voltage to swing to the opposite rail until the input comes back within the commonmode range, as ...
... common-mode (CM) voltage is exceeded. It is usually caused when one of the internal stages of the op amp no longer has sufficient bias voltage across it and subsequently turns off. This causes the output voltage to swing to the opposite rail until the input comes back within the commonmode range, as ...
AP5101 1.5A Step-Down Converter with 1.4MHz Switching Frequency
... On/Off Control Input. Do not leave this pin floating. To turn the device ON, pull EN above 1.2V and to turn it off pull below 0.4V. If enable/disable is not used, connect a 100kΩ resistor between EN to VIN. ...
... On/Off Control Input. Do not leave this pin floating. To turn the device ON, pull EN above 1.2V and to turn it off pull below 0.4V. If enable/disable is not used, connect a 100kΩ resistor between EN to VIN. ...
BD9763FVM
... and the reference voltage, and outputs it to FB pin. The reference voltage is 1V±2%. ・PROTECTION CIRCUIT BLOCK The under voltage lock out circuit is activated to shut down the whole circuit when the VCC voltage is up to 3.8V. When the thermal shutdown circuit detects abnormal heating of the chip (15 ...
... and the reference voltage, and outputs it to FB pin. The reference voltage is 1V±2%. ・PROTECTION CIRCUIT BLOCK The under voltage lock out circuit is activated to shut down the whole circuit when the VCC voltage is up to 3.8V. When the thermal shutdown circuit detects abnormal heating of the chip (15 ...
MAX8740 TFT-LCD Step-Up DC-DC Converter General Description Features
... relatively low, increasing inductance to lower the peak current can decrease losses throughout the power path. If extremely thin high-resistance inductors are used, as is common for LCD panel applications, the best LIR can increase to between 0.5 and 1.0. Once a physical inductor is chosen, higher a ...
... relatively low, increasing inductance to lower the peak current can decrease losses throughout the power path. If extremely thin high-resistance inductors are used, as is common for LCD panel applications, the best LIR can increase to between 0.5 and 1.0. Once a physical inductor is chosen, higher a ...
MAX2205–MAX2208 RF Power Detectors in UCSP General Description Features
... RF signal from a directional coupler at the input, and output a highly repeatable voltage. The output voltage increases monotonically with increasing input power. The output is compensated for temperature and process shifts, reducing the worst-case variation to less than ±1dB at full power and ±2.5d ...
... RF signal from a directional coupler at the input, and output a highly repeatable voltage. The output voltage increases monotonically with increasing input power. The output is compensated for temperature and process shifts, reducing the worst-case variation to less than ±1dB at full power and ±2.5d ...
DOC
... The phase of the output wave relative to the input wave can be determined using a procedure similar to that used for measuring the period of a wave. shows two signals displayed on an oscilloscope. These represent the input to and output from a circuit. Note first that the two signals have the same p ...
... The phase of the output wave relative to the input wave can be determined using a procedure similar to that used for measuring the period of a wave. shows two signals displayed on an oscilloscope. These represent the input to and output from a circuit. Note first that the two signals have the same p ...
AD8627
... Change to General Description………………………………………. 1 Changes to Pin Configurations………………….................................... 1 Change to Specifications table…………………………………………3 Changes to Figure 31…………………………….................................... 10 Changes to Figure 32……………………………........................... ...
... Change to General Description………………………………………. 1 Changes to Pin Configurations………………….................................... 1 Change to Specifications table…………………………………………3 Changes to Figure 31…………………………….................................... 10 Changes to Figure 32……………………………........................... ...
MAX5174/MAX5176 General Description Features
... gain to 1.638V/V and minimizing gain error. The output amplifier has a typical slew rate of 0.6V/µs, and settles to ±0.5LSB from a full-scale transition within 18µs when loaded with 5kΩ in parallel with 100pF. Loads less than 2kΩ degrade performance. For alternative output amplifier setups, refer to ...
... gain to 1.638V/V and minimizing gain error. The output amplifier has a typical slew rate of 0.6V/µs, and settles to ±0.5LSB from a full-scale transition within 18µs when loaded with 5kΩ in parallel with 100pF. Loads less than 2kΩ degrade performance. For alternative output amplifier setups, refer to ...
The Oscilloscope: Operation and Applications
... timebase triggers). The condition for a stable display is not that two waveforms have to be of exactly the same frequency, but that when they are triggered, they have to be in phase. Or nAf1 = mAf2 where n, m are integers. That is not necessary, but it is sufficient. There are many other ways to ach ...
... timebase triggers). The condition for a stable display is not that two waveforms have to be of exactly the same frequency, but that when they are triggered, they have to be in phase. Or nAf1 = mAf2 where n, m are integers. That is not necessary, but it is sufficient. There are many other ways to ach ...
Integrating ADC
An integrating ADC is a type of analog-to-digital converter that converts an unknown input voltage into a digital representation through the use of an integrator. In its most basic implementation, the unknown input voltage is applied to the input of the integrator and allowed to ramp for a fixed time period (the run-up period). Then a known reference voltage of opposite polarity is applied to the integrator and is allowed to ramp until the integrator output returns to zero (the run-down period). The input voltage is computed as a function of the reference voltage, the constant run-up time period, and the measured run-down time period. The run-down time measurement is usually made in units of the converter's clock, so longer integration times allow for higher resolutions. Likewise, the speed of the converter can be improved by sacrificing resolution.Converters of this type can achieve high resolution, but often do so at the expense of speed. For this reason, these converters are not found in audio or signal processing applications. Their use is typically limited to digital voltmeters and other instruments requiring highly accurate measurements.