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... 3 – As an exercise assume that the signal current is 1.67 mA (p-p). Calculate the voltage (p-p) across the capacitor, vAB, and resistor, vB. What is the phase between vB and vAB. Calculate the voltage, vA (p-p), of the applied signal and the phase relative to vB. 4 - Use a dual trace mode. Adjust th ...
Frequently asked questions about phase detectors
Frequently asked questions about phase detectors

... isolation parameter is unimportant. However, in a phase detector application, the RF level is high and thus the RF-IF isolation becomes important. As a rule of thumb, LO-IF isolation is generally less than LO-RF isolation 10 dB less at low frequency, 15-20 dB less at mid- and high-frequency. Q. What ...
IC Technology and Device Models
IC Technology and Device Models

... range of frequency coverage (50kHz to 50MHz is typical), with provision for precise control of amplitude (using resistive divider network called an attenuator). Sweep Generator: It is a signal generator that can sweep its output frequency repeatedly over some range. These are handy for testing circu ...
MK2059-01 - Integrated Device Technology
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... capacitor and VDD pin. The PCB trace to VDD pin should be kept as short as possible, as should the PCB trace to the ground via. Distance of the ferrite bead and bulk decoupling from the device is less critical. 2) The loop filter components must also be placed close to the CHGP and VIN pins. CP shou ...
Lecture 24: Oscillators. Clapp Oscillator. VFO Startup
Lecture 24: Oscillators. Clapp Oscillator. VFO Startup

paper
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... switches connecting the last differential pair DIF F 3 to the input nodes, applying a downwards slope to V in, actively resetting the input. When V in falls below V o, node reset goes low, opening the switches, leaving the input impeadance high, ready to receive the next current pulse. Since the PD ...
THE HANDYMAN`S GUIDE TO OSCILLOSCOPES
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AN-1002 APPLICATION NOTE

... from the PFD and effectively smoothes out the jitter transients inherent in the 1 pps signal from the GPS receiver. Recall that the N/C system uses a damping factor of 150 to attenuate the jitter transients associated with the 1 pps signal from the GPS receiver. This is the case for normal operation ...
8th-Order, Lowpass, Switched-Capacitor Filters General Description Features
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... (V+ = 5V, V- = -5V, filter output measured at OUT pin, 20kΩ load resistor to ground at OUT and OP OUT, fCLK = 100kHz (MAX291/MAX292) or fCLK = 50kHz (MAX295/MAX296), TA = TMIN to TMAX, unless otherwise noted.) ...
1 Homework Assignment 09 Question 1 Electronics engineers are
1 Homework Assignment 09 Question 1 Electronics engineers are

lab 1 – active filters
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V. Oscillators

... The previous relaxation generators were designed from R, C and op-amp or a form of digital logic (see Fig.2, inverters). The next, higher level is the use of ICs generators or oscillators. They are specially design ICs. The most popular are the 555 and its successors. See Fig.3. ...
Tone Decoder
Tone Decoder

... these devices, they will be referred to collectively a s t h e "567" for the remainder of this tone decoder article. The 567 basics The 567 is primarily used a s a low-voltage power switch that turns on whenever it receives a sustained input tone within a narrow range of selected frequency val&s. St ...
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LM567 - tone decoder

AD9830 - Analog Devices
AD9830 - Analog Devices

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... Model MPA2504 PWM power amplifier adopts DC pulse width modulation (PWM) technology with strong functions, its circuit includes two parts: signal processing and power amplification. In this device, when the input signal falls within the range of 0~0.2V, input controls the width modulation of output, ...
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AC_2014mar10

... • Real inductors often have significant resistance (RL) because they contain many meters of wire in their coils. • The signal generator as well has some resistance inside it (Rs is approximately 50 ohms). In our circuit, Rd represents variable decade resistor. • In the formulas, the resistance “R” r ...
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... T he R E O P latypus is an electronic variable trans former with variable output frequency des igned for the us e in tes t labs . T he R E O P latypus provides an adjus table output voltage in the range of 0...300 V AC . T he output voltage given by the voltage s etpoint is continuous ly adjus ted u ...
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... The ADXL193 provides a fully differential sensor structure and circuit path, resulting in the industry’s highest resistance to EMI/RFI effects. This latest generation uses electrical feedback with zero-force feedback for improved accuracy and stability. The sensor resonant frequency is significantly ...
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RFVC1836 数据资料DataSheet下载

... Product Description RFMD's RFVC1836 is a 5V InGaP MMIC VCO with an integrated frequency divider providing additional Fo/2 and Fo/4 outputs. With an Fo frequency range of 10.4GHz to 11.62GHz its monolithic structure provides excellent temperature, shock, and vibration performance. Output power (Fo) i ...
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application note an-229 zero delay buffers
application note an-229 zero delay buffers

< 1 ... 213 214 215 216 217 218 219 220 221 ... 241 >

Phase-locked loop

A phase-locked loop or phase lock loop (PLL) is a control system that generates an output signal whose phase is related to the phase of an input signal. While there are several differing types, it is easy to initially visualize as an electronic circuit consisting of a variable frequency oscillator and a phase detector. The oscillator generates a periodic signal. The phase detector compares the phase of that signal with the phase of the input periodic signal and adjusts the oscillator to keep the phases matched. Bringing the output signal back toward the input signal for comparison is called a feedback loop since the output is ""fed back"" toward the input forming a loop.Keeping the input and output phase in lock step also implies keeping the input and output frequencies the same. Consequently, in addition to synchronizing signals, a phase-locked loop can track an input frequency, or it can generate a frequency that is a multiple of the input frequency. These properties are used for computer clock synchronization, demodulation, and frequency synthesis.Phase-locked loops are widely employed in radio, telecommunications, computers and other electronic applications. They can be used to demodulate a signal, recover a signal from a noisy communication channel, generate a stable frequency at multiples of an input frequency (frequency synthesis), or distribute precisely timed clock pulses in digital logic circuits such as microprocessors. Since a single integrated circuit can provide a complete phase-locked-loop building block, the technique is widely used in modern electronic devices, with output frequencies from a fraction of a hertz up to many gigahertz.
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