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Power System Analysis Prof. A. K. Sinha Department of Electrical
Power System Analysis Prof. A. K. Sinha Department of Electrical

... reduction methods to obtain the Thevenin’s equivalent reactance or impedance between the fault point, and the reference for all the three sequence networks. (Refer Slide Time: 13:17) ...
200-MHz General Purpose Clock Buffer, PCI-X
200-MHz General Purpose Clock Buffer, PCI-X

... Continuous total output current, IO (VO = 0 to VDD) ...
Readout Methods for Arrays of SiPM
Readout Methods for Arrays of SiPM

MAX44265 Rail-to-Rail, 200kHz Op Amp with Shutdown in a Tiny, 6-Bump WLP
MAX44265 Rail-to-Rail, 200kHz Op Amp with Shutdown in a Tiny, 6-Bump WLP

... low operating supply voltage, low input bias current, and rail-to-rail inputs and outputs, the MAX44265 is an excellent choice for precision or general-purpose, lowcurrent, low-voltage, battery-powered applications. This CMOS device consumes an ultra-low 4µA (typ) supply current and has a 200µV (typ ...
MAX195 16-Bit, 85ksps ADC with 10µA Shutdown _______________General Description ____________________________Features
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... places the MAX195 in its 10µA shutdown mode. A logic low on RESET halts MAX195 operation. The rising edge of RESET initiates calibration as described in the Calibration section above. Begin a conversion by bringing CONV low. After conversion begins, additional convert start pulses are ignored. The c ...
Institutionen för systemteknik Department of Electrical Engineering in CMOS
Institutionen för systemteknik Department of Electrical Engineering in CMOS

... Their disadvantage is that the efficiency is poor. Since the transistors conduct current large parts of the period, in addition to, at the same time have a non-zero voltage over it makes the transistor dissipates power. Under ideal circumstances these have an efficiency between 50%-78.5%. In an inte ...
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... solutions. Power saving modes include the ability to reduce power consumption of individual functional blocks, or to power down unused blocks in half-duplex applications. A serial port interface (SPI®) allows software programming of the various functional blocks. An on-chip PLL clock multiplier and ...
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... (An and Bn), one output enable input (OE) and two supply pins (VCC(A) and VCC(B)). VCC(A) can be supplied at any voltage between 1.65 V and 3.6 V and VCC(B) can be supplied at any voltage between 2.3 V and 5.5 V, making the device suitable for translating between any of the voltage nodes (1.8 V, 2.5 ...
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MAX1992/MAX1993 Quick-PWM Step-Down Controllers with Inductor Saturation Protection and Dynamic Output Voltages

... V+ to AGND............................................................-0.3V to +30V VCC to AGND............................................................-0.3V to +6V VDD to PGND............................................................-0.3V to +6V PGOOD, ILIM, SKIP, SHDN to AGND ................ ...
AD9866
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... solutions. Power saving modes include the ability to reduce power consumption of individual functional blocks or to power down unused blocks in half-duplex applications. A serial port interface (SPI®) allows software programming of the various functional blocks. An on-chip PLL clock multiplier and s ...
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... method for regulating output current while maintaining high system efficiency. The LM3429 uses a Predictive Offtime (PRO) control architecture that allows the regulator to be operated using minimal external control loop compensation, while providing an inherent cycle-by-cycle current limit. The adju ...
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... Figure 3: Gang Multiple Outputs Together for Greater Drive Strength ...
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... • As current moves through any circuit, the net change in potential must be zero. • This is because the circuit’s electric energy source, the battery or generator, raises the potential an amount equal to the potential drop produced when the current passes through the resistors. • Therefore, the net ...
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... are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marki ...
Time Varying Harmonic Currents from Large Penetration Electronic
Time Varying Harmonic Currents from Large Penetration Electronic

... The equipment permits the simultaneous and sinchronous sampling of multiple single phase voltage and current signals by using two different acquisition boards dedicated respectively to voltage and current channels. Details about equipment characteristics are reported in [5]-[9]. This chapter deals w ...
Broadband Low-Noise CMOS Mixers for Wireless Communications Fan Jiang
Broadband Low-Noise CMOS Mixers for Wireless Communications Fan Jiang

AXIMA 2000/4000 Installation Manual
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... to control mechanical equipment which can cause injury. Close attention is required to the electrical installation and the system design to avoid hazards either in normal operation or in the event of equipment malfunction. System design, installation, commissioning and maintenance must be carried ou ...
BD00GA3MEFJ-M
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... (2). Connecting the power supply connector backward Connecting of the power supply in reverse polarity can damage IC. Take precautions when connecting the power supply lines. An external direction diode can be added. (3). Power supply lines Design PCB layout pattern to provide low impedance GND and ...
LECTURE 6
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... type to allow selection of different values of attenuation, while maintaining the resistance at the value of Ro. One way of building a continuously variable attenuator is by using ganged rheostats for the resistors in the attenuator.  In either the T or the attenuator all three resistances must be ...
Chaper 5 - cs.csubak.edu
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...  For the circuit shown above, RE >> 1/gm.  R1 and R2 are chosen so that Vb is at the appropriate value and the current that flows thru the divider is much larger than the base current.  Capacitors are chosen to be small compared to 1/gm at the ...
Lecture 22: Multistage Amps - University of California, Berkeley
Lecture 22: Multistage Amps - University of California, Berkeley

BD135/ 137/ 139 NPN Epitaxial Silicon Transistor
BD135/ 137/ 139 NPN Epitaxial Silicon Transistor

... data RAM (DDRAM) and character generator RAM (CGRAM). The IR can only be written from the MPU. The DR temporarily stores data to be written into DDRAM or CGRAM and temporarily stores data to be read from DDRAM or CGRAM. Data written into the DR from the MPU is automatically written into DDRAM or CGR ...
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74ALVT16823 1. General description 18-bit bus-interface D-type flip-flop with reset and enable;

... At recommended operating conditions; voltages are referenced to GND (ground = 0 V); Tamb = −40 °C to +85 °C. ...
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