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VLSI
VERY LARGE SCALE INTEGRATION
Contents
• What is VLSI?
• History behind VLSI
• VLSI Design Flow
• References
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What is VLSI?
• VLSI stands for Very Large Scale Integration.
• It is a technology of integrating thousands of transistors into a
single chip.
• The PC microprocessors, mobile processors, etc. are examples of
VLSI design.
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History behind VLSI
• Jack Kilby at Texas Instruments, in September 1958, he had his first
integrated circuit ready, which had all the components and the chip
out of the same semiconductor material.
• Although the first integrated circuit was crude and had some
problems, the idea was groundbreaking.
• By making all the parts out of the same block of material and
adding the metal needed to connect them as a layer on top of it,
there was no need for discrete components.
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History behind VLSI (Continue …)
• From here, the idea of integrating all components on a single silicon
wafer came into existence.
• This led to development in small-scale integration (SSI) in the early
1960s, medium-scale integration (MSI) in the late 1960s, and then
large-scale integration (LSI) as well as VLSI in the 1970s and 1980s,
with tens of thousands of transistors on a single chip (later
hundreds of thousands, then millions, and now billions (10 9)).
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VLSI Design Flow
• Here are various stages of VLSI design:
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Architecture
Design specification
RTL coding
RTL verification
Synthesis
Gate level simulation
Place and Route
Fabrication
Post Silicon validation
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VLSI Design Flow (Continue …)
• Architecture
• Collect product’s requirements.
• Define high-level block diagram and their functionality.
• Estimate die-size and power requirement.
• Design specification
• Define micro architecture of all the blocks.
• Define inter-block communication interfaces.
• Estimate latency, die-size and power.
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VLSI Design Flow (Continue …)
• RTL coding
• Coding of each block as per micro architecture using HDL (Hardware
Description Language) at RTL (Register Transfer Level).
• Top level integration of all blocks.
• RTL verification
• Verify each block, individually and entire design after integration, for
functionality and performance requirements.
• Any problem found at this stage may lead to change in RTL coding or
architecture design.
• All normal and corner case scenarios are been verified.
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VLSI Design Flow (Continue …)
• Synthesis
• Synthesis tool converts RTL code to netlist.
• Netlist consists of gate level description of RTL code.
• Gate level simulation
• Netlist is been verified for desire functionality.
• This is use to check the validity of gate conversion.
• Place and Route
• The gates within netlist are place and route on die.
• This process is use to fix any timing violation of netlist.
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VLSI Design Flow (Continue …)
• Fabrication
• Properly placed and routed netlist will finally go for fabrication.
• There are various fabrication technologies based on transistor channel
length, e.g. 90nm, 35nm, 22nm. (nm stands for nano meter)
• Post Silicon validation
• Once the fabrication is done, integrated circuit is verified to check integrity
of fabrication using scan chain and ATPG (Automatic Test Pattern
Generation).
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References
• Wikipedia
• http://en.wikipedia.org/wiki/Very-large-scale_integration
• Asic world
• http://asic-world.com
• For more information
• Send an e-mail to [email protected]
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Thank You
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