Download Problems to resolve:

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Wideband Tuner Project
Problems to resolve:
1. 1st LO – Fundamental Frequency of the VCO is leaking through filters and
doubler.
The following spreadsheet shows that there is a significant 9 dB ripple in the
“passband” of the LO (2-4 GHz). It also show that, when the 2 dB attenuator
(AT3) is in place between the LPF (FL1) and HPF (FL2), the VCO spur leaks
through much more than when AT3 is replaced with a 10 dB attenuator.
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Fig 1 – Output of 1st LO with 2 dB or 10 dB attenuator in place of AT3
C:\Documents and Settings\wooten\My Documents\aProjects\IED\LO1\1st LO
VCO rejection.xls
5-2-05 We found that the output match of the 1st LO was really bad. Thus the
measurements above are not correct. The following is the measurements of the output
of the 1st LO at C18 (We tombstoned C18 and attached a launcher).
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5-3-05
Jeff Keefer and I did an analysis of the power at every place in the chain on the 1st LO. We found that
U2 was severely compressed; it was 5 dB above its P1dB point. We replaced AT4, a 3 dB attenuator,
with a 10 dB attenuator and re-ran the measurements:
This output is much better than when we
were overdriving U2. Jeff believes that
this was due to power supply leakage
from the amplifier.
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5-20-05 We have decided to use two different amplifiers (see 12) on the IF1 board
that drive the mixer. We are using two different paths for the LO. One path passes
the 2-3 GHz LO frequencies and the other passes the 3-4 GHz LO frequencies.
Now, we can put separate high pass filters into each path that will reject the
VCO spurs.
2. Design two filters for the 1st IF. One that passes 2-3 GHz and rejects 1-1.5 GHz
and one that passes 3-4 GHz and rejects 1.5-2 GHz.
6-2-05 Began the design of these filters today. Found that a 9th order elliptical
filter can easily get the job done for the 3-4 GHz, maybe a 7th order elliptical filter
would work well enough and have less components.
3. What is the purpose of the “attenuator filter” (fig. 2) on the 1st IF board?
Maybe it is a simple gain slope compensation network.
Fig. 2
The response of this circuit is plotted in the following figure.
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Fig. 3
4. What is the DC – 3 GHz response of the pre-selector filters?
The .pdf files for the pre-selector filters are in the following folder. There are data
that have a .3 – 3000 MHz calibration as well as a close in calibration for each filter.
C:\Documents and Settings\wooten\My Documents\aProjects\IED\Preselector\Filter
Data
5. Power supply has an inductor with too much series resistance.
Giving this problem to Jack Roher. Also, asking him to review general power
supply design and make suggestions for improvement.
6. What is the response time of the overload protection circuit? (If the Rx input
power gets too high, an overload attenuation of 26 dB is switched on. 10 dB of
this atten. is in front of the LNA, the other 16 dB comes from the MSB of the
programmable attenuator after the preselector filter bank.)
5-23-05
Jack Contreras is working on this in the lab.
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7. 2nd LO – When the divider is not in use, it oscillates. We believe this is due to it
not being terminated in 50 Ω when our HMC194 switch selects the other path.
We believe that the solution to this would be to use two absorptive switches to
replace U1 and U2 (HMC194). Currently there are about 3 or 4 different
absorptive switch candidates. The specs that we are looking for are as follows:
SPDT switch – 850 – 6000 MHz, absorptive, positive control logic (negative
can be used if necessary), high isolation (at least 40 dB at 2 GHz), low cost
(~$2-3)
The current candidates are HMC270, HMC336, and AS196-307 (Skyworks).
I think we are going to use the HMC270. The only problem with this part is that it
requires negative control logic. I really like the HMC336, even though it is less
broadband than HMC270, because it can take positive logic.
8. 1st LO Doubler (U3) – I found a doubler that meets all of our specs, but is much
less expensive ($30 vs. $3). The new doubler is HMC187.
I have ordered the eval board for HMC187. I got the eval board for HMC187 on
5-1-05.
5-23-05
Going to give the evaluation of this board to Jack.
9. 1st LO – Need replacement for obsolete part NGA-489
7-5-05
Found the replacement – Sirenza’s SBA-4089
10. 2nd IF – Look at Variable Attenuator
We have decided to get rid of the variable attenuator and the analog agc
5-23-05
We may take this attenuator out because we don’t believe that we will be using
the analog AGC function. Lars (from Network Fab) still wants RSSI functionality
as an output of this board.
We did decide to take this analog AGC function out.
11. Analyze the peregrine LO. Also, compare the pin-outs of PE3240 and 3342.
4-18-05 Tyson, add to your list:
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The existing PLL that takes a 10 MHz input and locks the 100 MHz OCXO on page 2
of the 2nd LO board will be replaced by the new part I am pursuing. I have not yet
looked at the pinout, but I believe the new part has 2 more pins. The easiest way to
deal with this in the short term would be to get the programming kit in and samples,
and program our parameters into the part via EEPROM. If we could rig in the new
part in place of the old (and disconnect the 3-wire interface that previously controlled
it), via white wires, etc. then we could demonstrate the new part functions.
This is not a top priority task, and it is possible that we could use the eval board to
demonstrate the proper functionality of the part, and just design it in to the next rev of
the board.
4-25-05 Tyson, I am thinking of additional applications for the PE3342 aside from the
10 MHz to 100 MHz PLL...
Since the chip can be pre-programmed, my thought is that we could replace the DDS
on the 2nd LO board by 2 separate PLLs, one for the 2063.2 MHz LO and the other
for the 1726.4 MHz part (which gets divided down to 863.2 MHz).
For the 2063.2, we would synthesize a frequency instead of 2062.5 MHz, which
would actually be 100 MHz / 8 for fcomp, and Fout / 165. The loop filter would be the
same topology as now, driving the same VCO. The actual frequency would be
100/8*165. The only frequencies that would be generated by the PLL would be
multiples of 12.5 MHz, and hopefully we would be able to do a better job of
controlling the garbage coming out. The LO frequency would end up being about 0.7
MHz off of center.
For the 1726.4, which is 863.2 * 2, we would synthesize a frequency instead of
1727.27... MHz, which would actually be 100 MHz / 11 for fcomp, and Fout / 190. The
loop filter would be the same topology as now, driving the same VCO. The actual
frequency would be 100/11*190. The only frequencies that would be generated by
the PLL would be multiples of 9.09 MHz, and hopefully we would be able to do a
better job of controlling the garbage coming out. The LO frequency would end up
being 863.63... MHz, which is only about 0.43 MHz off of center.
To test this out, we would need to modify the loop filter, and I think that a good
starting point would be the eval board that Peregrine sells. I am pursuing getting this
in. After getting the eval board functional, we could replace the VCO with the Zcomm
VCO we are using, and feed the 100 MHz into the eval board, after programming a
part for one of the above configurations. The loop filter would either be modified on
the eval board with the same topology they use, or we would replace it with our
topology.
I think that a good place to start, though, is to evaluate the frequencies generated on
the as-is eval board to see how spectrally pure the PLL is.
Jeff
5-23-05
Update to above: Jeff thinks that we will not be able to do away with the DDS. Thus
we will probably not use the PE3342 for the 2 nd LO.
4-25-05 Tyson, could you add to our list to-do the following:
compare the pin-out of the PE3240 and the PE3342 (both the TSSOP pacs) to see
how hard it would be to insert the PE3342 onto the existing 2nd LO PCB. Is it
doable? (PS - you can assign this to Jack if you like).
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Jeff
5-20-05 I have set up the PE3342-EK eval board and I can program it with my
computer using the provided program from Peregrine Semiconductor.
7-20-05 I am planning to put kludge in the PE3342 part onto the 1st LO / Ref
board in order to verify that it will lock to the 100 MHz reference that we need. I
am going to replace the PE3240 that is currently on the board with a programmed
PE3342. Also see # 16 for info on the design of the loop filter.
12. There is an amplifier on the 1st IF board that costs $150. Jeff sent me the
following email about it:
Tyson, here's another task for the Master Googler (you)
The Metelics amplifier that we are using (24.5 dBm P1dB, 2-4 GHz) for driving the 23
dBm mixer LO input costs $145. Could we do better (equivalent cost, size)
elsewhere? Looking at the Hittite website, I don't see a direct competitor, but I think
that a combination of HMC414MS8G (for 2-3 GHz) and HMC327MS8G (for 3-4 GHz)
might work, if they are oodles lower in cost. In that case, we would have to add
switches, etc. so the overall cost and size might not justify it. But could you look
around and see if there is anything that would be more cost effective (or does it make
sense to do a kludge like the 2 amps above embedded in switches)? If we save $100
that whould be huge -- probably about 5% of the cost.
Jeff
I think I have found two amps that can replace this thing. They are SHF-0189 and
SHF-0289 from sirenza. They both operate from DC-6 GHz. The SHF-0189 has
15 dB of gain at 2.5 GHz, a P1dB point of 27 dBm and is $3.04 in qty of 30004999. The SHF-0289 has 10 dB of gain at 2.5 GHz, a P1dB point of 30 dBm and
is $4.43 in qty of 3000-4999. The 0189 is better because it has a higher gain at 4
Ghz; 10 dB whereas the 0289 has only 5 dB of gain.
There are a lot of issues that go along with this SHF-0189. (1) We have to have an
input matching network. (2) It needs Vds = 8V, currently we have only 20 V
available, thus we need a DC-DC converter to create the 8V. (3) We have to
design a compensation filter to create a flat gain slope. (4) It requires a lot of
thermal consideration.
We found a better part for this application!!! It is from Macom, part number
MAAPGM0027. It will work with 5V supply with 20-25 dB of gain, 24-25 dBm
P1dB. It has an on-chip bias network and is fully matched to 50 ohms on both
input and output. The only problem that I see with it is that there is a 5 dB gain
ripple across 2-4 GHz. Can the mixer can handle this much variation in LO
drive power? The problem that I have with this part is that it is still around $ 40
in quantities of 100.
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5-19-05 We think there is an even better/cost effective solution for this problem.
We are going to use two inexpensive Hittite amplifiers as defined in Jeff Keefer’s
email (above). The reason for two different amps is that we can not find a cheap
amplifier that conforms to all of our requirements. We are going to use two
transfer switches that, when selecting one amp, the other will be terminated. This
configuration also relaxes the filtering for the LO, thus we do not need an
elliptical filter for this section.
13. What are the spurs of the 2nd LO? 900 and 2000 MHz.
Jeff Keefer is working on this.
14. IF2: Why does the LO amplifier have a 1.8 nH inductor in series with its input?
I set up a simulation in ADS to analyze this circuit:
The following is the s-parameter analysis with the inductor:
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The following is the s-parameter analysis without the inductor:
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It seems that the inductor was put here to provide impedance matching for the
amplifier. Notice that S11 is much better with the inductor than without, but the
output match is worse with the inductor by about 3 dB (return loss).
15. What should the capacitance be for the DC blocks and the RF bypass capacitors
on the IF2 board?
We are trying to save money by going with “garden variety” caps for our dc
blocks. The caps that we were using on the 2nd IF were not correct. Our “garden
variety” caps are from AVX (i.e. ceramic, NPO 5% 50V, 82pF, part#
06035A820JAT2A). For the 2140 path we were using 100pF, but my analysis
shows that the impedance of this cap at that frequency is ~6 Ω (See following
figure).
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Using the above program I found that the best capacitor to use is 10 pF. This cap’s series
resonant frequency is 2250 MHz, which is just above the highest frequency, 2200 MHz,
that we want to pass through it. Similarly, for the 940 MHz path, I am changing the
capacitor value to 47 pF. For the broadband case where we want to pass both 940 and
2140 MHz we are going to use an ATC100A 100 pF capacitor. By analyzing the Sparameters I have come to the conclusion that this is the best choice for passing our
frequencies of interest.
For broadband bypassing applications of 900-2200 MHz, I am going to place the 10 pF
cap as close to the Vdd pin of the parts, then the 47 pF cap is next. The 47 pF cap should
be isolated from the 10 pF cap.
For the 55-99 MHz 2nd IF band I am going to use 4700 pF. This capacitance’s series
resonant frequency is just above 100MHz which makes it a good bypass cap. I am using
the AVX X7R dielectric. This value has an impedance of .464 Ω at 55 MHz.
16. 6-22-05
Jeff Keefer tasked me with the following assignment:
Complete the portion of the 2nd LO board containing the 10 to 100 MHz PLL. Take the existing
design which locks the 100 MHz OCXO to an external 10 MHz signal, and modify the design to
use the new PE3342 part. You have at your disposal the eval board design, the datasheet, the
old design,etc. -- check the loop filter characteristics and make sure we have a good loop (not
underdamped).For now, don't be concerned with the 100 MHz signal split at the output, I need to
do a little more architectural work on that part first. When you finish it, give a copy to me and a
copy to Jess. I am hoping you can turn this in 2 days or less.
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I have figured out what the loop bandwidth should be by using Dean’s book
equations on page 37. I found the 1 Hz phase noise floor of the PE3342 by taking
the SSB Phase Noise on pg. 5 of the data sheet and plugging it into Dean’s
equation:
-75 dBc/Hz – 20log(1300MHz/1.25MHz) – 10log(1.25MHz) = -196 dBc/Hz
Then I found what the phase noise is when the comparison frequency is 10 MHz
and the output frequency is 100 MHz (N = 10)
-196 + 10log(10MHz) + 20log(100MHz/10MHz) = -106 dBc/Hz
Then, to find what the optimal loop bandwidth should be, I found where the phase
noise of the crystal intersects this point which is ~10 Hz.
If I plug in 10 Hz and 75 degrees of phase margin into the excel spreadsheet
(found online on peregrine’s website) I get capacitors that are way too large for
our application. Thus I made the loop-bandwidth 230 Hz so that the caps are both
1 μF.
17. 6-22-05
Jeff Keefer tasked me with the following assignment:
For the preselector board, generate the AD831 mixer circuit, excluding the input filter, which I will
design. I think you know our operating conditions -- input LO is 100 MHz coming from off-board
(this is turned off when the band is not selected). The RF input is up converted to 120 to 160 MHz
and passed through the filter that you designed (take an initial stab at the component values; I
think you already have them, right? If you don't, then make sure you at least have the topology
right. I am hoping you can turn this in 3 days or less.
The AD831 has an output amplifier built in that we are not using. I asked tech
support if we could somehow shut the amp off in order to save current, but he said
that it was not possible. He also said that a resistor should be placed in between
the VFB and Out pins in order to provide feedback (so that the amp does not
oscillate I am assuming).
Another interesting feature about this chip is that the collectors of the transistors
connected to IFN and IFP match the impedance of whatever they “see” (i.e., if
you connect 50 Ω resistors to IFN and IFP then the output impedance of the part
will be 50 Ω). The amount of voltage swing is dependant on the output impedance
of the transistors and, after talking it over with Jeff Keefer, I believe that if the
IFN and IFP pins see a higher resistance, the mixer will have a higher P1dB. Thus
I am using a 2:1 turns ratio transformer on the IFN and IFP pins.
18. 6-30-05
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I ordered Rogers sample material for the program. We are using RO4350B with
13.3 mil height and 1 oz. copper on both sides. It has dielectric constant of 3.48.
19. 7-18-05
Talked with J.K. about what material we are planning on using for the preselector
board. He said that we will probably use Rogers RO4350B with 20 mil dielectric
height and 1 oz. copper on both sides. It has a dielectric constant of 3.48. He said
that this board will probably be larger than the old board, which was 62 mils, and
this could pose a problem because components may not be able to fit in the box if
we change the height of this board. Ordered the material today.
20. 7-18-05
Jeff asked me, this morning, to look at the LO leakage out of the ANT port (J2).
He wanted to know what it should be and what it actually is. When I looked at the
LO leakage on J2 I noticed that the power (~ -90 to -60 dBm) of the leakage
changed depending on where I waved my hand across the unit (the large main
cover was not installed). Installing the main cover did not help the spur. I also
noticed that the leakage got much better (~ -95 dBm) when I touched the digital
interconnect wires connecting the 1st IF and the digital board.
Because the physical test of LO leakage was inconclusive, I am beginning to
analyze what power we should be getting based on the component characteristics
(LO to RF isolation of 1st IF mixer, reverse isolation of amps, and measured
rejection of filters).
LO to RF isolation of M8TH (Z1, 1st IF mixer) is guaranteed to be at least 22 (35
typ.) dB from .01 – 3.4 GHz, 30 (37 typ.) dB from .01 – 1.5 GHz.
The LO drive level of M8TH is 23 dBm.
The reverse isolation (S12) of SGA-6289 (U1, amp) is 19 dB up to 2.4 GHz and
18 at 3.5 GHz.
We are going to use a mini-circuits LPF for FL1 on the 1st IF, LFCN-2850. We
are also going to use LFCN-2400 in the 1800-2400 MHz preselector path.
I have compiled a spreadsheet that shows what the 1st LO leakage should be.
21. 2nd IF lumped element 76.8 MHz bandpass filter
7-21-05
Jack Contreras did S-Parameter measurements for this filter on 6-9-05. The
following are measured and simulated plots of the filter:
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The measured and simulated responses are practically identical!!! Now, I get to
redesign this filter so that its characteristics are much better.
22.
PCB Stuff
May-5-5
Gateway Laser is a company that does laser etching and via hole creation. They can do 1
mil x 1 mil widths and can cut on duroid board. They can also create really good small
vias with very tight tolerances. They do not create pcb’s.
http://gatewaylaser.com/materials.html