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NDS0605
P-Channel Enhancement Mode Field Effect Transistor
General Description
Features
These P-Channel enhancement mode field effect
transistors are produced using Fairchild’s proprietary,
high cell density, DMOS technology. This very high
density process has been designed to minimize onstate resistance, provide rugged and reliable
performance and fast switching. They can be used, with
a minimum of effort, in most applications requiring up to
180mA DC and can deliver current up to 1A.
This product is particularly suited to low voltage
applications requiring a low current high side switch.
• −0.18A, −60V. RDS(ON) = 5 Ω @ VGS = −10 V
• Voltage controlled p-channel small signal switch
• High density cell design for low RDS(ON)
•
High saturation current
D
D
S
SOT-23
G
G
Absolute Maximum Ratings
Symbol
S
TA=25oC unless otherwise noted
Parameter
Ratings
Units
VDSS
Drain-Source Voltage
−60
V
VGSS
Gate-Source Voltage
±20
V
ID
Drain Current
−0.18
A
– Continuous
(Note 1)
−1
– Pulsed
Maximum Power Dissipation
PD
(Note 1)
Derate Above 25°C
TJ, TSTG
TL
Operating and Storage Junction Temperature Range
Maximum Lead Temperature for Soldering
Purposes, 1/16” from Case for 10 Seconds
0.36
2.9
W
mW/°C
−55 to +150
°C
300
°C
350
°C/W
Thermal Characteristics
RθJA
Thermal Resistance, Junction-to-Ambient
(Note 1)
Package Marking and Ordering Information
Device Marking
Device
Reel Size
Tape width
Quantity
65D
NDS0605
7’’
8mm
3000 units
2002 Fairchild Semiconductor Corporation
NDS0605 Rev B1(W)
NDS0605
July 2002
Symbol
Parameter
TA = 25°C unless otherwise noted
Test Conditions
Min Typ Max
Units
Off Characteristics
BVDSS
∆BVDSS
∆TJ
IDSS
IGSS
Drain–Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
ID = –10 µA
VGS = 0 V,
ID = –10 µA,Referenced to 25°C
Zero Gate Voltage Drain Current
VDS = –48 V,
Gate–Body Leakage.
On Characteristics
VGS(th)
–60
V
mV/°C
–53
–1
µA
VDS = –48 V,VGS = 0 V TJ = 125°C
–500
µA
VGS = ±20 V,
VDS = 0 V
±100
nA
VDS = VGS,
ID = –250 µA
VGS = 0 V
(Note 2)
∆VGS(th)
∆TJ
RDS(on)
Gate Threshold Voltage
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
ID(on)
gFS
–1
ID = –250 µA,Referenced to 25°C
On–State Drain Current
VGS = –10 V, ID = –0.5 A
VGS = –4.5 V, ID = –0.25 A
VGS = –10 V,ID = –0.5 A,TJ=125°C
VGS = –10 V, VDS = – 10 V
–0.6
Forward Transconductance
VDS = –10V,
ID = – 0.2 A
0.07
VDS = –25 V,
f = 1.0 MHz
V GS = 0 V,
–1.7
3
–3
1.0
1.3
1.7
5.0
7.5
10
V
mV/°C
Ω
A
0.43
S
79
pF
10
pF
4
pF
VGS = –15 mV, f = 1.0 MHz
10
Ω
VDD = –25 V,
VGS = –10 V,
2.5
5
ns
ns
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
RG
Gate Resistance
Switching Characteristics
(Note 2)
td(on)
Turn–On Delay Time
tr
Turn–On Rise Time
6.3
12.6
td(off)
Turn–Off Delay Time
10
20
ns
tf
Turn–Off Fall Time
7.5
15
ns
1.8
2.5
Qg
Total Gate Charge
Qgs
Gate–Source Charge
Qgd
Gate–Drain Charge
VDS = –48 V,
VGS = –10 V
ID = – 0.2 A,
RGEN = 6 Ω
ID = –0.5 A,
nC
0.3
nC
0.4
nC
Drain–Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain–Source Diode Forward Current
VSD
trr
Drain–Source Diode Forward
Voltage
Diode Reverse Recovery Time
Qrr
Diode Reverse Recovery Charge
VGS = 0 V,
IS = –0.5 A(Note 2)
IF = –0.5A
diF/dt = 100 A/µs
(Note 2)
–0.8
–
0.18
–1.5
A
V
17
nS
15
nC
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.
a) 350°C/W when mounted on a
minimum pad..
Scale 1 : 1 on letter size paper
2.
Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0%
NDS0610 Rev B1(W)
NDS0605
Electrical Characteristics
NDS0605
Typical Characteristics
VGS=-10V
-ID, DRAIN CURRENT (A)
2.2
-4.5V
-4.0V
-6.0V
1.2
RDS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
1.4
-3.5V
1
0.8
-3.0V
0.6
0.4
-2.5V
0.2
0
2
VGS=-3.0V
1.8
1.6
-3.5V
1.4
-4.0V
-4.5V
1.2
-6.0V
-10V
1
0.8
0
1
2
3
4
5
6
0
0.2
0.4
-VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 1. On-Region Characteristics.
1
1.2
1.4
5
ID = -0.5A
VGS = -10V
1.6
ID = -0.25A
RDS(ON), ON-RESISTANCE (OHM)
RDS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
0.8
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
1.8
1.4
1.2
1
0.8
0.6
0.4
-50
-25
0
25
50
75
100
125
4
3
TA = 125oC
2
1
TA = 25oC
0
150
2
TJ, JUNCTION TEMPERATURE (oC)
4
6
8
10
-VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. On-Resistance Variation with
Temperature.
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
10
1.2
25oC
TA = -55oC
1
-IS, REVERSE DRAIN CURRENT (A)
VDS = -10V
-ID, DRAIN CURRENT (A)
0.6
-ID, DRAIN CURRENT (A)
125oC
0.8
0.6
0.4
0.2
VGS = 0V
1
TA = 125oC
0.1
25oC
0.01
-55oC
0.001
0.0001
0
1
1.5
2
2.5
3
3.5
4
-VGS, GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics.
4.5
0.2
0.4
0.6
0.8
1
1.2
-VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
NDS0610 Rev B1(W)
NDS0605
Typical Characteristics
100
VDS = -12V
ID = -0.5A
8
80
-48V
6
4
60
40
COSS
2
20
0
0
CRSS
0
0.4
0.8
1.2
1.6
2
0
10
Qg, GATE CHARGE (nC)
30
40
50
60
Figure 8. Capacitance Characteristics.
5
RDS(ON) LIMIT
1
P(pk), PEAK TRANSIENT POWER (W)
10
100us
1ms
10ms
100ms
1s
0.1
10s
DC
VGS = -10V
SINGLE PULSE
RθJA = 350oC/W
0.01
TA = 25oC
0.001
1
10
100
SINGLE PULSE
RθJA = 350°C/W
TA = 25°C
4
3
2
1
0
0.01
0.1
-VDS, DRAIN-SOURCE VOLTAGE (V)
1
10
100
t1, TIME (sec)
Figure 9. Maximum Safe Operating Area.
r(t), NORMALIZED EFFECTIVE TRANSIENT
THERMAL RESISTANCE
20
-VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics.
-ID, DRAIN CURRENT (A)
f = 1 MHz
VGS = 0 V
CISS
-24V
CAPACITANCE (pF)
-VGS, GATE-SOURCE VOLTAGE (V)
10
Figure 10. Single Pulse Maximum
Power Dissipation.
1
D = 0.5
RθJA(t) = r(t) * RθJA
0.2
0.1
o
RθJA = 350 C/W
0.1
0.05
0.01
P(pk)
0.02
0.01
t1
t2
TJ - TA = P * RθJA(t)
Duty Cycle, D = t1 / t2
SINGLE PULSE
0.001
0.0001
0.001
0.01
0.1
1
10
100
1000
t1, TIME (sec)
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1a.
Transient thermal response will change depending on the circuit board design.
NDS0610 Rev B1(W)
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NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
2. A critical component is any component of a life
1. Life support devices or systems are devices or
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. I1