Download FDD6637 35V P-Channel PowerTrench MOSFET August 2006

FDD6637
35V P-Channel PowerTrench MOSFET
General Description
Features
This P-Channel MOSFET has been produced using
• –55 A, –35 V
Fairchild Semiconductor’s proprietary PowerTrench
RDS(ON) = 11.6 mΩ @ VGS = –10 V
RDS(ON) = 18 mΩ @ VGS = –4.5 V
technology to deliver low Rdson and optimized Bvdss
• High performance trench technology for extremely
capability to offer superior performance benefit in the
low RDS(ON)
applications.
• RoHS Compliant
Applications
•
Inverter
•
Power Supplies
D
D
G
G
S
D-PAK
TO-252
(TO-252)
S
Absolute Maximum Ratings
Symbol
T A =25 oC unless otherwise noted
Parameter
VDSS
Drain-Source Voltage
VDS(Avalanche)
Drain-Source Avalanche Voltage (maximum)
VGSS
Gate-Source Voltage
ID
Continuous Drain Current
PD
Power Dissipation
TJ, TSTG
(Note 4)
Ratings
Units
–35
V
–40
V
±25
V
A
@TC=25°C
(Note 3)
–55
@TA=25°C
(Note 1a)
–13
Pulsed
(Note 1a)
–100
@TC=25°C
(Note 3)
57
@TA=25°C
(Note 1a)
3.1
@TA=25°C
(Note 1b)
W
1.3
Operating and Storage Junction Temperature Range
–55 to +150
°C
°C/W
Thermal Characteristics
RθJC
Thermal Resistance, Junction-to-Case
(Note 1)
2.2
RθJA
Thermal Resistance, Junction-to-Ambient
(Note 1a)
40
RθJA
Thermal Resistance, Junction-to-Ambient
(Note 1b)
96
Package Marking and Ordering Information
Device Marking
Device
Package
Reel Size
Tape width
Quantity
FDD6637
FDD6637
D-PAK (TO-252)
13’’
12mm
2500 units
2006 Fairchild Semiconductor Corporation
FDD6637 Rev C2(W)
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FDD6637 35V P-Channel PowerTrench MOSFET
August 2006
Symbol
Parameter
T A = 25°C unless otherwise noted
Test Conditions
Min
Typ
Max Units
Drain-Source Avalanche Ratings
EAS
IAS
Drain-Source Avalanche Energy
(Single Pulse)
Drain-Source Avalanche Current
VDD = -35 V, ID= -11 A, L=1mH
61
mJ
–14
A
Off Characteristics(Note 2)
IDSS
Drain–Source Breakdown
Voltage
Zero Gate Voltage Drain Current
VDS = –28 V,
IGSS
Gate–Body Leakage
VGS = ±25 V,
BVDSS
On Characteristics
VGS = 0 V,
ID = –250 µA
–35
V
VGS = 0 V
VDS = 0 V
–1
µA
±100
nA
–3
11.6
18
19
mΩ
(Note 2)
VGS(th)
Gate Threshold Voltage
RDS(on)
Static Drain–Source
On–Resistance
gFS
Forward Transconductance
VDS = VGS, ID = –250 µA
VGS = –10 V,
ID = –14 A
VGS = –4.5 V, ID = –11 A
VGS = –10 V, ID = –14 A, TJ=125°C
VDS =–5 V,
ID = –14 A
–1
–1.6
9.7
14.4
14.7
35
V
S
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
RG
Gate Resistance
Switching Characteristics
VDS = –20 V,
f = 1.0 MHz
V GS = 0 V,
f = 1.0 MHz
2370
pF
470
pF
250
pF
3.6
Ω
(Note 2)
td(on)
Turn–On Delay Time
18
32
ns
tr
Turn–On Rise Time
VDD = –20 V,
ID = –1 A,
10
20
ns
td(off)
Turn–Off Delay Time
VGS = –10 V,
RGEN = 6 Ω
62
100
ns
tf
Turn–Off Fall Time
36
58
ns
Qg
Total Gate Charge, VGS = –10V
45
63
nC
Qg
Total Gate Charge, VGS = –5V
25
35
nC
Qgs
Gate–Source Charge
7
nC
Qgd
Gate–Drain Charge
10
nC
FDD6637 Rev. C2(W)
VDS = – 20 V, ID = –14 A
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FDD6637 35V P-Channel PowerTrench MOSFET
Electrical Characteristics
Symbol
Parameter
T A = 25°C unless otherwise noted
Test Conditions
Min
Typ
Max Units
–0.8
–1.2
Drain–Source Diode Characteristics
VSD
trr
Drain–Source Diode Forward
Voltage
Diode Reverse Recovery Time
Qrr
Diode Reverse Recovery Charge
VGS = 0 V, IS = –14 A
IF = –14 A,
(Note 2)
diF/dt = 100 A/µs
V
28
ns
15
nC
Notes:
1. RθJA is the sum of the junction-to-case and case -to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.
a) RθJA = 40°C/W when mounted on a
1in 2 pad of 2 oz copper
b) RθJA = 96°C/W when mounted
on a minimum pad.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
3. Maximum current is calculated as:
PD
R DS(ON)
where PD is maximum power dissipation at T C = 25°C and RDS(on) is at T J(max) and V GS = 10V. Package current limitation is 21A
4. BV(avalanche) Single-Pulse rating is guaranteed if device is operated within the UIS SOA boundary of the device.
FDD6637 Rev. C2(W)
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FDD6637 35V P-Channel PowerTrench MOSFET
Electrical Characteristics
100
2.4
-6.0V
VGS = -3.5V
-5.0V
NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
VGS = -10V
-4.5V
-I D, DRAIN CURRENT (A)
80
-4.0V
60
-3.5V
40
20
-3.0V
0
1
2
3
-VD S, DRAIN-SOURCE VOLTAGE (V)
1.8
-4.0V
1.6
-4.5V
-5.0V
1.4
-6.0V
1.2
-8.0V
-10V
1
4
0
Figure 1. On-Region Characteristics
20
40
60
-I D, DRAIN CURRENT (A)
80
100
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage
0.05
1.8
ID = -14A
V GS = -10V
I D = -7A
R DS(ON), ON-RESISTANCE (OHM)
NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
2
0.8
0
1.6
1.4
1.2
1
0.8
0.6
-50
0.04
0.03
o
TA = 125 C
0.02
TA = 25o C
0.01
0
-25
0
25
50
75
100
o
TJ , JUNCTION TEMPERATURE ( C)
125
150
2
Figure 3. On-Resistance Variation with
Temperature
4
6
8
-VGS, GATE TO SOURCE VOLTAGE (V)
10
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage
1000
100
VGS = 0V
80
o
T A = -55 C
-I S, REVERSE DRAIN CURRENT (A)
VD S = -5V
-I D , DRAIN CURRENT (A)
2.2
o
125 C
60
o
25 C
40
20
0
100
10
TA = 125o C
1
o
0.1
25 C
0.01
o
-55 C
0.001
0.0001
1
2
3
4
-VGS, GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics
FDD6637 Rev. C2(W)
5
0
0.2
0.4
0.6
0.8
1
1.2
-VSD , BODY DIODE FORWARD VOLTAGE (V)
1.4
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature
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FDD6637 35V P-Channel PowerTrench MOSFET
Typical Characteristics
3200
I D = -14A
VDS = 10V
f = 1MHz
VGS = 0 V
30V
8
CAPACITANCE (pF)
-VGS, GATE-SOURCE VOLTAGE (V)
10
20V
6
4
2400
C iss
1600
C oss
800
2
C rss
0
0
0
10
20
30
Qg, GATE CHARGE (nC)
40
50
0
Figure 7. Gate Charge Characteristics
30
P(pk), PEAK TRANSIENT POWER (W)
100
100µs
1ms
10ms
100ms
1s
100
-I D , DRAIN CURRENT (A)
10
15
20
25
VD S, DRAIN TO SOURCE VOLTAGE (V)
Figure 8. Capacitance Characteristics
1000
R DS(ON) LIMIT
10
10s
DC
1
VGS = -10V
SINGLE PULSE
o
R θJA = 96 C/W
0.1
o
T A = 25 C
SINGLE PULSE
Rθ JA = 96°C/W
T A = 25°C
80
60
40
20
0
0.01
0.01
0
0
1
10
-VDS, DRAIN-SOURCE VOLTAGE (V)
0.1
100
1
10
100
1000
t1 , TIME (sec)
Figure 9. Maximum Safe Operating Area
Figure 10. Single Pulse Maximum
Power Dissipation
100
1000
SINGLE PULSE
Rθ JA = 96°C/W
T A = 25°C
80
I (AS) , AVALANCHE CURRENT
I(pk), PEAK TRANSIENT CURRENT (A)
5
o
100
60
40
20
0
0.01
0.1
1
10
100
t1 , TIME (sec)
Figure 11. Single Pulse Maximum Peak
Current
FDD6637 Rev. C2(W)
1000
TJ = 25 C
10
1
0.001
0.01
0.1
1
10
tA V, TIME IN AVANCHE(ms)
Figure 12. Unclamped Inductive
Switching Capability
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FDD6637 35V P-Channel PowerTrench MOSFET
Typical Characteristics
r(t), NORMALIZED EFFECTIVE
TRANSIENT THERMAL RESISTANCE
1
D = 0.5
Rθ JA(t) = r(t) * RθJA
Rθ JA = 96 °C/W
0.2
0.1
0.1
0.05
P(pk)
0.02
0.01
t1
0.01
t2
T J - T A = P * Rθ JA (t)
Duty Cycle, D = t1 / t 2
SINGLE PULSE
0.001
0.001
0.01
0.1
1
10
100
1000
t 1, TIME (sec)
Figure 13. Transient Thermal Response Curve
Thermal characterization performed using the conditions described in Note 1b.
Transient thermal response will change depending on the circuit board design.
FDD6637 Rev. C2(W)
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FDD6637 35V P-Channel PowerTrench MOSFET
Typical Characteristics
L
VDS
BVDSS
tP
VG
RGEN
DUT
VDD
VDD
+
0V
VGS
VDS
IAS
-
tp
vary tP to obtain
required peak IAS
IAS
0.01Ω
tAV
Figure 14. Unclamped Inductive Load Test
Circuit
Figure 15. Unclamped Inductive Waveforms
Drain Current Regulator
Same type as DUT
+
10µF
QG
10V
50kΩ
10V
-
1µF
+
QGD
Q GS
VGS
VDD
VG
DUT
Charge, (nC)
Ig(REF)
Figure 16. Gate Charge Test Circuit
VDS
RL
t ON
DUT
VDS
Pulse Width ≤ 1µs
Duty Cycle ≤ 0.1%
Figure 18. Switching Time Test Circuit
tf
tr
10%
0V
90%
10%
90%
V GS
0V
td(OFF)
90%
VDD
+
VGS
FDD6637 Rev. C2(W)
tOFF
t d(ON)
VGS
RGEN
Figure 17. Gate Charge Waveform
50%
10%
50%
Pulse Width
Figure 19. Switching Time Waveforms
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FDD6637 35V P-Channel PowerTrench MOSFET
Test Circuits and Waveforms
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APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER
ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S
WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR
SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or systems which,
(a) are intended for surgical implant into the body, or (b) support or
sustain life, or (c) whose failure to perform when properly used in
accordance with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the user.
2. A critical component is any component of a life support device or
system whose failure to perform can be reasonably expected to
cause the failure of the life support device or system, or to affect its
safety or effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. I20