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Dual-Channel Digital Isolators
ADuM1200/ADuM1201
FEATURES
Narrow body, RoHS-compliant, SOIC 8-lead package
Low power operation
5 V operation
1.1 mA per channel maximum @ 0 Mbps to 2 Mbps
3.7 mA per channel maximum @ 10 Mbps
8.2 mA per channel maximum @ 25 Mbps
3 V operation
0.8 mA per channel maximum @ 0 Mbps to 2 Mbps
2.2 mA per channel maximum @ 10 Mbps
4.8 mA per channel maximum @ 25 Mbps
Bidirectional communication
3 V/5 V level translation
High temperature operation: 125°C
High data rate: dc to 25 Mbps (NRZ)
Precise timing characteristics
3 ns maximum pulse width distortion
3 ns maximum channel-to-channel matching
High common-mode transient immunity: >25 kV/μs
Automotive versions qualified per AEC-Q100
Safety and regulatory approvals
UL recognition
2500 V rms for 1 minute per UL 1577
CSA Component Acceptance Notice #5A
VDE Certificate of Conformity
DIN V VDE V 0884-10 (VDE V 0884-10): 2006-12
VIORM = 560 V peak
with optocouplers. The typical optocoupler concerns regarding
uncertain current transfer ratios, nonlinear transfer functions,
and temperature and lifetime effects are eliminated with the
simple iCoupler digital interfaces and stable performance characteristics. The need for external drivers and other discrete
components is eliminated with these iCoupler products. Furthermore, iCoupler devices consume one-tenth to one-sixth the
power of optocouplers at comparable signal data rates.
The ADuM120x isolators provide two independent isolation
channels in a variety of channel configurations and data rates
(see the Ordering Guide). Both parts operate with the supply
voltage on either side ranging from 2.7 V to 5.5 V, providing
compatibility with lower voltage systems as well as enabling a
voltage translation functionality across the isolation barrier.
In addition, the ADuM120x provide low pulse width distortion
(<3 ns for CR grade) and tight channel-to-channel matching
(<3 ns for CR grade). Unlike other optocoupler alternatives,
the ADuM120x isolators have a patented refresh feature that
ensures dc correctness in the absence of input logic transitions
and during power-up/power-down conditions.
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ADuM1200W and ADuM1201W are automotive grade versions
qualified for 125°C operation per AEC-Q100. See the
Automotive Products section for more details.
VDD1 1
APPLICATIONS
Size-critical multichannel isolation
SPI interface/data converter isolation
RS-232/RS-422/RS-485 transceiver isolation
Digital field bus isolation
Hybrid electric vehicles, battery monitor, and motor drive
8
VDD2
VIA 2
ENCODE
DECODE
7
VOA
VIB 3
ENCODE
DECODE
6
VOB
5
GND2
GND1 4
04642-001
FUNCTIONAL BLOCK DIAGRAMS
Figure 1. ADuM1200 Functional Block Diagram
VDD1 1
The ADuM120x 1 are dual-channel, digital isolators based on
the Analog Devices, Inc., iCoupler® technology. Combining
high speed CMOS and monolithic transformer technologies,
these isolation components provide outstanding performance
characteristics superior to alternatives, such as optocouplers.
VDD2
VOA 2
DECODE
ENCODE
7
VIA
VIB 3
ENCODE
DECODE
6
VOB
5
GND2
GND1 4
Figure 2. ADuM1201 Functional Block Diagram
By avoiding the use of LEDs and photodiodes, iCoupler
devices remove the design difficulties commonly associated
1
8
04642-002
GENERAL DESCRIPTION
Protected by U.S. Patents 5,952,849; 6,873,065; 6,903,578; and 7,075,329. Other patents are pending.
Rev. G
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2004–2008 Analog Devices, Inc. All rights reserved.
ADuM1200/ADuM1201
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagrams ............................................................. 1
Revision History ............................................................................... 2
Specification ...................................................................................... 4
Electrical Characteristics—5 V, 105°C Operation ................... 4
Electrical Characteristics—3 V, 105°C Operation ................... 6
Electrical Characteristics—Mixed 5 V/3 V or 3 V/5 V, 105°C
Operation....................................................................................... 8
DIN V VDE V 0884-10 (VDE V 0884-10): 2006-12
Insulation Characteristics ......................................................... 20
Recommended Operating Conditions .................................... 20
Absolute Maximum Ratings ......................................................... 21
ESD Caution................................................................................ 21
Pin Configurations and Function Descriptions ......................... 22
Typical Performance Characteristics ........................................... 23
Applications Information .............................................................. 24
PCB Layout ................................................................................. 24
Propagation Delay-Related Parameters ................................... 24
Electrical Characteristics—5 V, 125°C Operation ................. 11
DC Correctness and Magnetic Field Immunity........................... 24
Electrical Characteristics—3 V, 125°C Operation ................. 13
Power Consumption .................................................................. 25
Electrical Characteristics—Mixed 5 V/3 V, 125°C Operation
....................................................................................................... 15
Insulation Lifetime ..................................................................... 25
Automotive Products ................................................................. 26
Electrical Characteristics—Mixed 3 V/5 V, 125°C Operation
....................................................................................................... 17
Outline Dimension......................................................................... 27
Package Characteristics ............................................................. 19
Ordering Guide .......................................................................... 27 www.BDTIC.com/ADI
Regulatory Information ............................................................. 19
Insulation and Safety-Related Specifications .......................... 19
REVISION HISTORY
9/08—Rev. F to Rev. G
Changes to Table 9 .......................................................................... 19
Changes to Table 13 ........................................................................ 21
Changes to Ordering Guide .......................................................... 27
3/08—Rev. E to Rev. F
Changes to Features Section............................................................ 1
Changes to Applications Section .................................................... 1
Added Table 4.................................................................................. 11
Added Table 5.................................................................................. 13
Added Table 6.................................................................................. 15
Added Table 7.................................................................................. 17
Changes to Table 12 ........................................................................ 20
Changes to Table 13 ........................................................................ 21
Added Automotive Products Section .......................................... 26
Changes to Ordering Guide .......................................................... 27
11/07—Rev. D to Rev. E
Changes to Note 1 .............................................................................1
Added ADuM120xAR Change vs. Temperature Parameter ........3
Added ADuM120xAR Change vs. Temperature Parameter ........5
Added ADuM120xAR Change vs. Temperature Parameter ........8
8/07—Rev. C to Rev. D
Updated VDE Certification Throughout .......................................1
Changes to Features, Note 1, Figure 1, and Figure 2 ....................1
Changes to Table 3.............................................................................7
Changes to Regulatory Information Section .............................. 10
Added Table 10 ............................................................................... 12
Added Insulation Lifetime Section .............................................. 16
Updated Outline Dimensions ....................................................... 18
Changes to Ordering Guide .......................................................... 18
Rev. G | Page 2 of 28
ADuM1200/ADuM1201
2/06—Rev. B to Rev. C
Updated Format.................................................................. Universal
Added Note 1 ..................................................................................... 1
Changes to Absolute Maximum Ratings ......................................12
Changes to DC Correctness and Magnetic Field
Immunity Section ............................................................................15
6/04—Rev. 0 to Rev. A
Changes to Format ............................................................. Universal
Changes to General Description ..................................................... 1
Changes to Electrical Characteristics—5 V Operation................ 3
Changes to Electrical Characteristics—3 V Operation................ 5
Changes to Electrical Characteristics—Mixed 5 V/3 V or
3 V/5 V Operation ............................................................................ 7
9/04—Rev. A to Rev. B
Changes to Table 5 ..........................................................................10
4/04—Revision 0: Initial Version
www.BDTIC.com/ADI
Rev. G | Page 3 of 28
ADuM1200/ADuM1201
SPECIFICATION
ELECTRICAL CHARACTERISTICS—5 V, 105°C OPERATION
All voltages are relative to their respective ground; 4.5 V ≤ VDD1 ≤ 5.5 V, 4.5 V ≤ VDD2 ≤ 5.5 V; all minimum/maximum specifications apply
over the entire recommended operating range, unless otherwise noted; all typical specifications are at TA = 25°C, VDD1 = VDD2 = 5 V; this
does not apply to the ADuM1200W and ADuM1201W automotive grade products.
Table 1.
Parameter
DC SPECIFICATIONS
Input Supply Current per Channel, Quiescent
Output Supply Current per Channel, Quiescent
ADuM1200 Total Supply Current, Two Channels 1
DC to 2 Mbps
VDD1 Supply Current
VDD2 Supply Current
10 Mbps (BR and CR Grades Only)
VDD1 Supply Current
VDD2 Supply Current
25 Mbps (CR Grade Only)
VDD1 Supply Current
VDD2 Supply Current
ADuM1201 Total Supply Current, Two Channels1
DC to 2 Mbps
VDD1 Supply Current
VDD2 Supply Current
10 Mbps (BR and CR Grades Only)
VDD1 Supply Current
VDD2 Supply Current
25 Mbps (CR Grade Only)
VDD1 Supply Current
VDD2 Supply Current
For All Models
Input Currents
Logic High Input Threshold
Logic Low Input Threshold
Logic High Output Voltages
Symbol
Min
Typ
Max
Unit
IDDI (Q)
IDDO (Q)
0.50
0.19
0.60
0.25
mA
mA
IDD1 (Q)
IDD2 (Q)
1.1
0.5
1.4
0.8
mA
mA
DC to 1 MHz logic signal freq.
DC to 1 MHz logic signal freq.
IDD1 (10)
IDD2 (10)
4.3
1.3
5.5
2.0
mA
mA
5 MHz logic signal freq.
5 MHz logic signal freq.
IDD1 (25)
IDD2 (25)
10
2.8
13
3.4
mA
mA
12.5 MHz logic signal freq.
12.5 MHz logic signal freq.
IDD1 (Q)
IDD2 (Q)
0.8
0.8
1.1
1.1
mA
mA
DC to 1 MHz logic signal freq.
DC to 1 MHz logic signal freq.
IDD1 (10)
IDD2 (10)
2.8
2.8
3.5
3.5
mA
mA
5 MHz logic signal freq.
5 MHz logic signal freq.
IDD1 (25)
IDD2 (25)
6.3
6.3
8.0
8.0
mA
mA
12.5 MHz logic signal freq.
12.5 MHz logic signal freq.
−10
0.7 (VDD1 or VDD2)
+0.01
+10
0 V ≤ VIA, VIB ≤ (VDD1 or VDD2)
(VDD1 or VDD2) − 0.1
(VDD1 or VDD2) − 0.5
5.0
4.8
0.0
0.04
0.2
μA
V
V
V
V
V
V
V
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Logic Low Output Voltages
SWITCHING SPECIFICATIONS
ADuM120xAR
Minimum Pulse Width 2
Maximum Data Rate 3
Propagation Delay 4
Pulse Width Distortion, |tPLH − tPHL|4
Change vs. Temperature
Propagation Delay Skew 5
IIA, IIB
VIH
VIL
VOAH, VOBH
0.3 (VDD1 or VDD2)
VOAL, VOBL
0.1
0.1
0.4
Test Conditions
IOx = −20 μA, VIx = VIxH
IOx = −4 mA, VIx = VIxH
IOx = 20 μA, VIx = VIxL
IOx = 400 μA, VIx = VIxL
IOx = 4 mA, VIx = VIxL
CL = 15 pF, CMOS signal levels
PW
tPHL, tPLH
PWD
1000
1
50
150
40
ns
Mbps
ns
ns
100
ps/°C
ns
11
tPSK
Rev. G | Page 4 of 28
ADuM1200/ADuM1201
Parameter
Channel-to-Channel Matching 6
Output Rise/Fall Time (10% to 90%)
ADuM120xBR
Minimum Pulse Width2
Symbol
tPSKCD/tPSKOD
tR/tF
Typ
Max
50
Unit
ns
ns
100
ns
50
ns
3
ns
15
ps/°C
ns
10
PW
Maximum Data Rate3
Propagation Delay
Min
10
4
tPHL, tPLH
Pulse Width Distortion, |tPLH − tPHL|4
Change vs. Temperature
Propagation Delay Skew5
Channel-to-Channel Matching
Codirectional Channels6
PWD
Opposing Directional Channels6
Output Rise/Fall Time (10% to 90%)
ADuM120xCR
Minimum Pulse Width2
tPSKOD
Mbps
20
5
tPSK
3
tPSKCD
ns
15
tR/tF
2.5
PW
Maximum Data Rate3
20
25
Propagation Delay4
tPHL, tPLH
Pulse Width Distortion, |tPLH − tPHL|4
Change vs. Temperature
Propagation Delay Skew5
Channel-to-Channel Matching
Codirectional Channels6
PWD
Opposing Directional Channels6
Output Rise/Fall Time (10% to 90%)
For All Models
Common-Mode Transient Immunity
Logic High Output 7
40
ns
45
ns
3
ns
15
ps/°C
ns
3
ns
50
20
Mbps
5
tPSK
ns
ns
tPSKCD
tPSKOD
15
tR/tF
2.5
ns
ns
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Logic Low Output7
Refresh Rate
Dynamic Supply Current per Channel 8
Input
Output
Test Conditions
|CMH|
25
35
kV/μs
|CML|
25
35
kV/μs
fr
1.2
Mbps
IDDI (D)
0.19
IDDO (D)
0.05
mA/
Mbps
mA/
Mbps
1
VIx = VDD1 or VDD2, VCM =
1000 V, transient
magnitude = 800 V
VIx = 0 V, VCM = 1000 V,
transient magnitude = 800 V
The supply current values are for both channels combined when running at identical data rates. Output supply current values are specified with no output load
present. The supply current associated with an individual channel operating at a given data rate can be calculated as described in the Power Consumption section. See
Figure 6 through Figure 8 for information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See Figure 9 through Figure 11
for total VDD1 and VDD2 supply currents as a function of data rate for ADuM1200 and ADuM1201 channel configurations.
2
The minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed.
3
The maximum data rate is the fastest data rate at which the specified pulse width distortion is guaranteed.
4
tPHL propagation delay is measured from the 50% level of the falling edge of the VIx signal to the 50% level of the falling edge of the VOx signal. tPLH propagation delay is
measured from the 50% level of the rising edge of the VIx signal to the 50% level of the rising edge of the VOx signal.
5
tPSK is the magnitude of the worst-case difference in tPHL and/or tPLH that is measured between units at the same operating temperature, supply voltages, and output
load within the recommended operating conditions.
6
Codirectional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of
the isolation barrier. Opposing directional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with
inputs on opposing sides of the isolation barrier.
7
CMH is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD2. CML is the maximum common-mode voltage slew rate
that can be sustained while maintaining VO < 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. The transient
magnitude is the range over which the common mode is slewed.
8
Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in the signal data rate. See Figure 6 through Figure 8 for
information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See the Power Consumption section for guidance on
calculating per-channel supply current for a given data rate.
Rev. G | Page 5 of 28
ADuM1200/ADuM1201
ELECTRICAL CHARACTERISTICS—3 V, 105°C OPERATION
All voltages are relative to their respective ground; 2.7 V ≤ VDD1 ≤ 3.6 V, 2.7 V ≤ VDD2 ≤ 3.6 V; all minimum/maximum specifications apply over
the entire recommended operating range, unless otherwise noted; all typical specifications are at TA = 25°C, VDD1 = VDD2 = 3.0 V; this does
not apply to ADuM1200W and ADuM1201W automotive grade products.
Table 2.
Parameter
DC SPECIFICATIONS
Input Supply Current per Channel, Quiescent
Output Supply Current per Channel, Quiescent
ADuM1200 Total Supply Current, Two Channels 1
DC to 2 Mbps
VDD1 Supply Current
VDD2 Supply Current
10 Mbps (BR and CR Grades Only)
VDD1 Supply Current
VDD2 Supply Current
25 Mbps (CR Grade Only)
VDD1 Supply Current
VDD2 Supply Current
ADuM1201 Total Supply Current, Two Channels1
DC to 2 Mbps
VDD1 Supply Current
VDD2 Supply Current
10 Mbps (BR and CR Grades Only)
VDD1 Supply Current
VDD2 Supply Current
25 Mbps (CR Grade Only)
VDD1 Supply Current
VDD2 Supply Current
For All Models
Input Currents
Logic High Input Threshold
Logic Low Input Threshold
Logic High Output Voltages
Symbol
Min
Typ
Max
Unit
IDDI (Q)
IDDO (Q)
0.26
0.11
0.35
0.20
mA
mA
IDD1 (Q)
IDD2 (Q)
0.6
0.2
1.0
0.6
mA
mA
DC to 1 MHz logic signal freq.
DC to 1 MHz logic signal freq.
IDD1 (10)
IDD2 (10)
2.2
0.7
3.4
1.1
mA
mA
5 MHz logic signal freq.
5 MHz logic signal freq.
IDD1 (25)
IDD2 (25)
5.2
1.5
7.7
2.0
mA
mA
12.5 MHz logic signal freq.
12.5 MHz logic signal freq.
IDD1 (Q)
IDD2 (Q)
0.4
0.4
0.8
0.8
mA
mA
DC to 1 MHz logic signal freq.
DC to 1 MHz logic signal freq.
IDD1 (10)
IDD2 (10)
1.5
1.5
2.2
2.2
mA
mA
5 MHz logic signal freq.
5 MHz logic signal freq.
IDD1 (25)
IDD2 (25)
3.4
3.4
4.8
4.8
mA
mA
12.5 MHz logic signal freq.
12.5 MHz logic signal freq.
−10
0.7 (VDD1 or VDD2)
+0.01
+10
μA
V
0 V ≤ VIA, VIB ≤ (VDD1 or VDD2)
(VDD1 or VDD2) − 0.1
(VDD1 or VDD2) − 0.5
3.0
2.8
0.0
0.04
0.2
V
V
V
V
V
IOx = −20 μA, VIx = VIxH
IOx = −4 mA, VIx = VIxH
IOx = 20 μA, VIx = VIxL
IOx = 400 μA, VIx = VIxL
IOx = 4 mA, VIx = VIxL
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Logic Low Output Voltages
SWITCHING SPECIFICATIONS
ADuM120xAR
Minimum Pulse Width 2
Maximum Data Rate 3
Propagation Delay 4
Pulse Width Distortion, |tPLH − tPHL|4
Change vs. Temperature
Propagation Delay Skew 5
Channel-to-Channel Matching 6
Output Rise/Fall Time (10% to 90%)
IIA, IIB
VIH
VIL
VOAH, VOBH
Test Conditions
0.3 (VDD1 or VDD2)
VOAL, VOBL
0.1
0.1
0.4
CL = 15 pF, CMOS signal levels
PW
tPHL, tPLH
PWD
1000
1
50
150
40
11
tPSK
tPSKCD/tPSKOD
tR/tF
100
50
10
Rev. G | Page 6 of 28
ns
Mbps
ns
ns
ps/°C
ns
ns
ns
ADuM1200/ADuM1201
Parameter
ADuM120xBR
Minimum Pulse Width2
Symbol
Max
Unit
100
ns
60
ns
3
ns
22
ps/°C
ns
tPSKCD
3
ns
tPSKOD
22
10
Propagation Delay4
tPHL, tPLH
Pulse Width Distortion, |tPLH − tPHL|4
Change vs. Temperature
Propagation Delay Skew5
Channel-to-Channel Matching
Codirectional Channels6
PWD
Opposing Directional Channels6
Output Rise/Fall Time (10% to 90%)
ADuM120xCR
Minimum Pulse Width2
Propagation Delay
Typ
PW
Maximum Data Rate3
Maximum Data Rate
Min
5
tPSK
3.0
PW
3
20
25
4
Mbps
20
tR/tF
tPHL, tPLH
40
50
20
ns
ns
ns
Mbps
55
ns
3
ns
16
ps/°C
ns
Pulse Width Distortion, |tPLH − tPHL|4
Change vs. Temperature
Propagation Delay Skew5
Channel-to-Channel Matching
Codirectional Channels6
PWD
tPSKCD
3
ns
Opposing Directional Channels6
Output Rise/Fall Time (10% to 90%)
For All Models
Common-Mode Transient Immunity
Logic High Output 7
tPSKOD
16
ns
Logic Low Output7
3.0
ns
|CMH|
25
35
kV/μs
|CML|
25
35
kV/μs
fr
1.1
Mbps
IDDI (D)
0.10
IDDO (D)
0.03
mA/
Mbps
mA/
Mbps
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Refresh Rate
Dynamic Supply Current per Channel 8
Input
Output
5
tPSK
tR/tF
Test Conditions
CL = 15 pF, CMOS signal levels
1
VIx = VDD1 or VDD2, VCM = 1000 V,
transient magnitude = 800 V
VIx = 0 V, VCM = 1000 V,
transient magnitude = 800 V
The supply current values are for both channels combined when running at identical data rates. Output supply current values are specified with no output load
present. The supply current associated with an individual channel operating at a given data rate can be calculated as described in the Power Consumption section. See
Figure 6 through Figure 8 for information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See Figure 9 through Figure 11
for total VDD1 and VDD2 supply currents as a function of data rate for ADuM1200 and ADuM1201 channel configurations.
2
The minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed.
3
The maximum data rate is the fastest data rate at which the specified pulse width distortion is guaranteed.
4
tPHL propagation delay is measured from the 50% level of the falling edge of the VIx signal to the 50% level of the falling edge of the VOx signal. tPLH propagation delay is
measured from the 50% level of the rising edge of the VIx signal to the 50% level of the rising edge of the VOx signal.
5
tPSK is the magnitude of the worst-case difference in tPHL and/or tPLH that is measured between units at the same operating temperature, supply voltages, and output
load within the recommended operating conditions.
6
Codirectional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of
the isolation barrier. Opposing directional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with
inputs on opposing sides of the isolation barrier.
7
CMH is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD2. CML is the maximum common-mode voltage slew rate
that can be sustained while maintaining VO < 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. The transient
magnitude is the range over which the common mode is slewed.
8
Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in the signal data rate. See Figure 6 through Figure 8 for
information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See the Power Consumption section for guidance on
calculating per-channel supply current for a given data rate.
Rev. G | Page 7 of 28
ADuM1200/ADuM1201
ELECTRICAL CHARACTERISTICS—MIXED 5 V/3 V OR 3 V/5 V, 105°C OPERATION
All voltages are relative to their respective ground; 5 V/3 V operation: 4.5 V ≤ VDD1 ≤ 5.5 V, 2.7 V ≤ VDD2 ≤ 3.6 V. 3 V/5 V operation: 2.7 V
≤ VDD1 ≤ 3.6 V, 4.5 V ≤ VDD2 ≤ 5.5 V; all minimum/maximum specifications apply over the entire recommended operating range, unless
otherwise noted; all typical specifications are at TA = 25°C; VDD1 = 3.0 V, VDD2 = 5.0 V; or VDD1 = 5.0 V, VDD2 = 3.0 V; this does not apply to
ADuM1200W and ADuM1201W automotive grade products.
Table 3.
Parameter
DC SPECIFICATIONS
Input Supply Current per Channel,
Quiescent
5 V/3 V Operation
3 V/5 V Operation
Output Supply Current per Channel,
Quiescent
5 V/3 V Operation
3 V/5 V Operation
ADuM1200 Total Supply Current,
Two Channels 1
DC to 2 Mbps
VDD1 Supply Current
5 V/3 V Operation
3 V/5 V Operation
VDD2 Supply Current
5 V/3 V Operation
3 V/5 V Operation
10 Mbps (BR and CR Grades Only)
VDD1 Supply Current
5 V/3 V Operation
3 V/5 V Operation
VDD2 Supply Current
5 V/3 V Operation
3 V/5 V Operation
25 Mbps (CR Grade Only)
VDD1 Supply Current
5 V/3 V Operation
3 V/5 V Operation
VDD2 Supply Current
5 V/3 V Operation
3 V/5 V Operation
ADuM1201 Total Supply Current,
Two Channels1
DC to 2 Mbps
VDD1 Supply Current
5 V/3 V Operation
3 V/5 V Operation
VDD2 Supply Current
5 V/3 V Operation
3 V/5 V Operation
10 Mbps (BR and CR Grades Only)
VDD1 Supply Current
5 V/3 V Operation
3 V/5 V Operation
VDD2 Supply Current
5 V/3 V Operation
3 V/5 V Operation
25 Mbps (CR Grade Only)
VDD1 Supply Current
5 V/3 V Operation
3 V/5 V Operation
Symbol
Min
Typ
Max
Unit
Test Conditions
0.50
0.26
0.6
0.35
mA
mA
0.11
0.19
0.20
0.25
mA
mA
1.1
0.6
1.4
1.0
mA
mA
DC to 1 MHz logic signal freq.
DC to 1 MHz logic signal freq.
0.2
0.5
0.6
0.8
mA
mA
DC to 1 MHz logic signal freq.
DC to 1 MHz logic signal freq.
IDDI (Q)
IDDO (Q)
IDD1 (Q)
IDD2 (Q)
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IDD1 (10)
4.3
2.2
5.5
3.4
mA
mA
5 MHz logic signal freq.
5 MHz logic signal freq.
0.7
1.3
1.1
2.0
mA
mA
5 MHz logic signal freq.
5 MHz logic signal freq.
10
5.2
13
7.7
mA
mA
12.5 MHz logic signal freq.
12.5 MHz logic signal freq.
1.5
2.8
2.0
3.4
mA
mA
12.5 MHz logic signal freq.
12.5 MHz logic signal freq.
0.8
0.4
1.1
0.8
mA
mA
DC to 1 MHz logic signal freq.
DC to 1 MHz logic signal freq.
0.4
0.8
0.8
1.1
mA
mA
DC to 1 MHz logic signal freq.
DC to 1 MHz logic signal freq.
2.8
1.5
3.5
2.2
mA
mA
5 MHz logic signal freq.
5 MHz logic signal freq.
1.5
2.8
2.2
3.5
mA
mA
5 MHz logic signal freq.
5 MHz logic signal freq.
6.3
3.4
8.0
4.8
mA
mA
12.5 MHz logic signal freq.
12.5 MHz logic signal freq.
IDD2 (10)
IDD1 (25)
IDD2 (25)
IDD1 (Q)
IDD2 (Q)
IDD1 (10)
IDD2 (10)
IDD1 (25)
Rev. G | Page 8 of 28
ADuM1200/ADuM1201
Parameter
VDD2 Supply Current
5 V/3 V Operation
3 V/5 V Operation
For All Models
Input Currents
Logic High Input Threshold
Logic Low Input Threshold
Logic High Output Voltages
Symbol
IDD2 (25)
IIA, IIB
VIH
VIL
VOAH, VOBH
Logic Low Output Voltages
VOAL, VOBL
SWITCHING SPECIFICATIONS
ADuM120xAR
Minimum Pulse Width 2
Maximum Data Rate 3
Propagation Delay 4
Pulse Width Distortion, |tPLH − tPHL|4
Change vs. Temperature
Propagation Delay Skew 5
Channel-to-Channel Matching 6
Output Rise/Fall Time (10% to 90%)
ADuM120xBR
Minimum Pulse Width2
Typ
Max
Unit
Test Conditions
3.4
6.3
4.8
8.0
mA
mA
12.5 MHz logic signal freq.
12.5 MHz logic signal freq.
−10
0.7 (VDD1 or VDD2)
+0.01
+10
0 V ≤ VIA, VIB ≤ (VDD1 or VDD2)
(VDD1 or VDD2) − 0.1
(VDD1 or VDD2) − 0.5
VDD1 or VDD2
(VDD1 or VDD2) − 0.2
0.0
0.04
0.2
μA
V
V
V
V
V
V
V
0.3 (VDD1 or VDD2)
0.1
0.1
0.4
tPHL, tPLH
PWD
1000
1
50
150
40
11
tPSK
tPSKCD/tPSKOD
tR/tF
ns
Mbps
ns
ns
50
50
ps/°C
ns
ns
ns
100
ns
10
CL = 15 pF, CMOS signal levels
PW
10
4
IOx = −20 μA, VIx = VIxH
IOx = −4 mA, VIx = VIxH
IOx = 20 μA, VIx = VIxL
IOx = 400 μA, VIx = VIxL
IOx = 4 mA, VIx = VIxL
CL = 15 pF, CMOS signal levels
PW
Maximum Data Rate3
Propagation Delay
Min
tPHL, tPLH
Mbps
15
55
ns
3
ns
tPSK
22
ps/°C
ns
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4
Pulse Width Distortion, |tPLH − tPHL|
Change vs. Temperature
Propagation Delay Skew5
Channel-to-Channel Matching
Codirectional Channels6
PWD
tPSKCD
3
ns
Opposing Directional Channels6
Output Rise/Fall Time (10% to 90%)
5 V/3 V Operation
3 V/5 V Operation
ADuM120xCR
Minimum Pulse Width2
tPSKOD
22
ns
5
tR/tF
3.0
2.5
CL = 15 pF, CMOS signal levels
PW
40
ns
50
ns
3
ns
tPSK
15
ps/°C
ns
tPSKCD
3
ns
tPSKOD
15
ns
Maximum Data Rate3
20
25
Propagation Delay4
tPHL, tPLH
Pulse Width Distortion, |tPLH – tPHL|4
Change vs. Temperature
Propagation Delay Skew5
Channel-to-Channel Matching
Codirectional Channels6
PWD
Opposing Directional Channels6
ns
ns
50
20
Mbps
5
Rev. G | Page 9 of 28
ADuM1200/ADuM1201
Parameter
Output Rise/Fall Time (10% to 90%)
5 V/3 V Operation
3 V/5 V Operation
For All Models
Common-Mode Transient Immunity
Logic High Output 7
Logic Low Output7
Refresh Rate
5 V/3 V Operation
3 V/5 V Operation
Input Dynamic Supply Current
per Channel 8
5 V/3 V Operation
Symbol
tR/tF
Typ
Unit
3.0
2.5
ns
ns
25
35
kV/μs
|CML|
25
35
kV/μs
1.2
1.1
Mbps
Mbps
0.19
mA/
Mbps
mA/
Mbps
Test Conditions
VIx = VDD1 or VDD2, VCM = 1000 V,
transient magnitude = 800 V
VIx = 0 V, VCM = 1000 V,
transient magnitude = 800 V
fr
IDDI (D)
0.10
Output Dynamic Supply Current per
Channel8
5 V/3 V Operation
Max
|CMH|
3 V/5 V Operation
3 V/5 V Operation
Min
IDDO (D)
0.03
0.05
mA/
Mbps
mA/
Mbps
1
The supply current values are for both channels combined when running at identical data rates. Output supply current values are specified with no output load
present. The supply current associated with an individual channel operating at a given data rate can be calculated as described in the Power Consumption section. See
Figure 6 through Figure 8 for information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See Figure 9 through Figure 11
for total VDD1 and VDD2 supply currents as a function of data rate for ADuM1200 and ADuM1201 channel configurations.
2
The minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed.
3
The maximum data rate is the fastest data rate at which the specified pulse width distortion is guaranteed.
4
tPHL propagation delay is measured from the 50% level of the falling edge of the VIx signal to the 50% level of the falling edge of the VOx signal. tPLH propagation delay is
measured from the 50% level of the rising edge of the VIx signal to the 50% level of the rising edge of the VOx signal.
5
tPSK is the magnitude of the worst-case difference in tPHL and/or tPLH that is measured between units at the same operating temperature, supply voltages, and output
load within the recommended operating conditions.
6
Codirectional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of
the isolation barrier. Opposing directional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with
inputs on opposing sides of the isolation barrier.
7
CMH is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD2. CML is the maximum common-mode voltage slew rate
that can be sustained while maintaining VO < 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. The transient
magnitude is the range over which the common mode is slewed.
8
Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in the signal data rate. See Figure 6 through Figure 8 for
information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See the Power Consumption section for guidance on
calculating per-channel supply current for a given data rate.
www.BDTIC.com/ADI
Rev. G | Page 10 of 28
ADuM1200/ADuM1201
ELECTRICAL CHARACTERISTICS—5 V, 125°C OPERATION
All voltages are relative to their respective ground; 4.5 V ≤ VDD1 ≤ 5.5 V, 4.5 V ≤ VDD2 ≤ 5.5 V; all minimum/maximum specifications apply
over the entire recommended operating range, unless otherwise noted; all typical specifications are at TA = 25°C, VDD1 = VDD2 = 5 V; this
applies to ADuM1200W and ADuM1201W automotive grade products.
Table 4.
Parameter
DC SPECIFICATIONS
Input Supply Current per Channel,
Quiescent
Output Supply Current per Channel,
Quiescent
ADUM1200W, Total Supply Current,
Two Channels 1
DC to 2 Mbps
VDD1 Supply Current
VDD2 Supply Current
10 Mbps (TRZ and URZ Grades Only)
VDD1 Supply Current
VDD2 Supply Current
25 Mbps (URZ Grade Only)
VDD1 Supply Current
VDD2 Supply Current
ADUM1201W, Total Supply Current,
Two Channels1
DC to 2 Mbps
VDD1 Supply Current
VDD2 Supply Current
10 Mbps (TRZ and URZ Grades Only)
VDD1 Supply Current
VDD2 Supply Current
25 Mbps (URZ Grade Only)
VDD1 Supply Current
VDD2 Supply Current
For All Models
Input Currents
Logic High Input Threshold
Logic Low Input Threshold
Logic High Output Voltages
Symbol
Min
Typ
Max
Unit
IDDI (Q)
0.50
0.60
mA
IDDO (Q)
0.19
0.25
mA
IDD1 (Q)
IDD2 (Q)
1.1
0.5
1.4
0.8
mA
mA
DC to 1 MHz logic signal freq.
DC to 1 MHz logic signal freq.
IDD1 (10)
IDD2 (10)
4.3
1.3
5.5
2.0
mA
mA
5 MHz logic signal freq.
5 MHz logic signal freq.
IDD1 (25)
IDD2 (25)
10
2.8
13
3.4
mA
mA
12.5 MHz logic signal freq.
12.5 MHz logic signal freq.
IDD1 (Q)
IDD2 (Q)
0.8
0.8
1.1
1.1
mA
mA
DC to 1 MHz logic signal freq.
DC to 1 MHz logic signal freq.
IDD1 (10)
IDD2 (10)
2.8
2.8
3.5
3.5
mA
mA
5 MHz logic signal freq.
5 MHz logic signal freq.
IDD1 (25)
IDD2 (25)
6.3
6.3
8.0
8.0
mA
mA
12.5 MHz logic signal freq.
12.5 MHz logic signal freq.
−10
0.7 (VDD1 or VDD2)
+0.01
+10
0 ≤ VIA, VIB ≤ (VDD1 or VDD2)
(VDD1 or VDD2) − 0.1
(VDD1 or VDD2) − 0.5
5.0
4.8
0.0
0.04
0.2
μA
V
V
V
V
V
V
V
www.BDTIC.com/ADI
Logic Low Output Voltages
SWITCHING SPECIFICATIONS
ADuM120xWSRZ
Minimum Pulse Width 2
Maximum Data Rate 3
Propagation Delay 4
Pulse Width Distortion, |tPLH − tPHL|4
Propagation Delay Skew 5
Channel-to-Channel Matching 6
Output Rise/Fall Time
(10% to 90%)
ADuM120xWTRZ
Minimum Pulse Width2
Maximum Data Rate3
Propagation Delay4
IIA, IIB
VIH
VIL
VOAH, VOBH
0.3 (VDD1 or VDD2)
VOAL, VOBL
0.1
0.1
0.4
Test Conditions
IOx = −20 μA, VIx = VIxH
IOx = −4 mA, VIx = VIxH
IOx = 20 μA, VIx = VIxL
IOx = 400 μA, VIx = VIxL
IOx = 4 mA, VIx = VIxL
CL = 15 pF, CMOS signal levels
PW
tPHL, tPLH
PWD
tPSK
tPSKCD/tPSKOD
tR/tF
1000
1
20
150
40
100
50
2.5
ns
Mbps
ns
ns
ns
ns
ns
CL = 15 pF, CMOS signal levels
PW
tPHL, tPLH
100
10
20
50
Rev. G | Page 11 of 28
ns
Mbps
ns
ADuM1200/ADuM1201
Parameter
Pulse-Width Distortion, |tPLH − tPHL|4
Change vs. Temperature
Propagation Delay Skew5
Channel-to-Channel Matching
Codirectional Channels6
Opposing Directional Channels6
Output Rise/Fall Time (10% to 90%)
ADuM120xWURZ
Minimum Pulse Width2
Maximum Data Rate3
Propagation Delay4
Pulse Width Distortion, |tPLH – tPHL|4
Change vs. Temperature
Propagation Delay Skew5
Channel-to-Channel Matching
Codirectional Channels6
Opposing Directional Channels6
Output Rise/Fall Time (10% to 90%)
For All Models
Common-Mode Transient Immunity
Logic High Output 7
Logic Low Output7
Refresh Rate
Dynamic Supply Current per Channel 8
Input
Output
Symbol
PWD
Min
Typ
Max
3
5
Unit
ns
ps/°C
ns
tPSK
15
tPSKCD
tPSKOD
tR/tF
3
15
ns
ns
ns
40
ns
Mbps
ns
ns
ps/°C
ns
2.5
Test Conditions
CL = 15 pF, CMOS signal levels
PW
tPHL, tPLH
PWD
25
20
20
50
45
3
5
tPSK
15
tPSKCD
tPSKOD
tR/tF
3
15
2.5
ns
ns
ns
|CMH|
25
35
kV/μs
|CML|
25
35
kV/μs
fr
1.2
Mbps
IDDI (D)
0.19
IDDO (D)
0.05
mA/
Mbps
mA/
Mbps
VIx = VDD1, VDD2, VCM = 1000 V,
transient magnitude = 800 V
VIx = 0 V, VCM = 1000 V,
transient magnitude = 800 V
www.BDTIC.com/ADI
1
The supply current values are for both channels combined when running at identical data rates. Output supply current values are specified with no output load
present. The supply current associated with an individual channel operating at a given data rate can be calculated as described in the Power Consumption section. See
Figure 6 through Figure 8 for information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See Figure 9 through Figure 11
for total IDD1 and IDD2 supply currents as a function of data rate for ADuM1200W and ADuM1201W channel configurations.
2
The minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed.
3
The maximum data rate is the fastest data rate at which the specified pulse width distortion is guaranteed.
4
tPHL propagation delay is measured from the 50% level of the falling edge of the VIx signal to the 50% level of the falling edge of the VOx signal. tPLH propagation delay is
measured from the 50% level of the rising edge of the VIx signal to the 50% level of the rising edge of the VOx signal.
5
tPSK is the magnitude of the worst-case difference in tPHL and/or tPLH that is measured between units at the same operating temperature, supply voltages, and output
load within the recommended operating conditions.
6
Codirectional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of
the isolation barrier. Opposing directional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with
inputs on opposing sides of the isolation barrier.
7
CMH is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD2. CML is the maximum common-mode voltage slew rate
that can be sustained while maintaining VO < 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. The transient
magnitude is the range over which the common mode is slewed.
8
Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in the signal data rate. See Figure 6 through Figure 8 for
information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See the Power Consumption section for guidance on
calculating per-channel supply current for a given data rate.
Rev. G | Page 12 of 28
ADuM1200/ADuM1201
ELECTRICAL CHARACTERISTICS—3 V, 125°C OPERATION
All voltages are relative to their respective ground; 3.0 V ≤ VDD1 ≤ 3.6 V, 3.0 V ≤ VDD2 ≤ 3.6 V. All minimum/maximum specifications
apply over the entire recommended operating range, unless otherwise noted; all typical specifications are at TA = 25°C,
VDD1 = VDD2 = 3.0 V; this applies to ADuM1200W and ADuM1201W automotive grade products.
Table 5.
Parameter
Symbol
DC SPECIFICATIONS
Input Supply Current per Channel,
Quiescent
Output Supply Current per Channel, Quiescent
ADUM1200W, Total Supply Current,
Two Channels 1
DC to 2 Mbps
VDD1 Supply Current
VDD2 Supply Current
10 Mbps (TRZ and URZ Grades Only)
VDD1 Supply Current
VDD2 Supply Current
25 Mbps (URZ Grade Only)
VDD1 Supply Current
VDD2 Supply Current
ADUM1201W, Total Supply Current,
Two Channels1
DC to 2 Mbps
VDD1 Supply Current
VDD2 Supply Current
10 Mbps (TRZ and URZ Grades Only)
VDD1 Supply Current
VDD2 Supply Current
25 Mbps (URZ Grade Only)
VDD1 Supply Current
VDD2 Supply Current
For All Models
Input Currents
Logic High Input Threshold
Logic Low Input Threshold
Logic High Output Voltages
Min
Typ
Max
Unit
IDDI (Q)
0.26
0.35
mA
IDDO (Q)
0.11
0.20
mA
IDD1 (Q)
IDD2 (Q)
0.6
0.2
1.0
0.6
mA
mA
DC to 1 MHz logic signal freq.
DC to 1 MHz logic signal freq.
IDD1 (10)
IDD2 (10)
2.2
0.7
3.4
1.1
mA
mA
5 MHz logic signal freq.
5 MHz logic signal freq.
IDD1 (25)
IDD2 (25)
5.2
1.5
7.7
2.0
mA
mA
12.5 MHz logic signal freq.
12.5 MHz logic signal freq.
IDD1 (Q)
IDD2 (Q)
0.4
0.4
0.8
0.8
mA
mA
DC to 1 MHz logic signal freq.
DC to 1 MHz logic signal freq.
IDD1 (10)
IDD2 (10)
1.5
1.5
2.2
2.2
mA
mA
5 MHz logic signal freq.
5 MHz logic signal freq.
IDD1 (25)
IDD2 (25)
3.4
3.4
4.8
4.8
mA
mA
12.5 MHz logic signal freq.
12.5 MHz logic signal freq.
−10
0.7 (VDD1 or VDD2)
+0.01
+10
μA
V
0 ≤ VIA, VIB, ≤ (VDD1 or VDD2)
(VDD1 or VDD2) − 0.1
(VDD1 or VDD2 ) − 0.5
3.0
2.8
0.0
0.04
0.2
V
V
V
V
V
IOx = −20 μA, VIx = VIxH
IOx = −4 mA, VIx = VIxH
IOx = 20 μA, VIx = VIxL
IOx = 400 μA, VIx = VIxL
IOx = 4 mA, VIx = VIxL
www.BDTIC.com/ADI
Logic Low Output Voltages
SWITCHING SPECIFICATIONS
ADuM120xWSRZ
Minimum Pulse Width 2
Maximum Data Rate 3
Propagation Delay 4
Pulse Width Distortion, |tPLH − tPHL|4
Propagation Delay Skew 5
Channel-to-Channel Matching 6
Output Rise/Fall Time (10% to 90%)
ADuM120xWTRZ
Minimum Pulse Width2
Maximum Data Rate3
Propagation Delay4
Pulse-Width Distortion, |tPLH −tPHL|4
Change vs. Temperature
Propagation Delay Skew5
IIA, IIB
VIH
VIL
VOAH, VOBH
Test Conditions
0.3 (VDD1 or VDD2)
VOAL, VOBL
0.1
0.1
0.4
CL = 15 pF, CMOS signal levels
PW
tPHL, tPLH
PWD
tPSK
tPSKCD/tPSKOD
tR/tF
1000
1
50
150
40
100
50
10
ns
Mbps
ns
ns
ns
ns
ns
CL = 15 pF, CMOS signal levels
PW
tPHL, tPLH
PWD
100
10
20
60
3
5
tPSK
22
Rev. G | Page 13 of 28
ns
Mbps
ns
ns
ps/°C
ns
ADuM1200/ADuM1201
Parameter
Symbol
Channel-to-Channel Matching
Codirectional Channels6
Opposing Directional Channels6
Output Rise/Fall Time (10% to 90%)
ADuM120xWCR
Minimum Pulse Width2
Maximum Data Rate3
Propagation Delay4
Pulse Width Distortion, |tPLH − tPHL|4
Change vs. Temperature
Propagation Delay Skew5
Channel-to-Channel Matching
Codirectional Channels6
Opposing Directional Channels6
Output Rise/Fall Time (10% to 90%)
For All Models
Common Mode Transient Immunity
Logic High Output 7
Logic Low Output7
Refresh Rate
Dynamic Supply Current per Channel 8
Input
Output
1
Min
tPSKCD
tPSKOD
tR/tF
Typ
Max
Unit
3
22
ns
ns
ns
40
ns
Mbps
ns
ns
ps/°C
ns
3.0
Test Conditions
CL = 15 pF, CMOS signal levels
PW
tPHL, tPLH
PWD
25
20
20
50
55
3
5
tPSK
16
tPSKCD
tPSKOD
tR/tF
3
16
3.0
ns
ns
ns
|CMH|
25
35
kV/μs
|CML|
25
35
kV/μs
fr
1.1
Mbps
IDDI (D)
0.10
IDDO (D)
0.03
mA/
Mbps
mA/
Mbps
www.BDTIC.com/ADI
VIx = VDD1, VDD2, VCM = 1000 V,
transient magnitude = 800 V
VIx = 0 V, VCM = 1000 V,
transient magnitude = 800 V
The supply current values are for both channels combined when running at identical data rates. Output supply current values are specified with no output load
present. The supply current associated with an individual channel operating at a given data rate can be calculated as described in the Power Consumption section. See
Figure 6 through Figure 8 for information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See Figure 9 through Figure 11
for total IDD1 and IDD2 supply currents as a function of data rate for ADuM1200W and ADuM1201W channel configurations.
2
The minimum pulse width is the shortest pulse width at which the specified pulse-width distortion is guaranteed.
3
The maximum data rate is the fastest data rate at which the specified pulse-width distortion is guaranteed.
4
tPHL propagation delay is measured from the 50% level of the falling edge of the VIx signal to the 50% level of the falling edge of the VOx signal. tPLH propagation delay is
measured from the 50% level of the rising edge of the VIx signal to the 50% level of the rising edge of the VOx signal.
5
tPSK is the magnitude of the worst-case difference in tPHL and/or tPLH that is measured between units at the same operating temperature, supply voltages, and output
load within the recommended operating conditions.
6
Codirectional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of
the isolation barrier. Opposing directional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with
inputs on opposing sides of the isolation barrier.
7
CMH is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD2. CML is the maximum common-mode voltage slew rate
that can be sustained while maintaining VO < 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. The transient
magnitude is the range over which the common mode is slewed.
8
Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in the signal data rate. See Figure 6 through Figure 8 for
information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See the Power Consumption section for guidance on
calculating per-channel supply current for a given data rate.
Rev. G | Page 14 of 28
ADuM1200/ADuM1201
ELECTRICAL CHARACTERISTICS—MIXED 5 V/3 V, 125°C OPERATION
All voltages are relative to their respective ground; 5 V/3 V operation: 4.5 V ≤ VDD1 ≤ 5.5 V, 3.0 V ≤ VDD2 ≤ 3.6 V. 3 V/5 V operation; all
minimum/maximum specifications apply over the entire recommended operating range, unless otherwise noted; all typical specifications
are at TA = 25°C; VDD1 = 5.0 V, VDD2 = 3.0 V; this applies to ADuM1200W and ADuM1201W automotive grade products.
Table 6.
Parameter
Symbol
DC SPECIFICATIONS
Input Supply Current, per Channel
Quiescent
Output Supply Current, per Channel
Quiescent
ADUM1200W, Total Supply Current,
Two Channels1
DC to 2 Mbps
VDD1 Supply Current
VDD2 Supply Current
10 Mbps (TRZ and URZ Grades Only)
VDD1 Supply Current
VDD2 Supply Current
25 Mbps (URZ Grade Only)
VDD1 Supply Current
VDD2 Supply Current
ADUM1201W, Total Supply Current,
Two Channels1
DC to 2 Mbps
VDD1 Supply Current
VDD2 Supply Current
10 Mbps (TRZ and URZ Grades
Only)
VDD1 Supply Current
VDD2 Supply Current
25 Mbps (URZ Grade Only)
VDD1 Supply Current
VDD2 Supply Current
For All Models
Input Currents
Logic High Input Threshold
Logic Low Input Threshold
Logic High Output Voltages
Min
Typ
Max
Unit
IDDI (Q)
0.50
0.6
mA
IDDO (Q)
0.11
0.20
mA
IDD1 (Q)
IDD2 (Q)
1.1
0.2
1.4
0.6
mA
mA
DC to 1 MHz logic signal freq.
DC to 1 MHz logic signal freq.
IDD1 (10)
IDD2 (10)
4.3
0.7
5.5
1.1
mA
mA
5 MHz logic signal freq.
5 MHz logic signal freq.
IDD1 (25)
IDD2 (25)
10
1.5
13
2.0
mA
mA
12.5 MHz logic signal freq.
12.5 MHz logic signal freq.
IDD1 (Q)
IDD2 (Q)
0.8
0.4
1.1
0.8
mA
mA
DC to 1 MHz logic signal freq.
DC to 1 MHz logic signal freq.
IDD1 (10)
IDD2 (10)
2.8
1.5
3.5
2.2
mA
mA
5 MHz logic signal freq.
5 MHz logic signal freq.
IDD1 (25)
IDD2 (25)
6.3
3.4
8.0
4.8
mA
mA
12.5 MHz logic signal freq.
12.5 MHz logic signal freq.
−10
0.7 (VDD1 or VDD2)
+0.01
+10
0 ≤ VIA, VIB ≤ (VDD1 or VDD2)
(VDD1 or VDD2) − 0.1
(VDD1 or VDD2) − 0.5
VDD1 or VDD2
(VDD1 or VDD2 ) − 0.2
0.0
0.04
0.2
μA
V
V
V
V
V
V
V
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Logic Low Output Voltages
SWITCHING SPECIFICATIONS
ADuM120xWSRZ
Minimum Pulse Width 2
Maximum Data Rate 3
Propagation Delay 4
Pulse Width Distortion, |tPLH − tPHL|4
Propagation Delay Skew 5
Channel-to-Channel Matching 6
Output Rise/Fall Time (10% to 90%)
ADuM120xWTRZ
Minimum Pulse Width2
Maximum Data Rate3
Propagation Delay4
IIA, IIB
VIH
VIL
VOAH, VOBH
0.3 (VDD1 or VDD2)
VOAL, VOBL
0.1
0.1
0.4
Test Conditions
IOx = −20 μA, VIx = VIxH
IOx = −4 mA, VIx = VIxH
IOx = 20 μA, VIx = VIxL
IOx = 400 μA, VIx = VIxL
IOx = 4 mA, VIx = VIxL
CL = 15 pF, CMOS signal levels
PW
tPHL, tPLH
PWD
tPSK
tPSKCD/ tPSKOD
tR/tF
1000
1
50
150
40
50
50
10
ns
Mbps
ns
ns
ns
ns
ns
CL = 15 pF, CMOS signal levels
PW
100
ns
Mbps
55
ns
10
tPHL, tPLH
15
Rev. G | Page 15 of 28
ADuM1200/ADuM1201
Parameter
Symbol
Pulse Width Distortion, |tPLH − tPHL|4
Change vs. Temperature
Propagation Delay Skew5
Channel-to-Channel Matching
Codirectional Channels6
Opposing Directional Channels6
Output Rise/Fall Time(10% to 90%)
ADuM120xWURZ
Minimum Pulse Width2
Maximum Data Rate3
Propagation Delay4
Pulse Width Distortion, |tPLH – tPHL|4
Change vs. Temperature
Propagation Delay Skew5
Channel-to-Channel Matching
Codirectional Channels6
Opposing Directional Channels6
Output Rise/Fall Time(10% to 90%)
For All Models
Common-Mode Transient Immunity
Logic High Output 7
Logic Low Output7
Refresh Rate
Dynamic Supply Current per
Channel 8
Input
Output
Min
Typ
PWD
Max
Unit
3
ns
ps/°C
ns
5
tPSK
22
tPSKCD
tPSKOD
tR/tF
3
22
ns
ns
ns
40
ns
Mbps
ns
ns
ps/°C
ns
3.0
Test Conditions
CL = 15 pF, CMOS signal levels
PW
tPHL, tPLH
PWD
25
20
20
50
50
3
5
tPSK
15
tPSKCD
tPSKOD
tR/tF
3
15
3.0
ns
ns
ns
|CMH|
25
35
kV/μs
|CML|
25
35
kV/μs
1.2
Mbps
fr
VIx = VDD1, VDD2, VCM = 1000 V,
transient magnitude = 800 V
VIx = VDD1, VDD2, VCM = 1000 V,
transient magnitude = 800 V
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IDDI (D)
0.19
IDDO (D)
0.03
1
mA/
Mbps
mA/
Mbps
The supply current values are for both channels combined when running at identical data rates. Output supply current values are specified with no output load
present. The supply current associated with an individual channel operating at a given data rate can be calculated as described in the Power Consumption section. See
Figure 6 through Figure 8 for information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See Figure 9 through Figure 11
for total IDD1 and IDD2 supply currents as a function of data rate for ADuM1200W and ADuM1201W channel configurations.
2
The minimum pulse width is the shortest pulse width at which the specified pulse-width distortion is guaranteed.
3
The maximum data rate is the fastest data rate at which the specified pulse-width distortion is guaranteed.
4
tPHL propagation delay is measured from the 50% level of the falling edge of the VIx signal to the 50% level of the falling edge of the VOx signal. tPLH propagation delay is
measured from the 50% level of the rising edge of the VIx signal to the 50% level of the rising edge of the VOx signal.
5
tPSK is the magnitude of the worst-case difference in tPHL and/or tPLH that is measured between units at the same operating temperature, supply voltages, and output
load within the recommended operating conditions.
6
Codirectional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of
the isolation barrier. Opposing directional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with
inputs on opposing sides of the isolation barrier.
7
CMH is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD2. CML is the maximum common-mode voltage slew rate
that can be sustained while maintaining VO < 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. The transient
magnitude is the range over which the common mode is slewed.
8
Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in the signal data rate. See Figure 6 through Figure 8 for
information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See the Power Consumption section for guidance on
calculating per-channel supply current for a given data rate.
Rev. G | Page 16 of 28
ADuM1200/ADuM1201
ELECTRICAL CHARACTERISTICS—MIXED 3 V/5 V, 125°C OPERATION
All voltages are relative to their respective ground; 3.0 V ≤ VDD1 ≤ 3.6 V, 4.5 V ≤ VDD2 ≤ 5.5 V; all minimum/maximum specifications apply
over the entire recommended operating range, unless otherwise noted; all typical specifications are at TA = 25°C; VDD1 = 3.0 V,
VDD2 = 5.0 V; this applies to ADuM1200W and ADuM1201W automotive grade products.
Table 7.
Parameter
Symbol
DC SPECIFICATIONS
Input Supply Current per Channel,
Quiescent
Output Supply Current per Channel,
Quiescent
ADUM1200W, Total Supply Current,
Two Channels1
DC to 2 Mbps
VDD1 Supply Current
VDD2 Supply Current
10 Mbps (TRZ and URZ Grades Only)
VDD1 Supply Current
VDD2 Supply Current
25 Mbps (URZ Grade Only)
VDD1 Supply Current
VDD2 Supply Current
ADUM1201W, Total Supply Current,
Two Channels1
DC to 2 Mbps
VDD1 Supply Current
VDD2 Supply Current
10 Mbps (TRZ and URZ Grades Only)
VDD1 Supply Current
VDD2 Supply Current
25 Mbps (URZ Grade Only)
VDD1 Supply Current
VDD2 Supply Current
For All Models
Input Currents
Logic High Input Threshold
Logic Low Input Threshold
Logic High Output Voltages
Min
Typ
Max
Unit
IDDI (Q)
0.26
0.35
mA
IDDO (Q)
0.19
0.25
mA
IDD1 (Q)
IDD2 (Q)
0.6
0.5
1.0
0.8
mA
mA
DC to 1 MHz logic signal freq.
DC to 1 MHz logic signal freq.
IDD1 (10)
IDD2 (10)
2.2
1.3
3.4
2.0
mA
mA
5 MHz logic signal freq.
5 MHz logic signal freq.
IDD1 (25)
IDD2 (25)
5.2
2.8
7.7
3.4
mA
mA
12.5 MHz logic signal freq.
12.5 MHz logic signal freq.
IDD1 (Q)
IDD2 (Q)
0.4
0.8
0.8
1.1
mA
mA
DC to 1 MHz logic signal freq.
DC to 1 MHz logic signal freq.
IDD1 (10)
IDD2 (10)
1.5
2.8
2.2
3.5
mA
mA
5 MHz logic signal freq.
5 MHz logic signal freq.
IDD1 (25)
IDD2 (25)
3.4
6.3
4.8
8.0
mA
mA
12.5 MHz logic signal freq.
12.5 MHz logic signal freq.
−10
0.7 (VDD1 or VDD2)
+0.01
+10
0 ≤ VIA, VIB ≤ (VDD1 or VDD2)
(VDD1 or VDD2) − 0.1
(VDD1 or VDD2) − 0.5
VDD1 or VDD2
(VDD1 or VDD2 ) − 0.2
0.0
0.04
0.2
μA
V
V
V
V
V
V
V
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Logic Low Output Voltages
SWITCHING SPECIFICATIONS
ADuM120xWSRZ
Minimum Pulse Width 2
Maximum Data Rate 3
Propagation Delay 4
Pulse Width Distortion, |tPLH − tPHL|4
Propagation Delay Skew 5
Channel-to-Channel Matching 6
Output Rise/Fall Time (10% to 90%)
ADuM120xWTRZ
Minimum Pulse Width2
Maximum Data Rate3
Propagation Delay4
IIA, IIB
VIH
VIL
VOAH, VOBH
0.3 (VDD1 or VDD2)
VOAL, VOBL
0.1
0.1
0.4
Test Conditions
IOx = −20 μA, VIx = VIxH
IOx = −4 mA, VIx = VIxH
IOx = 20 μA, VIx = VIxL
IOx = 400 μA, VIx = VIxL
IOx = 4 mA, VIx = VIxL
CL = 15 pF, CMOS signal levels
PW
tPHL, tPLH
PWD
tPSK
tPSKCD/
tPSKOD
tR/tF
1000
1
50
150
40
50
50
10
ns
Mbps
ns
ns
ns
ns
ns
CL = 15 pF, CMOS signal levels
PW
tPHL, tPLH
100
10
15
55
Rev. G | Page 17 of 28
ns
Mbps
ns
ADuM1200/ADuM1201
Parameter
Symbol
Pulse Width Distortion, |tPLH − tPHL|4
Change vs. Temperature
Propagation Delay Skew5
Channel-to-Channel Matching
Codirectional Channels6
Opposing Directional Channels6
Output Rise/Fall Time (10% to 90%)
ADuM120xWURZ
Minimum Pulse Width2
Maximum Data Rate3
Propagation Delay4
Pulse Width Distortion, |tPLH – tPHL|4
Change vs. Temperature
Propagation Delay Skew5
Channel-to-Channel Matching
Codirectional Channels6
Opposing Directional Channels6
Output Rise/Fall Time (10% to 90%)
For All Models
Common-Mode Transient Immunity
Logic High Output 7
Logic Low Output7
Refresh Rate
Input Dynamic Supply Current
per Channel 8
Output Dynamic Supply Current
per Channel8
Min
Typ
PWD
Max
Unit
3
ns
ps/°C
ns
5
tPSK
22
tPSKCD
tPSKOD
tR/tF
3
22
ns
ns
ns
40
ns
Mbps
ns
ns
ps/°C
ns
2.5
Test Conditions
CL = 15 pF, CMOS signal levels
PW
tPHL, tPLH
PWD
25
20
20
50
50
3
5
tPSK
15
tPSKCD
tPSKOD
tR/tF
3
15
2.5
ns
ns
ns
|CMH|
25
35
kV/μs
|CML|
25
35
kV/μs
1.1
0.10
Mbps
mA/
Mbps
mA/
Mbps
fr
IDDI (D)
VIx = VDD1, VDD2, VCM = 1000 V,
transient magnitude = 800 V
VIx = 0 V, VCM = 1000 V,
transient magnitude = 800 V
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IDDO (D)
0.05
1
The supply current values are for both channels combined when running at identical data rates. Output supply current values are specified with no output load
present. The supply current associated with an individual channel operating at a given data rate can be calculated as described in the Power Consumption section. See
Figure 6 through Figure 8 for information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See Figure 9 through Figure 11
for total IDD1 and IDD2 supply currents as a function of data rate for ADuM1200W and ADuM1201W channel configurations.
2
The minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed.
3
The maximum data rate is the fastest data rate at which the specified pulse width distortion is guaranteed.
4
tPHL propagation delay is measured from the 50% level of the falling edge of the VIx signal to the 50% level of the falling edge of the VOx signal. tPLH propagation delay is
measured from the 50% level of the rising edge of the VIx signal to the 50% level of the rising edge of the VOx signal.
5
tPSK is the magnitude of the worst-case difference in tPHL and/or tPLH that is measured between units at the same operating temperature, supply voltages, and output
load within the recommended operating conditions.
6
Codirectional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of
the isolation barrier. Opposing directional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with
inputs on opposing sides of the isolation barrier.
7
CMH is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD2. CML is the maximum common-mode voltage slew rate
that can be sustained while maintaining VO < 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. The transient
magnitude is the range over which the common mode is slewed.
8
Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in the signal data rate. See Figure 6 through Figure 8 for
information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See the Power Consumption section for guidance on
calculating per-channel supply current for a given data rate.
Rev. G | Page 18 of 28
ADuM1200/ADuM1201
PACKAGE CHARACTERISTICS
Table 8.
Parameter
Resistance (Input-to-Output) 1
Capacitance (Input-to-Output)1
Input Capacitance
IC Junction-to-Case Thermal Resistance, Side 1
Symbol
RI-O
CI-O
CI
θJCI
IC Junction-to-Case Thermal Resistance, Side 2
θJCO
1
Min
Typ
1012
1.0
4.0
46
Max
41
Unit
Ω
pF
pF
°C/W
Test Conditions
f = 1 MHz
Thermocouple located at
center of package underside
°C/W
The device is considered a 2-terminal device; Pin 1, Pin, 2, Pin 3, and Pin 4 are shorted together, and Pin 5, Pin 6, Pin 7, and Pin 8 are shorted together.
REGULATORY INFORMATION
The ADuM1200/ADuM1201 and ADuM1200W/ADuM1201W are approved by the organizations listed in Table 9; refer to Table 14 and
the Insulation Lifetime section for details regarding recommended maximum working voltages for specific cross-isolation waveforms and
insulation levels.
Table 9.
UL
Recognized Under 1577 Component
Recognition Program 1
Single/Basic 2500 V rms Isolation Voltage
CSA
Approved under CSA Component Acceptance
Notice #5A. Approval pending for
ADuM1200W/ADuM1201W automotive 125°C
temperature grade.
Basic insulation per CSA 60950-1-03 and
IEC 60950-1, 400 V rms (566 peak) maximum
working voltage
Functional insulation per CSA 60950-1-03 and
IEC 60950-1, 800 V rms (1131 V peak) maximum
working voltage
File 205078
VDE
Certified according to DIN V VDE
V 0884-10 (VDE V 0884-10): 2006-12 2
Reinforced insulation, 560 V peak
www.BDTIC.com/ADI
File E214100
1
2
File 2471900-4880-0001
In accordance with UL 1577, each ADuM120x is proof tested by applying an insulation test voltage ≥ 3000 V rms for 1 second (current leakage detection limit = 5 μA).
In accordance with DIN V VDE V 0884-10, each ADuM120x is proof tested by applying an insulation test voltage ≥1050 V peak for 1 sec (partial discharge detection
limit = 5 pC). The * marking branded on the component designates DIN V VDE V 0884-10 approval.
INSULATION AND SAFETY-RELATED SPECIFICATIONS
Table 10.
Parameter
Rated Dielectric Insulation Voltage
Minimum External Air Gap (Clearance)
Symbol
L(I01)
Value
2500
4.90 min
Unit
V rms
mm
Minimum External Tracking (Creepage)
L(I02)
4.01 min
mm
Minimum Internal Gap (Internal Clearance)
Tracking Resistance (Comparative Tracking Index)
Isolation Group
CTI
0.017 min
>175
IIIa
mm
V
Rev. G | Page 19 of 28
Conditions
1 minute duration
Measured from input terminals to output terminals,
shortest distance through air
Measured from input terminals to output terminals,
shortest distance path along body
Insulation distance through insulation
DIN IEC 112/VDE 0303 Part 1
Material Group (DIN VDE 0110, 1/89, Table 1)
ADuM1200/ADuM1201
DIN V VDE V 0884-10 (VDE V 0884-10): 2006-12 INSULATION CHARACTERISTICS
This isolator is suitable for reinforced isolation, only within the safety limit data. Maintenance of the safety data is ensured by protective
circuits. Note that the * marking on the package denotes DIN V VDE V 0884-10 approval for a 560 V peak working voltage.
Table 11.
Description
Installation Classification per DIN VDE 0110
For Rated Mains Voltage ≤ 150 V rms
For Rated Mains Voltage ≤ 300 V rms
For Rated Mains Voltage ≤ 400 V rms
Climatic Classification
Pollution Degree per DIN VDE 0110, Table 1
Maximum Working Insulation Voltage
Input-to-Output Test Voltage, Method B1
Input-to-Output Test Voltage, Method A
After Environmental Tests Subgroup 1
After Input and/or Safety Test Subgroup 2
and Subgroup 3
Highest Allowable Overvoltage
Safety-Limiting Values
Case Temperature
Side 1 Current
Side 2 Current
Insulation Resistance at TS
Conditions
VIORM × 1.875 = VPR, 100% production test,
tm = 1 second, partial discharge < 5 pC
VIORM × 1.6 = VPR, tm = 60 seconds,
partial discharge < 5 pC
VIORM × 1.2 = VPR, tm = 60 seconds,
partial discharge < 5 pC
Transient overvoltage, tTR = 10 seconds
Maximum value allowed in the event of a failure
(see Figure 3)
Symbol
Characteristic
Unit
VIORM
VPR
I to IV
I to III
I to II
40/105/21
2
560
1050
V peak
V peak
896
672
V peak
V peak
VTR
4000
V peak
TS
IS1
IS2
RS
150
160
170
>109
°C
mA
mA
Ω
VPR
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VIO = 500 V
RECOMMENDED OPERATING CONDITIONS
200
Table 12.
80
Parameter
Operating Temperature (TA) 1
Operating Temperature (TA) 2
Supply Voltages (VDD1, VDD2)1, 3
Supply Voltages (VDD1, VDD2)2, 3
Input Signal Rise and Fall Times
60
1
160
140
SIDE #2
SIDE #1
120
100
40
20
0
0
50
100
150
CASE TEMPERATURE (°C)
200
04642-003
SAFETY-LIMITING CURRENT (mA)
180
Rating
−40°C to +105°C
−40°C to +125°C
2.7 V to 5.5 V
3.0 V to 5.5 V
1.0 ms
Does not apply to ADuM1200W and ADuM1201W automotive grade
products.
2
Applies to ADuM1200W and ADuM1201W automotive grade products.
3
All voltages are relative to their respective ground. See the DC Correctness
and Magnetic Field Immunity section for information on immunity to external
magnetic fields.
Figure 3. Thermal Derating Curve, Dependence of SafetyLimiting Values on Case Temperature per DIN V VDE V 0884-10
Rev. G | Page 20 of 28
ADuM1200/ADuM1201
ABSOLUTE MAXIMUM RATINGS
Ambient temperature = 25°C, unless otherwise noted.
Table 13.
Parameter
Storage Temperature (TST)
Ambient Operating Temperature (TA) 1
Ambient Operating Temperature (TA) 2
Supply Voltages (VDD1, VDD2) 3
Input Voltages (VIA, VIB)3, 4
Output Voltages (VOA, VOB)3, 4
Average Output Current per Pin (IO) 5
Common-Mode Transients (CML, CMH)6
1
Rating
−55°C to +150°C
−40°C to +105°C
−40°C to +125°C
−0.5 V to +7.0 V
−0.5 V to VDDI + 0.5 V
−0.5 V to VDDO + 0.5 V
−11 mA to +11 mA
−100 kV/μs to +100 kV/μs
Does not apply to ADuM1200W and ADuM1200W automotive grade
products.
2
Applies to ADuM1200W and ADuM1201W automotive grade products.
3
All voltages are relative to their respective ground.
4
VDDI and VDDO refer to the supply voltages on the input and output sides of a
given channel, respectively.
5
See Figure 3 for maximum rated current values for various temperatures.
6
Refers to common-mode transients across the insulation barrier.
Common-mode transients exceeding the absolute maximum ratings
can cause latch-up or permanent damage.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Table 14. Maximum Continuous Working Voltage1
Parameter
Max
Unit
Constraint
AC Voltage,
Bipolar
Waveform
AC Voltage,
Unipolar
Waveform
Functional
Insulation
565
V peak
50-year minimum lifetime
1131
V peak
Basic
Insulation
560
V peak
Maximum approved
working voltage per IEC
60950-1
Maximum approved
working voltage per IEC
60950-1 and VDE V 088410
1131
V peak
DC Voltage
Functional
Insulation
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Basic
Insulation
560
1
V peak
Maximum approved
working voltage per IEC
60950-1
Maximum approved
working voltage per IEC
60950-1 and VDE V 088410
Refers to continuous voltage magnitude imposed across the isolation barrier.
See the Insulation Lifetime section for more details.
ESD CAUTION
Rev. G | Page 21 of 28
ADuM1200/ADuM1201
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
VIB 3
ADuM1200
TOP VIEW
(Not to Scale)
GND1 4
8 VDD2
VDD1 1
7 VOA
VOA 2
6 VOB
5 GND2
VIB 3
ADuM1201
TOP VIEW
(Not to Scale)
GND1 4
Figure 4. ADuM1200 Pin Configuration
8 VDD2
7 VIA
6 VOB
5 GND2
04642-005
VIA 2
04642-004
VDD1 1
Figure 5. ADuM1201 Pin Configuration
Table 15. ADuM1200 Pin Function Descriptions
Table 16. ADuM1201 Pin Function Descriptions
Pin
No.
1
2
3
4
5
6
7
8
Pin
No.
1
2
3
4
5
6
7
8
Mnemonic
VDD1
VIA
VIB
GND1
GND2
VOB
VOA
VDD2
Description
Supply Voltage for Isolator Side 1.
Logic Input A.
Logic Input B.
Ground 1. Ground Reference for Isolator Side 1.
Ground 2. Ground Reference for Isolator Side 2.
Logic Output B.
Logic Output A.
Supply Voltage for Isolator Side 2.
Mnemonic
VDD1
VOA
VIB
GND1
GND2
VOB
VIA
VDD2
Description
Supply Voltage for Isolator Side 1.
Logic Output A.
Logic Input B.
Ground 1. Ground Reference for Isolator Side 1.
Ground 2. Ground Reference for Isolator Side 2.
Logic Output B.
Logic Input A.
Supply Voltage for Isolator Side 2.
Table 17. ADuM1200 Truth Table (Positive Logic)
VIA Input
H
L
H
L
X
VIB Input
H
L
L
H
X
VDD1 State
Powered
Powered
Powered
Powered
Unpowered
VDD2 State
Powered
Powered
Powered
Powered
Powered
VOA Output
H
L
H
L
H
VOB Output
H
L
L
H
H
X
X
Powered
Unpowered
Indeterminate
Indeterminate
Notes
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Outputs return to the input state within
1 μs of VDDI power restoration.
Outputs return to the input state within
1 μs of VDDO power restoration.
Table 18. ADuM1201 Truth Table (Positive Logic)
VIA Input
H
L
H
L
X
VIB Input
H
L
L
H
X
VDD1 State
Powered
Powered
Powered
Powered
Unpowered
VDD2 State
Powered
Powered
Powered
Powered
Powered
VOA Output
H
L
H
L
Indeterminate
VOB Output
H
L
L
H
H
X
X
Powered
Unpowered
H
Indeterminate
Rev. G | Page 22 of 28
Notes
Outputs return to the input state within
1 μs of VDD1 power restoration.
Outputs return to the input state within
1 μs of VDDO power restoration.
ADuM1200/ADuM1201
TYPICAL PERFORMANCE CHARACTERISTICS
10
20
15
CURRENT (mA)
CURRENT/CHANNEL (mA)
8
6
4
5V
3V
10
5V
5
2
0
10
20
DATA RATE (Mbps)
30
0
04642-006
0
0
4
3
3
CURRENT (mA)
4
2
2
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5V
1
30
Figure 9. Typical ADuM1200 VDD1 Supply Current vs.
Data Rate for 5 V and 3 V Operation
5V
3V
1
3V
10
20
DATA RATE (Mbps)
30
0
0
Figure 7. Typical Output Supply Current per Channel vs.
Data Rate for 5 V and 3 V Operation (No Output Load)
10
20
DATA RATE (Mbps)
30
04642-010
0
30
04642-011
0
04642-007
CURRENT/CHANNEL (mA)
Figure 6. Typical Input Supply Current per Channel vs.
Data Rate for 5 V and 3 V Operation
10
20
DATA RATE (Mbps)
04642-009
3V
Figure 10. Typical ADuM1200 VDD2 Supply Current vs.
Data Rate for 5 V and 3 V Operation
4
10
CURRENT (mA)
5V
2
6
5V
4
3V
3V
1
2
0
0
10
20
DATA RATE (Mbps)
30
04642-008
CURRENT/CHANNEL (mA)
8
3
Figure 8. Typical Output Supply Current per Channel vs.
Data Rate for 5 V and 3 V Operation (15 pF Output Load)
0
0
10
20
DATA RATE (Mbps)
Figure 11. Typical ADuM1201 VDD1 or VDD2 Supply Current vs.
Data Rate for 5 V and 3 V Operation
Rev. G | Page 23 of 28
ADuM1200/ADuM1201
APPLICATIONS INFORMATION
PCB LAYOUT
The pulses at the transformer output have an amplitude greater
than 1.0 V. The decoder has a sensing threshold at about 0.5 V,
therefore establishing a 0.5 V margin in which induced voltages
can be tolerated. The voltage induced across the receiving coil is
given by
The ADuM120x digital isolators require no external interface
circuitry for the logic interfaces. Power supply bypassing is
strongly recommended at the input and output supply pins.
The capacitor value should be between 0.01 μF and 0.1 μF.
The total lead length between both ends of the capacitor and
the input power supply pin should not exceed 20 mm.
V = (−dβ/dt)Σ∏rn2; n = 1, 2, … , N
PROPAGATION DELAY-RELATED PARAMETERS
Propagation delay is a parameter that describes the time it takes
a logic signal to propagate through a component. The propagation
delay to a Logic low output can differ from the propagation delay
to a Logic high output.
INPUT (VIx)
50%
100
50%
Figure 12. Propagation Delay Parameters
Pulse width distortion is the maximum difference between
these two propagation delay values and is an indication of
how accurately the timing of the input signal is preserved.
MAXIMUM ALLOWABLE MAGNETIC FLUX
DENSITY (kgauss)
OUTPUT (VOx)
Given the geometry of the receiving coil in the ADuM120x and
an imposed requirement that the induced voltage be 50% at
most of the 0.5 V margin at the decoder, a maximum allowable
magnetic field is calculated, as shown in Figure 13.
tPHL
04642-012
tPLH
where:
β is the magnetic flux density (gauss).
N is the number of turns in the receiving coil.
rn is the radius of the nth turn in the receiving coil (cm).
10
1
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0.1
0.01
Propagation delay skew refers to the maximum amount that
the propagation delay differs between multiple ADuM120x
components operating under the same conditions.
0.001
1k
10k
1M
10M
100k
MAGNETIC FIELD FREQUENCY (Hz)
100M
04642-013
Channel-to-channel matching refers to the maximum amount
that the propagation delay differs between channels within a
single ADuM120x component.
Figure 13. Maximum Allowable External Magnetic Flux Density
DC CORRECTNESS AND MAGNETIC FIELD IMMUNITY
Positive and negative logic transitions at the isolator input send
narrow (~1 ns) pulses to the decoder via the transformer. The
decoder is bistable and is therefore either set or reset by the
pulses, indicating input logic transitions. In the absence of logic
transitions of more than ~1 μs at the input, a periodic set of
refresh pulses indicative of the correct input state is sent to
ensure dc correctness at the output. If the decoder receives
no internal pulses for more than about 5 μs, the input side is
assumed to be unpowered or nonfunctional, in which case
the isolator output is forced to a default state (see Table 17
and Table 18) by the watchdog timer circuit.
The ADuM120x are extremely immune to external magnetic
fields. The limitation on the magnetic field immunity of the
ADuM120x is set by the condition in which induced voltage
in the receiving coil of the transformer is sufficiently large
enough to either falsely set or reset the decoder. The following
analysis defines the conditions under which this can occur. The
3 V operating condition of the ADuM120x is examined because
it represents the most susceptible mode of operation.
For example, at a magnetic field frequency of 1 MHz, the
maximum allowable magnetic field of 0.2 kgauss induces a
voltage of 0.25 V at the receiving coil. This is about 50% of the
sensing threshold and does not cause a faulty output transition.
Similarly, if such an event occurs during a transmitted pulse
(and has the worst-case polarity), it reduces the received pulse
from >1.0 V to 0.75 V—still well above the 0.5 V sensing
threshold of the decoder.
The preceding magnetic flux density values correspond to
specific current magnitudes at given distances away from the
ADuM120x transformers. Figure 14 expresses these allowable
current magnitudes as a function of frequency for selected
distances. As seen, the ADuM120x are extremely immune and
can be affected only by extremely large currents operating very
close to the component at a high frequency. For the 1 MHz
example, a 0.5 kA current would have to be placed 5 mm away
from the ADuM120x to affect the operation of the component.
Rev. G | Page 24 of 28
ADuM1200/ADuM1201
VDD1 and VDD2 supply current as a function of data rate for
ADuM1200 and ADuM1201 channel configurations.
DISTANCE = 1m
100
INSULATION LIFETIME
All insulation structures eventually break down when subjected
to voltage stress over a sufficiently long period. The rate of insulation degradation is dependent on the characteristics of the
voltage waveform applied across the insulation. In addition
to the testing performed by the regulatory agencies, Analog
Devices carries out an extensive set of evaluations to determine
the lifetime of the insulation structure within the ADuM120x.
10
DISTANCE = 100mm
1
DISTANCE = 5mm
0.1
0.01
1k
10k
100k
1M
10M
100M
MAGNETIC FIELD FREQUENCY (Hz)
04642-014
MAXIMUM ALLOWABLE CURRENT (kA)
1000
Figure 14. Maximum Allowable Current for Various
Current-to-ADuM120x Spacings
Note that, at combinations of strong magnetic fields and high
frequencies, any loops formed by PCB traces can induce sufficiently large error voltages to trigger the threshold of succeeding
circuitry. Care should be taken in the layout of such traces to
avoid this possibility.
POWER CONSUMPTION
The supply current at a given channel of the ADuM120x
isolator is a function of the supply voltage, the data rate of the
channel, and the output load of the channel.
Analog Devices performs accelerated life testing using voltage
levels higher than the rated continuous working voltage. Acceleration factors for several operating conditions are determined.
These factors allow calculation of the time to failure at the actual
working voltage. The values shown in Table 14 summarize the
peak voltage for 50 years of service life for a bipolar ac operating
condition and the maximum CSA/VDE approved working voltages. In many cases, the approved working voltage is higher than
the 50-year service life voltage. Operation at these high working
voltages can lead to shortened insulation life in some cases.
The insulation lifetime of the ADuM120x depends on the
voltage waveform type imposed across the isolation barrier.
The iCoupler insulation structure degrades at different rates
depending on whether the waveform is bipolar ac, unipolar
ac, or dc. Figure 15, Figure 16, and Figure 17 illustrate these
different isolation voltage waveforms, respectively.
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For each input channel, the supply current is given by
IDDI = IDDI (Q)
f ≤ 0.5fr
IDDI = IDDI (D) × (2f – fr) + IDDI (Q)
f > 0.5fr
For each output channel, the supply current is given by
IDDO = IDDO (Q)
Bipolar ac voltage is the most stringent environment. The goal
of a 50-year operating lifetime under the ac bipolar condition
determines the Analog Devices recommended maximum
working voltage.
f ≤ 0.5fr
−3
IDDO = (IDDO (D) + (0.5 × 10 ) × CLVDDO) × (2f – fr) + IDDO (Q)
f > 0.5fr
where:
IDDI (D), IDDO (D) are the input and output dynamic supply currents
per channel (mA/Mbps).
CL is the output load capacitance (pF).
VDDO is the output supply voltage (V).
f is the input logic signal frequency (MHz, half of the input data
rate, NRZ signaling).
fr is the input stage refresh rate (Mbps).
IDDI (Q), IDDO (Q) are the specified input and output quiescent
supply currents (mA).
In the case of unipolar ac or dc voltage, the stress on the insulation is significantly lower, which allows operation at higher
working voltages yet still achieves a 50-year service life. The
working voltages listed in Table 14 can be applied while maintaining the 50-year minimum lifetime provided the voltage
conforms to either the unipolar ac or dc voltage cases. Any cross
insulation voltage waveform that does not conform to Figure 16
or Figure 17 is to be treated as a bipolar ac waveform, and its
peak voltage is to be limited to the 50-year lifetime voltage value
listed in Table 14.
To calculate the total IDD1 and IDD2 supply currents, the supply
currents for each input and output channel corresponding to
IDD1 and IDD2 are calculated and totaled. Figure 6 and Figure 7
provide per-channel supply currents as a function of data rate
for an unloaded output condition. Figure 8 provides perchannel supply current as a function of data rate for a 15 pF
output condition. Figure 9 through Figure 11 provide total
Rev. G | Page 25 of 28
ADuM1200/ADuM1201
Note that the voltage presented in Figure 16 is shown as sinusoidal for illustration purposes only. It is meant to represent any
voltage waveform varying between 0 V and some limiting value.
The limiting value can be positive or negative, but the voltage
cannot cross 0 V.
AUTOMOTIVE PRODUCTS
The ADuM1200W and ADuM1201W products are qualified
per AEC-Q100 for use in automotive applications. Custom
variants of these products may be available to meet stringent
automotive performance and quality requirements. For more
information, please contact your local ADI sales representative.
04642-021
RATED PEAK VOLTAGE
0V
Figure 15. Bipolar AC Waveform
04642-022
RATED PEAK VOLTAGE
0V
Figure 16. Unipolar AC Waveform
04642-023
RATED PEAK VOLTAGE
0V
Figure 17. DC Waveform
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Rev. G | Page 26 of 28
ADuM1200/ADuM1201
OUTLINE DIMENSION
5.00 (0.1968)
4.80 (0.1890)
1
5
4
1.27 (0.0500)
BSC
0.25 (0.0098)
0.10 (0.0040)
COPLANARITY
0.10
SEATING
PLANE
6.20 (0.2441)
5.80 (0.2284)
1.75 (0.0688)
1.35 (0.0532)
0.51 (0.0201)
0.31 (0.0122)
0.50 (0.0196)
0.25 (0.0099)
45°
8°
0°
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
COMPLIANT TO JEDEC STANDARDS MS-012-A A
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
012407-A
8
4.00 (0.1574)
3.80 (0.1497)
Figure 18. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body (R-8)
Dimensions shown in millimeters (inches)
ORDERING GUIDE
Model
ADuM1200AR
ADuM1200AR-RL7
ADuM1200ARZ 2
ADuM1200ARZ-RL72
ADuM1200BR
ADuM1200BR-RL7
ADuM1200BRZ2
ADuM1200BRZ-RL72
ADuM1200CR
ADuM1200CR-RL7
ADuM1200CRZ2
ADuM1200CRZ-RL72
ADuM1200WSRZ2
ADUM1200WSRZ-RL72
ADuM1200WTRZ2
ADuM1200WTRZ-RL72
ADUM1200WURZ2
ADUM1200WURZ-RL72
ADuM1201AR
ADuM1201AR-RL7
ADuM1201ARZ2
ADuM1201ARZ-RL72
ADuM1201BR
ADuM1201BR-RL7
ADuM1201BRZ2
ADuM1201BRZ-RL72
ADuM1201CR
ADuM1201CR-RL7
Number
of Inputs,
VDD1 Side
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
1
1
1
1
1
1
1
1
1
1
Number
of Inputs,
VDD2 Side
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
Maximum
Data Rate
(Mbps)
1
1
1
1
10
10
10
10
25
25
25
25
1
1
10
10
25
25
1
1
1
1
10
10
10
10
25
25
Maximum
Propagation
Delay, 5 V (ns)
150
150
150
150
50
50
50
50
45
45
45
45
150
150
50
50
45
45
150
150
150
150
50
50
50
50
45
45
Maximum
Pulse Width
Distortion (ns)
40
40
40
40
3
3
3
3
3
3
3
3
40
40
3
3
3
3
40
40
40
40
3
3
3
3
3
3
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Rev. G | Page 27 of 28
Temperature
Range (°C)
−40 to +105
−40 to +105
−40 to +105
−40 to +105
−40 to +105
−40 to +105
−40 to +105
−40 to +105
−40 to +105
−40 to +105
−40 to +105
−40 to +105
−40 to +125
−40 to +125
−40 to +125
−40 to +125
−40 to +125
−40 to +125
−40 to +105
−40 to +105
−40 to +105
−40 to +105
−40 to +105
−40 to +105
−40 to +105
−40 to +105
−40 to +105
−40 to +105
Package
Option 1
R-8
R-8
R-8
R-8
R-8
R-8
R-8
R-8
R-8
R-8
R-8
R-8
R-8
R-8
R-8
R-8
R-8
R-8
R-8
R-8
R-8
R-8
R-8
R-8
R-8
R-8
R-8
R-8
ADuM1200/ADuM1201
Model
ADuM1201CRZ2
ADuM1201CRZ-RL72
ADuM1201WSRZ2
ADUM1201WSRZ-RL72
ADuM1201WTRZ2
ADuM1201WTRZ-RL72
ADUM1201WURZ2
ADUM1201WURZ-RL72
1
2
Number
of Inputs,
VDD1 Side
1
1
1
1
1
1
1
1
Number
of Inputs,
VDD2 Side
1
1
1
1
1
1
1
1
Maximum
Data Rate
(Mbps)
25
25
1
1
10
10
25
25
Maximum
Propagation
Delay, 5 V (ns)
45
45
150
150
50
50
45
45
Maximum
Pulse Width
Distortion (ns)
3
3
40
40
3
3
3
3
Temperature
Range (°C)
−40 to +105
−40 to +105
−40 to +125
−40 to +125
−40 to +125
−40 to +125
−40 to +125
−40 to +125
R-8 = 8-lead narrow-body SOIC_N.
Z = RoHS Compliant Part.
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©2004–2008 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D04642-0-9/08(G)
Rev. G | Page 28 of 28
Package
Option 1
R-8
R-8
R-8
R-8
R-8
R-8
R-8
R-8