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Bahan Kuliah
Elektronika Dasar
Pertemuan ke 11
FIELD EFFECT TRANSISTOR
oleh
Ir.Bambang Sutopo,M.Phil
Jurusan Teknik Elektro
FT-UGM
2007
1
DRIVER RELAY
(diskusi tugas lalu)
VCC  VBE
RB 
2  I B  JENUH
DIODA
freewheel
RELAY
VCC
IB-JENUH = arus basis
yang membuat transistor
dalam kondisi jenuh.
RB
Relay membutuhkan arus
sekitar 50 sampai
100 mili Amper
2
TRANSISTOR SBG BUFER OP-AMP
Input 1
relay
+
R
Input 2
_
R harus bisa membatasi arus agar arus yang dikeluarkan
op-amp tak terlalu besar.
R harus masih dapat membuat transistor jenuh.
3
Pilihan R tergantung
kemampuan IC
relay
mengeluarkan arus
(source)
atau
dimasuki arus
(sink)
R
25mA
relay
100mA
R
relay
200mA
4
Tegangan VCE vs Hambatan Basis
2500
Tegangan VCE (mV)
2000
Eka Ardi
Daerah
Tak stabil
1500
1000
500
0 1
10
2
10
3
10
RB (Ohm)
4
10
5
10
5
Arus Basis vs Hambatan Basis
90
80
Arus Basis (mA)
70
Eka Ardi
60
50
40
BC107
30
20
10
0 1
10
2
10
3
10
RB (Ohm)
4
10
5
10
6
Arus Basis, Tegangan VCE dan Hambatan Basis
Arus Basis (mA)/ Tegangan VCE (mV)
120
100
80
60
40
20
0 2
10
3
10
RB (Ohm)
4
10
7
Arus Basis, Tegangan VCE dan Hambatan Basis
45
IB
Arus Basis (mA)/ Tegangan VCE (mV)
40
35
1
30
25
2
20
3
15
VCE
10
5
0
100
200
300
400
500
600
RB (Ohm)
700
800
900
1000
8
LM 339/239
VCC
Rpull-up
Beban
OPEN
COLLECTOR
9
12V
AND
+
1K
_
+
_
10
12V
4,7K
+
8,2K
1K
_
Lampu
Vin
12V
+
4,7K
_
1K
11
12
IC 555
13
LM 741
14
LM 358
15
TOTEM POLE OUTPUT
LM 358
16
SOURCE CURRENT
17
SINK CURRENT
18
LM 124/234/324
19
IC 555
20
PROYEK KITA
relay
DIODA
FOTO
KOMPARATOR
SCHMITT
R
21
Field Effect Transistor - FET
Mengapa kita masih perlu transistor jenis
lain?
BJT mempunyai sedikit masalah.
BJT selalu memerlukan arus basis IB,
walaupun arus ini kecil, tetapi tidak bisa
diabaikan, terutama sekali saat BJT
digunakan sebagai saklar, pasti dibutuhkan
arus yang cukup besar untk membuat
transistor jenuh.
22
Field Effect Transistor - FET
Apakah ada jenis transistor lain yang bisa
digerakkan dengan tegangan tanpa
membutuhkan arus ?
Jawabannya ada di FET.
Dengan perantaraan FET, kita dapat menghubungkan
peralatan komputer atau transduser yang tidak bisa
menghasilkan arus, dengan alat yang lebih besar.
FET bisa digunakan sbg bufer, sehingga tidak
membutuhkan arus dari komputer/trasduser.
Teknologi modern pembuatan IC, ternyata dimensi transistor
FET bisa dibuat sangat kecil, sehingga pembuatan IC saat 23ini
berdasarkan transistor FET ini.
FET vs BJT
FET
BJT
Gate (G)
Drain(D)
Source(S)
Base (B)
Collector (C)
Emitter(E)
Gate Voltage
Drain current
Drain-source voltage
Base current
Collector current
Collector-Emitter Voltage
24
Jenis-jenis FET
•
•
•
•
JFET (Junction FET)
MOSFET (Metal Oxide Silikon FET)
PMOS ( MOS saluran P)
NMOS (MOS saluran N)
• Masih banyak lagi
25
ID
FET
VDS
FET
Parameter FET : ID, VGS, VDS.
VGS
Dasar pemikiran FET:
IS
Ada arus ID = IS yang mengalir melalui
saluran, yang besarnya saluran dikendalikan
oleh tegangan VGS.
Karena arus lewat saluran (yang berupa
hambatan) maka ada tegangan VDS.
26
Junction FETs
27
JFET saluran N
28
Daerah deplesi membesar dengan bertambahnya tegangan balik
29
30
Saluran N
31
32
33
34
Arus Drain current vs tegangan drain-ke-source
(tegangan gate-source = 0)
35
n-Channel FET for vGS = 0.
36
Typical drain characteristics of an n-channel JFET.
37
If vDG exceeds the breakdown voltage VB,
drain current increases rapidly.
38
39
KURVA KARAKTERISTIK Junction FET
Hubungan
VGS dan ID
I D  k VGS  VP 
2
k : konstanta
VP : tegangan pinch-off atau threshold.
Arus dibatasi hanya saat tegangan VGS = 0
40
Junction FET – Sumber Arus
VDD
RLoad
RS
Kurva tak dipengaruhi tegangan VDS.
Arus hanya dipengaruhi VGS bukan VDS.
RS membuat VGS selalu negatip.
Misalnya RS = 4K,  VGS = -4 V.
Arus di Rload = 1 mA.
41
KURVA VDS-ID Junction FET
Linear
Ada dua daerah operasi
:
Saturation
saturation
linear.
Linear
Saturation
I D  k VGS  VP 
2


VDS
I D  2k VGS  VP VDS 

2


2
42
JFET - variable resistor
VDD
For low values of VDS the
slopes, change from
RD
VGS
RG
a resistance
(~5v/2.7mA~1.9k) to
a resistance
(5v/10mA~0.5k).
A resistance is
controlled by an
input voltage.
VDS, DRAIN-SOURCE
VOLTAGE, (Volts)
This makes it possible to have an element in a
circuit that can be electronically adjusted.
43
JFET - variable resistor (2)
VDD
RD
VGS
RG
Now lets analyze the circuit. In the linear region
we had a relationship between ID and VDS.
2


VDS
I D  2k VGS  VT VDS 

2


To find the effective resistance this is the voltage
across the channel divided by the current through
the channel.

1
ID
VDS 

 2k VGS  VT  

RDS VDS
2


If it wasn’t for the last term, we would have a value of 1/RDS that was
proportional to VGS, the control voltage and didn’t depend on VDS
(remember VT is a constant of the FET, the pinch off voltage). This is like
a resistor, and it forms a VOLTAGE DIVIDER with RD.
44
n-Channel depletion MOSFET.
45
n-Channel enhancement MOSFET
showing channel length L and channel width W.
46
n-Channel depletion MOSFET
showing channel length L and channel width W.
47
enhancement-mode n-channel MOSFET
48
vGS < Vto  pn junction antara drain dan
body  reverse biased  iD=0.
49
Terbentuk saluran N
vGS < Vto  pn junction antara drain dan
body  reverse biased  iD=0.
50
For vGS < Vto the pn junction between drain and body
is reverse biased and iD=0.
51
vGS >Vto  terbentuk saluran n.
vGS bertambah  saluran membesar.
vDS kecil ,I D sebanding dengan vDS.
resistor tergantung nilai vGS.
52
vDS bertambah, saluran mengecil di drain dan
Laju pertambahan iD : melambat
Saat vDS> vGS -Vto,  iD tetap
53
Threshold Voltage
Vto (VP)
54
Kurva karakteristik transistor NMOS
55
Drain characteristics
56
Rangkaian penguat sederhana menggunakan NMOS .
57
Drain characteristics and load line
58
vDS versus time.
59
60
Graphical solution
61
62
The more nearly horizontal bias line results in less change in the Q-point.
63
Sinyal campuran
64
Rangkaian Ekivalen FET
65
Rangkaian ekivalen FET ( iD terpengaruh vDS)
66
Penentuan gm dan rd
67
Common-source amplifier.
68
Rangkaian Ekivalen Common-Source amplifier.
69
Common-source amplifier dengan nilai R
70
vo(t) dan vin(t) versus time
71
Gain magnitude versus frequency
72
Source follower.
73
Rangkaian Ekivalen Source Follower.
74
Common-gate amplifier.
75
n-Channel depletion MOSFET.
76
Drain current versus vGS in the saturation region
for n-channel devices.
77
p-Channel FET circuit symbols.
Sama = n-channel devices,
kecuali arah panah
78
MOSFET-switch
VDD
RLOAD
RG
VGS
IRF510
Power MOSFET dapat dialiri arus
besar sampai 75 A, dan daya 150 W.
Saat ON punya hambatan sekitar 10
Ohm.
Contoh : IRF510
Mempunyai arus maksimum 5,6 A
dab hambatan saat ON 0,4 Ohm. 79
MOSFET-switch (2)
Note the
log scale!
Kurva ID vs. VGS.
Ideal saklar:
ON
saat OFF  Arus =0.
Dari kuva terlihat :
Tegangan VGS
< 3 volt,  ID = 0
>5V
 arus besar.
OFF
80
PMOS
gate
In this device the gate controls hole
flow from source to drain.
source
It is made in n-type silicon.
|VGS |>|Vt |
+
gate
drain
P-MOS
p
drain
p
n-type Si
What if we apply a big negative
voltage on the gate?
If |VGS |>|Vt | (both negative)
p
p
source
n-type Si
then we induce a + charge on
the surface (holes)
81
NMOS and PMOS Compared
NMOS
“Body”
– p-type
Source – n-type
Drain
– n-type
VGS
– positive
VT
– positive
VDS
– positive
ID
– positive (into drain)
G
S
D
ID
n
n
p
ID
B
ID
VGS=3V
1 mA
(for IDS =
1mA)
2
3
4
VGS= 3V
1 mA
(for IDS =
-1mA)
VGS=0
1
PMOS
“Body”
– n-type
Source – p-type
Drain
– p-type
VGS
– negative
VT
– negative
VDS
– negative
ID
– negative (into drain)
G
S
D
ID
p
n
B
VGS=0
VDS
1
2
3
4
VDS
82
CIRCUIT SYMBOLS
D
G
D
G
S
NMOS circuit symbol
S
PMOS circuit symbol
A small circle is drawn at the gate
to remind us that the polarities are
reversed for PMOS.
83
PMOS Transistor Switch Model
Operation compared to NMOS: It is complementary.
VDD
S
G
VDD
S
S
G
G
VDD
VG =0
VG = VDD
V=0
D
Switch OPEN
D
Switch CLOSED
D
For PMOS for the normal circuit connection is to connect
S to VDD (The function of the device is a “pull up”)
Switch is closed: Drain (D) is connected to Source (S) when VG =0
Switch is open :
Drain (D) is disconnected from Source (S) when VG = VDD
84