Survey
* Your assessment is very important for improving the workof artificial intelligence, which forms the content of this project
* Your assessment is very important for improving the workof artificial intelligence, which forms the content of this project
Computer Architecture Part II-B: CPU Instruction Set 1 Levels of Representation temp = v[k]; High Level Language Program v[k] = v[k+1]; v[k+1] = temp; Compiler mov BL, 02h mov AX,0A56h mul BL Assembly Language Program Assembler Machine Language Program 0000 1010 1100 0101 1001 1111 0110 1000 1100 0101 1010 0000 0110 1000 1111 1001 1010 0000 0101 1100 1111 1001 1000 0110 0101 1100 0000 1010 1000 0110 1001 1111 Machine Interpretation Control Signal Specification ALUOP[0:3] <= InstReg[9:11] & MASK 2 Instruction Set Design software instruction set hardware Which is easier to change? 3 Instruction Set The set of machine level instructions for a particular type of computer or hardware 4 Instruction Cycle The sequence of operations involved in processing an instruction 5 Instruction Cycle Instruction Obtain instruction from program storage Fetch Determine required actions and instruction size Instruction Locate and obtain operand data Operand Decode Fetch Compute result, value or status Deposit results in storage for later use Determine successor instruction Execute Result Store Next Instruction 6 CPU-Memory Handshake The CPU operates, then memory There is a need for synchronization between CPU and memory Can be done through handshaking Memory can inform the CPU that it has completed its read/write request through a Memory Function Complete (MFC) signal 7 Types of Control Hardwired Microprogrammed 8 Hardwired Control Pure hardware mode of control The control unit tells the rest of the CPU what is to be done every clock cycle during the execution of instructions Involves complex circuit design 9 Hardwired Control Considerations Fast Permanent Everything is done through hardware Difficult and costly to do modifications Difficult to implement in a large instruction set 10 Microprogrammed Control Each instruction is broken down into a series of steps, i.e. microinstructions (or microcode) The control unit becomes a miniature computer The complete set of steps for each instruction is stored in a ROM called the control store, and is executed sequentially 11 Microprogrammed Control Decoding involves obtaining the starting address in the control store of the first control word (or microinstruction) for the instruction 12 Microprogrammed Control Considerations Flexible Only the control store needs modifications to implement/modify instruction execution Slower May require more hardware 13 Microprogrammed Control Units Introduced by IBM in 1964 Microprogrammed control units have seen widespread use for several reasons: Easy to implement complex instructions Cost of microprogramming is far less than the cost of implementing a conventional hardwired control unit Easy to add instructions and/or modify existing ones 14 CISC and RISC There are two schools of thought on instruction set design: Complex instruction set computers (CISC) Reduced instruction set computers (RISC) 15 Complex Instruction Set Computers (CISC) Upward compatibility New processor designs had to provide more power over older models while maintaining compatibility More complex and powerful instructions! Generally requires the use of microcode Easily benefits from improved technology 16 CISC Richer or more complex instruction sets simplify compiler design Reduced software development and learning costs More powerful instructions means fewer instructions are needed to implement software routines Reduced system memory and bandwidth requirements 17 CISC Issues The more complex the instruction set, the larger the required control store Compilers tend to make use of few of the available instructions 80/20 rule: Analysis of the instruction mix generated by CISC machines shows that 80% of the instructions executed used only 20% of the instructions set 18 CISC Issues CISC designers may have introduced a lot of instructions simply because it was easy to do OR because its competitors did so Manufacturing cost is increased because of the need to test all operations and combinations of operations Design cost is increased for future systems because of the need to maintain upward or forward compatibility 19 Reduced Instruction Set Computers (RISC) 80/20 rule: If the most often used instructions (the 20%) was speeded up then the performance benefits would be greater Studies showed that these instructions tend to perform simpler operations and would use only the simpler addressing modes Complex operations can still be done by using several simpler operations 20 Why RISC? Basic hardware is simpler to implement Easier to adopt hardwired control. Easier to compile for a RISC than a CISC architecture Design effort and development cost is less for RISC than for a CISC processor 21 RISC CPU Characteristics Fewer instructions More CPU registers More instructions needed to execute routines May mean more memory space and increased bandwidth requirements 22