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IL 2222 - MOSFET Professor Ahmed Hemani Dept. Of ES, School of ICT, KTH Kista Email: [email protected] Website: www.it.kth.se/~hemani MOS Capacitor, MOSFET MOS: Metal-Oxide-Semiconductor Vg ~1.5nm thick Few oxide molecules Usually made of Poly Silicon Vg gate gate metal SiO2 SiO2 N+ Si body MOS capacitor N+ P-body MOS transistor Modern Semiconductor Devices for Integrated Circuits (C. Hu) Energy Diagram at Vg= 0 Flat-band Condition and Flat-band Voltage Surface Accumulation Fs is neglible in accumulation Make Vg < Vfb Vg V fb s Vox s : surface potential, band bending Vox: voltage across the oxide Surface Depletion ( vg > vfb ) qN a 2 s s Qdep qN aWdep Qs Vox Cox Cox Cox Cox Surface Depletion Vg V fb s Vox V fb s qN a 2 s s Cox Modern Semiconductor Devices for Integrated Circuits (C. Hu) Slide 5-7 Threshold Condition and Threshold Voltage Threshold (of inversion): ns = Na , or (Ec–Ef)surface= (Ef – Ev)bulk , or A = B, and C = D kT N a st 2B 2 ln q ni kT N v kT N v kT N a qB ( E f Ev ) |bulk ln ln ln 2 q ni q N a q ni Eg Modern Semiconductor Devices for Integrated Circuits (C. Hu) Threshold Voltage Vg V fb s Vox At threshold, kT N a st 2B 2 ln q ni Vox qN a 2 s 2B Cox qN a 2 s 2B Vt Vg at threshold V fb 2B Cox Modern Semiconductor Devices for Integrated Circuits (C. Hu) Threshold Voltage Vt V fb 2 B qN sub 2 s 2 B Cox + for P-body, – for N-body Strong Inversion–Beyond Threshold Vg > Vt Wdep 2 s 2B Wdmax qN a Inversion Layer Charge, Qinv (C/cm2) Vg V fb 2B Vt Qinv Cox Qdep Cox qN a 2 s 2B Qinv Qinv V fb 2B Cox Cox Cox Qinv Cox (Vg Vt ) Modern Semiconductor Devices for Integrated Circuits (C. Hu) Choice of Vt and Gate Doping Type Vt is generally set at a small positive value So that, at Vg = 0, the transistor does not have an inversion layer and current does not flow between the two N+ regions. Enhancement type device • P-body is normally paired with N+-gate to achieve a small positive threshold voltage. • N-body is normally paired with P+-gate to achieve a small negative threshold voltage. Modern Semiconductor Devices for Integrated Circuits (C. Hu) Review : Basic MOS Capacitor Theory Modern Semiconductor Devices for Integrated Circuits (C. Hu) Review : Basic MOS Capacitor Theory total substrate charge, Qs Qs Qacc Qdep Qinv Modern Semiconductor Devices for Integrated Circuits (C. Hu) MOS CV Characteristics dQg dQs C dVg dVg Modern Semiconductor Devices for Integrated Circuits (C. Hu) MOS CV Characteristics dQg dQs C dVg dVg The quasi-static CV is obtained by the application of a slow linearramp voltage (< 0.1V/s) to the gate, while measuring Ig with a very sensitive DC ammeter. C is calculated from Ig = C·dVg/dt. This allows sufficient time for Qinv to respond to the slow-changing Vg . Modern Semiconductor Devices for Integrated Circuits (C. Hu) Equivalent circuit in the depletion and the inversion regimes C p oly Cox Co x Cdep Cp oly Cox Co x Cdep Cin v (a) General case for both depletion and inversion regions. Cdep, min (b) In the depletion regions Cinv Cinv (c) Vg Vt Modern Semiconductor Devices for Integrated Circuits (C. Hu) (d) Strong inversion MOSFET The MOSFET (MOS Field-Effect Transistor) is the building block of Gb memory chips, GHz microprocessors, analog, and RF circuits. MOSFET the following characteristics: • small size • high speed • low power • high gain Modern Semiconductor Devices for Integrated Circuits (C. Hu) Introduction to the MOSFET Basic MOSFET structure and IV characteristics Modern Semiconductor Devices for Integrated Circuits (C. Hu) Introduction to the MOSFET Two ways of representing a MOSFET: Modern Semiconductor Devices for Integrated Circuits (C. Hu) Complementary MOSFETs Technology Modern Semiconductor Devices for Integrated Circuits (C. Hu) CMOS (Complementary MOS) Inverter Modern Semiconductor Devices for Integrated Circuits (C. Hu) MOSFET Vt and the Body Effect Two capacitors => two charge components Cdep s Wd max Qinv Coxe (Vgs Vt ) CdepVsb Coxe (Vgs (Vt Cdep Coxe Vsb )) • Redefine Vt as Vt (Vsb ) Vt 0 Cdep Coxe Modern Semiconductor Devices for Integrated Circuits (C. Hu) Vsb Vt 0 Vsb MOSFET Vt and the Body Effect • Body effect: Vt is a function of Vsb. When the source-body junction is reverse-biased, Vt increases. Vt (V) NFET 0.6 model data 0.4 Vt 0 0.2 • Body effect coefficient: 0 1 2 -0.2 PFET -0.4 Vt0 = Cdep/Coxe = 3Toxe / Wdep -1 Vt Vt 0 Vsb -2 -0.6 Body effect slows down circuits? How can it be reduced? Modern Semiconductor Devices for Integrated Circuits (C. Hu) Vs b (V) Retrograde Body Doping Profiles Wdmax for retrograde doping Vt (V) NFET 0.6 model data 0.4 Vt 0 0.2 -2 -1 0 1 -0.2 -0.4 Vt0 PFET Wdmax for uniform doping -0.6 • Wdep does not vary with Vsb . • Retrograde doping is popular because it reduces off-state leakage and allows higher surface mobility. Modern Semiconductor Devices for Integrated Circuits (C. Hu) 2 Vs b (V) Uniform Body Doping When the source/body junction is reverse-biased, there are two quasi-Fermi levels (Efn and Efp) which are separated by qVsb. An NMOSFET reaches threshold of inversion when Ec is close to Efn , not Efp . This requires the band-bending to be 2B + Vsb , not 2B. qN a 2 s Vt Vt 0 ( 2 B Vsb 2 B ) Coxe Vt 0 ( 2 B Vsb 2 B ) is the body-effect parameter. Modern Semiconductor Devices for Integrated Circuits (C. Hu) Qinv in MOSFET Channel voltage Vcs (x) x = 0: Vcs = Vs x = L: Vcs = Vd Vt (Vsb ) Vt 0 • Qinv = – Coxe(Vgs – Vcs – Vt0 – (Vsb+Vcs) = – Coxe(Vgs – Vcs – (Vt0 + Vsb) – Vcs) = – Coxe(Vgs – mVcs – Vt) • m 1 + = 1 + 3Toxe/Wdmax m is called the bulk-charge factor Typically m is 1.2 but can be simplified to 1 Modern Semiconductor Devices for Integrated Circuits (C. Hu) Cdep Coxe Vsb Vt 0 Vsb How to Measure the Vt of a MOSFET ? A B I dsat W Coxe (Vgs Vt ) m nsVds Vgs Vt L •Method A. Vt is measured by extrapolating the Ids versus Vgs curve to Ids = 0. •Method B. The Vg at which Ids =0.1mA W/L Modern Semiconductor Devices for Integrated Circuits (C. Hu) Basic MOSFET IV Model Ids= WQinvv= WQinvmnE = WCox(Vgs– mVcs – Vt)mndVcs/dx L 0 Vds I dsdx WCox mn (Vgs mVcs Vt )dVcs 0 IdsL = WCoxmn(Vgs – Vt – mVds/2)Vds W m Process I ds Cox mn (Vgs Vt Vds )Vds k ' n C m mn ox ox n L 2 t ox Transconductance W ' m k n (Vgs Vt Vds )Vds W ' L 2 k n k n Gain factor L m kn (Vgs Vt Vds )Vds m is typically 1.2 but can be simplified to 1 2 Modern Semiconductor Devices for Integrated Circuits (C. Hu) Vdsat : Drain Saturation Voltage dI ds 0 kn (Vgs Vt mVds ) dVds Vdsat Modern Semiconductor Devices for Integrated Circuits (C. Hu) Vgs Vt m Saturation Current and Transconductance Drain current in saturation region 1 I dsat kn(Vgs Vt )2 2m Transconductance: gm= dIds/dVgs g msat W Coxe m ns (Vgs Vt ) mL Modern Semiconductor Devices for Integrated Circuits (C. Hu) Saturation – Pinch Off VGS VDS > VGS - VT G D S n+ - Modern Semiconductor Devices for Integrated Circuits (C. Hu) VGS - VT + n+ Channel Length Modulation 1 I dsat kn(Vgs Vt )2( 1 λVds ) 2m • Increasing the Vds has the effect of the reducing the channel length as the depletion region on the drain side increases. • Channel length reduction lower resistance Increase in Drain Current • More pronounced for short channels • One of the five short channel effects un (m/s) Velocity Saturation 5 usat= 10 mn E v E 1 Esat Constant velocity E << Esat : v = mn E Constant mobility (slope = µ) xc = 1.5 E >> Esat : v = mn Esat x (V/µm) • Velocity saturation has large and deleterious effect on the Ion of MOSFETS Modern Semiconductor Devices for Integrated Circuits (C. Hu) MOSFET IV Model with Velocity Saturation I ds WQinv v I ds L 0 Vcs /L– the average electric field is replaced by m ns dVcs / dx WC oxe (V gs mVcs Vt ) dVcs 1 /Esat dx I ds dx [WC oxe m ns (V gs mVcs Vt ) I ds / Esat]dVcs V ds 0 I ds L WC oxe m ns (V gs Vt m Vds )Vds I dsVds / Esat 2 Modern Semiconductor Devices for Integrated Circuits (C. Hu) MOSFET IV Model with Velocity Saturation I ds W m C oxe m ns (V gs Vt Vds )Vds 2 L Vds 1 Esat L I ds long - channel I ds 1 Vds / E sat L Modern Semiconductor Devices for Integrated Circuits (C. Hu) MOSFET IV Model with Velocity Saturation dI ds 0, Solving dVds Vdsat 2(V gs Vt ) / m 1 1 2(V gs Vt ) / mEsat L A simpler and more accurate Vdsat is: 1 Vdsat m 1 V gs Vt Esat L Esat 2vdsat m ns Modern Semiconductor Devices for Integrated Circuits (C. Hu) EXAMPLE: Drain Saturation Voltage Question: At Vgs = 1.8 V, what is the Vdsat of an NFET with Toxe = 3 nm, Vt = 0.25 V, and Wdmax = 45 nm for (a) L =10 mm, (b) L = 1 um, (c) L = 0.1 mm, and (d) L = 0.05 mm? Solution: From Vgs , Vt , and Toxe , mns is 200 cm2V-1s-1. Esat= 2vsat/m ns = 8 104 V/cm m = 1 + 3Toxe/Wdmax = 1.2 V dsat m 1 V V E L sat gs t 1 | | Modern Semiconductor Devices for Integrated Circuits (C. Hu) EXAMPLE: Drain Saturation Voltage V dsat m 1 V V E L sat gs t 1 | | (a) L = 10 mm, Vdsat= (1/1.3V + 1/80V)-1 = 1.3 V (b) L = 1 mm, Vdsat= (1/1.3V + 1/8V)-1 = 1.1 V (c) L = 0.1 mm, Vdsat= (1/1.3V + 1/.8V)-1 = 0.5 V (d) L = 0.05 mm, Vdsat= (1/1.3V + 1/.4V)-1 = 0.3 V Modern Semiconductor Devices for Integrated Circuits (C. Hu) Idsat with Velocity Saturation Substituting Vdsat for Vds in Ids equation gives: W I dsat C ox 2mL (V gs Vt ) 2 long - channel I dsat ms V gs Vt V gs Vt 1 1 mEsat L mEsat L Very short channel case: Esat L << V gs Vt I dsat Wv sat C ox (V gs V t mEsat L ) I dsat Wv sat C ox (V gs V t ) Idsat is proportional to Vgs–Vt rather than (Vgs – Vt)2 , not as sensitive to L Modern Semiconductor Devices for Integrated Circuits (C. Hu) Current-Voltage Relations A good ol’ transistor 6 x 10 -4 VGS= 2.5 V 5 Resistive Saturation 4 ID (A) VGS= 2.0 V 3 VDS = VGS - VT 2 VGS= 1.5 V 1 0 Quadratic Relationship VGS= 1.0 V 0 0.5 1 1.5 VDS (V) 2 2.5 Velocity Saturation The IDSAT in short Channel Device has linear dependence on VGS as opposed to square dependence thus significantly reducing the drain current delivered for a given voltage and thus slows Long-channel device down the device ID V GS =V DD Short-channel device V DSAT V GS -V T VDS The Short Channel Device enters saturation before VDS > VGS - VT 0.1 V gs = 1.0V Velocity Saturation 0.0 0 1 2 2.5 V ds (V) 0.4 L = 0.15 mm V gs = 2.5V I ds (mA/mm) Vt = 0.4 V 0.03 (b) L = 2.0 mm Vgs = 2.5V Vt = 0.7 V 0.3 0.02 V gs = 2.0V Ids (mA/mm) ) 0.2 V gs = 1.5V 0.1 Vgs = 2.0V 0.01 Vgs = 1.5V V gs = 1.0V Vgs = 1.0V 0.0 0.0 0 1 V ds (V) 0.03 ) 2 2.5 Vds (V) What is the main difference between the Vg dependence Vgs = 2.5V Lof = 2.0 mmlong- and short-channel the length IV curves? Vt = 0.7 V m) 0.02 Modern Semiconductor Devices for Integrated Circuits (C. Hu) Sub-Threshold Conduction -2 10 I D I 0e Linear qVGS nkT qV DS 1 e kT qVGS nkT CD , n 1 Cox -4 10 I D ~ I 0e -6 Quadratic ID (A) 10 The Slope Factor -8 10 -10 Exponential -12 VT 10 10 0 0.5 S is DVGS for ID2/ID1 =10 1 1.5 VGS (V) 2 2.5 Typical values for S: 60 .. 100 mV/decade -4 2.5 x 10 VDS=VDSAT 2 Velocity Saturated ID (A) A Unified Model 1.5 Linear 1 VDSAT=VGT 0.5 VDS=VGT 0 0 0.5 Saturated 1 1.5 VDS (V) G S D B 2 2.5 Transistor Model for Manual Analysis The Transistor as a Switch 7 x 10 VGS V T 5 Ron 6 S Req (Ohm) 5 D 4 ID 3 V GS = VD D 2 Rmid 1 0 0.5 1 1.5 V DD (V) 2 2.5 R0 V DS VDD/2 VDD The Transistor as a Switch Dynamic Behavior of MOS Transistor G CGS CGD D S CGB CSB B CDB The Gate Capacitance Polysilicon gate Source Drain xd n+ xd Ld W n+ Gate-bulk overlap Top view Gate oxide tox n+ L Cross section n+ Gate Capacitance G G CGC CGC D S Cut-off G CGC D S Resistive D S Saturation Most important regions in digital design: saturation and cut-off Gate Capacitance CG C WLC ox WLC ox CGC B C G CS = CG CD 2 VG S Capacitance as a function of VGS (with VDS = 0) WLC ox CG C 2WLC ox CG CS WLC ox 2 3 CGCD 0 VDS /(VG S-VT) 1 Capacitance as a function of the degree of saturation Diffusion Capacitance Channel-stop implant N 1A Side wall Source ND W Bottom xj Side wall LS Substrate Channel NA Capacitances in 0.25 mm CMOS process MOSFET – Some Secondary Effects VT VT Long-channel threshold L Threshold as a function of the length (for low V DS ) Low V DS threshold VDS Drain-induced barrier lowering (for low L ) Parasitic Resistances Polysilicon gate RD LD G Drain contact S D RS W VGS,eff RD Drain RS,D = R LS,D/W + RC SPICE Models for the MOS Transistor • Three Levels – Level 1 • Long Channel, Channel Length Modulation – Level 2 • Geometry based that includes detailed device physics • Velocity saturation, mobility degradation, DIBL • Analytical physics based model makes it complex and inaccurate – Level 3 • Semi-empirical model • Measured data to calibrate and decide the main parameters • Accurate and efficient. Widely used. BSIM3-V3 Parameter Category Description Control Selection of level and models for mobility, capacitance and noise DC Parameters for threshold and current and calculations AC & Capacitance Parameters for capacitance computations dW and dL Derivation of effective channel length and width Process Process parameters such as oxide thickness and doping concentrations TOX, XJ, GAMMA1, NCH, NSUB Temperature Nominal temperature and temperature coefficients for various device parameters TNOM Bin Bounds device dimensions for which the model is valid LMIN, LMAX, WMIN, WMAX Flicker Noise Noise model parameters SPICE Transistor Parameters Parameter Name Symbol SPICE Name Units Default Value Drawn Length L L m - Effective Width W W m - Source Area AREA AS m2 0 Drain Area AREA AD m2 0 Source Perimeter PERIM PS m 0 Drain Perimeter PERIM PD m 0 Squares of Source Diffusion NRS - 1 Squares of Drain Diffusion NRD - 1