Download ECE 342 – Jose Schutt-Aine

ECE 242
Solid-State Devices & Circuits
15. Current Sources
Jose E. Schutt-Aine
Electrical & Computer Engineering
University of Illinois
[email protected]
ECE 342 – Jose Schutt-Aine
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Amplifier with Diode-Connected Load
Amplifier is single stage
M1 driving a load
impedance which is that
looking into the source of
M2
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Output Impedance
To calculate output
impedance, connect
voltage supply at source of
M2 and measure current
vs 2
is 2  g m 2vs 2  g mb 2vs 2 
rds 2
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Output Impedance
vs 2
1
Rs 2 

is 2 g m 2  g mb 2  g ds 2
M1 sees this load in parallel with its own output
impedance,rds1
Rout
1
 rds1 || RS 2 
g m 2  g mb 2  g ds 2  g ds1
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Incremental model
The source to-body voltage changes in M2
use transconductance term gmb2
AMB   g m1Rout
g m1

g m 2  g mb 2  g ds 2  g ds1
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Gain – Diode-Connected Amp
AMB
g m1

gm2
gm  2nCox (W / L) I D
AMB
2nCox (W1 / L1 ) I D
1/ 2
 (W1 / L1 ) 

 

2nCox (W2 / L2 ) I D
 (W2 / L2 ) 
The magnitude of the voltage gain varies as
the square root of the aspect ratio
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pMOS Diode-Connected Amp
• Analog Design Requirements
– Load device can be
replaced by pMOS transistor
– Eliminates body effect of the
load device
– Increases the resistance
 nCoxn W1 / L1  


  pCoxp W2 / L2  
1/ 2
AMB
 3 W1 / L1  


 W2 / L2  
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Integrated Circuits
• IC Requirements
– Biasing of ICs is based on the use of constant
current sources
– Use current mirrors
– Source circuits are used as loads
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Integrated Circuits
• Analog Design Requirements
– Analog ICs may need resistors and capacitors for
the design of amplifiers
– Resistors and capacitors occupy the space of
tens or hundreds of MOS devices
– It is important to minimize their use
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Transistor Biasing
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Transistor Biasing
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Current Mirrors
A current mirror will reproduce a reference current to the
output while allowing the output voltage to assume any
value within a specified range. Io=KIin where K is a factor
that can be less than or equal or greater than 1
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MOS Current Mirror
1 ' W 
2
I D1  kn   VGS  VTn 
2  L 1
I D1  I REF
VDD  VGS

R
1 ' W 
2
I o  I D 2  kn   VGS  VTn 
2  L 2
R is usually external to IC
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MOS Current Mirror
Assuming that the transistors are using the
same process
Io
I REF
W / L 2 W2 L1


W / L 1 W1L2
• Can be limited by
– Channel length modulation (l)
– Threshold voltage mismatch
– Imperfect geometrical matching
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MOS Current Mirror
Io
I REF
•
W2 L1 1  l VDS 2  VDSP 2  



W1L2  1  l VDS 1  VDSP1  
Some Properties
1. MOS current mirrors draw zero control
currentbetter than BJT’s
2. Matching of threshold voltages harder than
in BJT’s
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Example
A matched pair of MOSFETs are used in a current mirror
witl l = 0.032 V-1, Cox=70 A/V2, W/2L =10, and VT = 0.9
V. Find the value of R to create an input current of 100
A. Calculate the output current when Vo = 3 V.
Use drain current equation in active region to
calculate
I D1 
CoxW
2L
VGS  VT  1  lVDS1 
2
I D1  100  700VGS  0.9 1  0.032*VGS 
2
We can now solve for the value of VGS
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Example
MOS Current Mirror
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Example
VGS = 1.272 V
The resistance needed is:
5  VDS 1 5  1.272
R

 37.2 k 
I D1
0.1
The output current is calculated from:
I D2 
I D2
CoxW
VGS  VT  1  lVDS1 
2
2L
2
 7001.272  0.9 1  0.032  3  106  A
I D 2  106  A
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BJT Current Mirror
• Characteristics
– Base current is not zero
– Depends on relative areas
of emitter-base junction
– Want Io=IREF
Io
I REF
I s 2 Area of EBJ of Q2


I s1 Area of EBJ of Q1
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Multiple Output Current Mirror
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