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ECE 301 – Digital Electronics Electrical and Timing Characteristics of Standard Logic Gates (Lecture #2) Standard Logic Gates Device Logic Gate 74xx08 Quad 2-input AND gate 74xx32 Quad 2-input OR gate 74xx04 Hex Inverter (NOT gate) 74xx00 Quad 2-input NAND gate 74xx02 Quad 2-input NOR gate 74xx86 Quad 2-input XOR gate Note: “xx” refers to the logic family Spring 2011 ECE 301 - Digital Electronics 2 Logic Families Transistor TTL Logic Family xx Low Power L High Speed H Schottky S Low Power Schottky LS Advanced Schottky AS Adv Low Power Schottky ALS Fast F High Speed HC Advanced AC CMOS Spring 2011 ECE 301 - Digital Electronics 3 Comparison of Logic Families Spring 2011 ECE 301 - Digital Electronics 4 Example: 74LS08 (see data sheet for 74LS08) Spring 2011 ECE 301 - Digital Electronics 5 Example: 74HC08 (see data sheet for 74HC08) Spring 2011 ECE 301 - Digital Electronics 6 Basic Electrical Characteristics Spring 2011 ECE 301 - Digital Electronics 7 Logic Gates Logic gates are the basic building blocks for (combinational and sequential) logic circuits. They are, however, abstractions. Spring 2011 ECE 301 - Digital Electronics 8 Logic Gates In fact, logic gates are electrical circuits. Spring 2011 ECE 301 - Digital Electronics 9 Logic Gates As such, the logic levels must be represented using an electrical characteristic. Most technologies use voltages to represent the logic levels. TTL CMOS Some, but very few, technologies use currents to represent the logic levels. Spring 2011 ECE 301 - Digital Electronics 10 Representing Logic Levels Ideally, a single voltage value is specified for each logic level. VDD (power) → Logic 1 GND (ground) → Logic 0 Logic 1 = high voltage Logic 0 = low voltage Spring 2011 11 Representing Logic Levels In reality, a range of voltages is specified for each logic level. VDD Logic 1 V1,MIN Undefined Threshold voltages V0,MAX Logic 0 GND Spring 2011 ECE 301 - Digital Electronics 12 Representing Logic Levels Furthermore, voltage ranges, for logic 1 and logic 0, are specified for both the input and the output of a logic gate. They are defined in terms of four parameters VOH = output high voltage VIH = input high voltage VOL = output low voltage VIL = input low voltage These are specified in the data sheet for the corresponding logic gate. They differ from one logic family to another. Spring 2011 ECE 301 - Digital Electronics 13 Representing Logic Levels Input Output VDD VDD Logic 1 VOH Logic 1 VIH Undefined Undefined VIL Logic 0 GND VIH = min. volt. for Logic 1 VIL = max. volt. for Logic 0 Spring 2011 VOL Logic 0 GND VOH = min. volt. for Logic 1 VOL = max. volt. for Logic 0 ECE 301 - Digital Electronics 14 Example: 74LS08 VIH, VIL VOH, VOL Spring 2011 ECE 301 - Digital Electronics 15 Example: 74LS32 VIH, VIL VOH, VOL Spring 2011 ECE 301 - Digital Electronics 16 Example: 74HC32 VIH, VIL VOH, VOL Spring 2011 ECE 301 - Digital Electronics 17 Example: 74LS04 VIH, VIL VOH, VOL Spring 2011 ECE 301 - Digital Electronics 18 Basic Timing Characteristics Spring 2011 ECE 301 - Digital Electronics 19 Time Delay (aka. Latency) A standard logic gate does not respond to a change on one of its inputs instantaneously. There is, instead, a finite delay between a change on the input and a change on the output. The propagation delay of a standard logic gate is defined for two cases: Spring 2011 tPLH = delay for output to change from low to high tPHL = delay for output to change from high to low ECE 301 - Digital Electronics 20 Time Delay low-to-high transition high-to-low transition tPHL Spring 2011 tPLH ECE 301 - Digital Electronics 21 Time Delay The time delay (both tPLH and tPLH) for a logic gate is specified in its data sheet. The time delay is also known as the Spring 2011 gate delay propagation delay of the logic gate latency ECE 301 - Digital Electronics 22 Example: 74LS08 tPHL, tPLH Spring 2011 ECE 301 - Digital Electronics 23 Example: 74LS32 tPHL, tPLH Spring 2011 ECE 301 - Digital Electronics 24 Example: 74HC32 tPHL, tPLH Spring 2011 ECE 301 - Digital Electronics 25 Example: 74LS04 tPHL, tPLH Spring 2011 ECE 301 - Digital Electronics 26 Time Delay The propagation delay of a logic circuit can be determined using the time delay of the individual logic gates. The critical path in the logic circuit must be identified. The critical path is the path with the greatest delay. The propagation delay of a logic circuit can be used to define Spring 2011 When the output of the logic circuit is valid. The maximum speed of a combinational logic circuit. The maximum frequency of a sequential logic circuit. ECE 301 - Digital Electronics 27 Questions? Spring 2011 ECE 301 - Digital Electronics 28