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Transcript
Introduction to SwitchedCapacitor Circuits
Sections 14.1 & 14.2
Integrated Circuit Capacitors
Chapter 14 Figure 1
Parasitic capacitances associated with an integrated
circuit capacitor are often no symmetric, as
indicated by the schematic symbol above
CMOS Switches
Chapter 14 Figure 2: Switch symbol and some transistor circuits: (a)
symbol, (b) n-channel switch, (c) p–channel switch, (d) transmission gate.
Basic Switched Capacitor
Chapter 14 Figure 4: Resistor equivalence of a switched capacitor.
(a) Switched-capacitor circuit, and (b) resistor equivalent.
Example
• C1 = 5pF, fs = 100kHz
Req = 1/(5e12*100e3) = 2MW!!
• Very large value
• Controllable by changing the clock frequency
Non-overlapping clocks
• Must avoid the situation
where both switches are
closed simultaneously
Simple Switched-Capacitor Integrator
(not used)
Simple Switched-Capacitor Integrator
(not used)
Simple Switched-Capacitor Integrator
(not used)
Simple Switched-Capacitor Integrator
(not used)
• Integrator gain depends upon ratio of capacitor values
• Operation is analogous to a continuous-time active RC
integrator with respect to input frequencies >> fs
Practical integrated circuit capacitors
• Parasitics Cp1,2 are not well controlled and are difficult to
predict
Impact of parasitics on the integrator
• Gain is no longer accurate & well controlled
(Noninverting) Delayed
Switched-Capacitor Integrator
(Noninverting) Delayed
Switched-Capacitor Integrator
(Inverting) Delay-Free
Switched-Capacitor Integrator
(Inverting) Delay-Free
Switched-Capacitor Integrator
(Inverting) Delay-Free
Switched-Capacitor Integrator
Signal Flow Graph Analysis