Download KaizadMistryBio - Purdue College of Engineering

Kaizad Mistry Biography
Kaizad Mistry is vice president of the Technology and Manufacturing Group, and
director of Logic Technology Integration. He is currently responsible for directing
process development activities for Intel's 10nm logic technology. Most recently, he
managed the development of Intel's 22nm logic technology, the world's first to feature 3D Tri-Gate transistors. Previously, he managed the development of Intel's 45nm logic
technology, the world's first to feature high-k plus metal gate transistors. Prior to joining
Intel in 1998, Mistry was with the semiconductor technology division at Digital
Equipment Corp., where he worked on the development of successive process
technology generations from 1.5um CMOS through 0.25um CMOS.
Mistry is an IEEE fellow, has authored or co-authored more than 70 journal and
conference papers and holds 20 patents. In 2006, he was General Chair of the IEEE
International Electron Devices Meeting, the industry's flagship conference on
semiconductor devices. He graduated from the Indian Institute of Technology, Bombay,
in 1984 with a bachelor's degree in electrical engineering. He graduated from the
University of Southern California, Los Angeles in 1986 with a master's degree in
electrical engineering.