Download Testing nonlinear analog circuits by supply current variation and

Testing nonlinear analog circuits by supply current
variation and supply voltage monitoring
Andrzej Kuczyński
Faculty of Electrical, Electronic, Computer and Control Engineering, Lodz University of Technology, Żeromskiego 116, Łódź,
Poland, e-mail: [email protected]
Abstract In this paper a method for testing nonlinear analog circuits by supply current variation and supply voltage monitoring
is presented.
Keywords Analog circuits, fault detection, discrete wavelet transform, feedforward neural network, testing.
I. I NTRODUCTION
Detection and localization of analog electrical circuits
faults is still an important part of modern modeling
and designing process. Procedures based on monitoring
the supply current (IDD tests), when the supply voltage
changes, are often used for analog circuits fault detection
and localization [1]. The aim of this paper is to present
the method for testing nonlinear analog circuits by supply
current variation and supply voltage monitoring (proposed
name – VDD test).
II. T EST DESCRIPTION
To measure the transient supply voltage we need to set
the tested circuit into an unsteady state. For this purpose
at a zero, the supply current value fell from a Imax to a
Imin during the time T like linear function. Imax and Imin values should be determined experimentally, so as not to
damage the system under study. The voltage changes are
illustrated in the Fig. 1. In order to exposure changes of
Imax I
Imin
0
Fig. 1.
features of the device resulting from damages, test signals
will be divided into elements by means of bank of filters
formed with the use of discrete wavelet transform [1], [2].
III. E XAMPLE
The circuit, shown in the figure 2, was chosen as an
example. The figure shows the power supply of the circuit
M7
BSIM3P
M1
BSIM3P
L1
0.025m
R1
1
R7
10
M4
3N128
M6
3N128
Fig. 2.
Y1
volts
M9
BSIM3P
R12
10
V1
1.2
1.3
1.4
Time [s]
Fig. 3.
1.5
·10−8
4th level detail of the supply current (IDD test)
When we apply the test VDD the signals allow the
identification of the fault.
·10−3
5
1
1.2
1.4
Time [s]
Fig. 4.
1.6
1.8
2
−7
·10
4th level detail of the supply voltage (VDD test)
IV. ACKNOWLEDGEMENTS
This work has been supported from the National Science
Centre under Grant UMO-2011/01/B/ST7/06043.
[1] Aminian M., Aminian F.: ”Neural-Network Based Analog-Circuit
Fault Diagnosis Using Wavelet Transform as Preprocessor”, IEEE
Trans. Circuits and Systems, CAS-II, Vol. 47. No. 2, 2000, pp. 151156.
[2] Kuczyński A.: ”Optimization of the test conditions for fault detection
in nonlinear analog circuits using supply current”, Electrical Review,
R.89, Nr. 2a, 2013, pp. 267-269.
R5
10
R9
10
M3
BSIM3P
1.1
R EFERENCES
M8
3N128
M2
3N128
R8
10
1
R4
10
M5
BSIM3P
R6
10
R2
10
·10−5
−5
0.8
Time-varying supply current
R3
10
2
1
0
−1
−2
0
t
T
in the VDD test.
In the damaged circuit, short circuit of transistor M4
was assumed. The Fig. 3 shows the change of the test
signal from the damaged (solid line) and undamaged circuit
(dashed line) when the IDD test is used. As can be seen
the differences are too small to identify damage.
I1
R10
10
M10
3N128
The test circuit
II-9