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IXZ631DF18N50
RF Power MOSFET & Driver
IXZ318N50 MOSFET and IXRFD631 Gate Driver Module
500 V
18 A
0.3 Ω
Features
 Isolated substrate
 High isolation voltage (>2500 V)
 Excellent thermal transfer
 Increased temperature and power cycling capability
 IXYS advanced Z-MOS process for low parasitic capacitance
 Low RDS(ON)
 Very low insertion inductance
 No Beryllium Oxide (BeO) or other hazardous materials
 Latch-up protected
 Low quiescent supply current
 RoHS compliant
Advantages
 Optimized for RF and high speed
 Easy to mount, no insulators needed
 High power density
 Single package reduces size and heat sink area
Applications
•
•
•
•
Class D or E switching generators
Switch mode power supplies (SMPS)
Pulse generators
Transducer driver
Description
The IXZ631DF18N50 is a CMOS high-speed, high-current gate driver and MOSFET combination module specifically
designed for Class D, E, HF, and RF applications at up to 27 MHz, as well as other applications. The IXZ631DF18N50
in pulse mode can provide 95 A of peak current while producing voltage rise and fall times of less than 5 ns, and
minimum pulse widths of 8 ns. The input of the driver is fully immune to latch-up over the entire operating range.
Designed with small internal delays, the IXZ631DF18N50 is suitable for higher power operation where combiners are
used. Its features and wide safety margin in operating voltage and power make the IXZ631DF18N50 unmatched in
performance and value.
The IXZ631DF18N50 is packaged in IXYSRF’s low-inductance RF package incorporating layout techniques to minimize
stray lead inductances for optimum switching performance. The IXZ631DF18N50 is a surface-mountable device.
Figure 1
Functional diagram
IXZ631DF18N50
RF Power MOSFET & Driver
Device Specifications
Parameter
Value
150 °C
- 40 °C to 85 °C
5.5 g
Maximum junction temperature
Operating temperature range
Weight
Symbol
fMAX
VDSS
VCC
IDSS
IDM25
IDM
IAR
PT (MOSFET and Driver)
RthJC
RthJHS
Test Conditions
ID = 0.5 IDM25 A
VDS = 0.8 VDSS
VGS = 0 V
Maximum Ratings
27 MHz
500 V
20 V
50 uA
1 mA
18 A
95 A
18 A
625 W
0.2 °C/W
0.4 °C/W
TJ = 25°C
TJ = 125°C
TC = 25°C
TC = 25°C, pulse limited by TJM
TC = 25°C
TC
= 25°C
Device Performance
Symbol
RDS(ON)
Test Condition
Minimum
VCC = 15 V, ID = 0.5IDM25 A
Pulse t ≤ 300 µs,
Duty Cycle ≤ 2%
8V
IN (Signal Input)
-5V
VIL (Low Input Voltage)
VCC = 15 V
ZIN
Cstray
COSS
tR
tF
3V
2.8 V
930-j7960 Ω
f = 1 MHz any one pin to the
back plane metal
46 pF
VIN (VGS) = 0 V, VDS = 0.8 VDSS(max)
172 pF
f =1 MHz
25 ns
TC = 25 °C
VCC = 15 V 1 µs pulse,
ID= 9 A
20 V
VCC + 0.3 V
f = 1 MHz
tONDLY
tOFFDLY
3.5 V
15 V
0.23 V
VHYS (Input hysteresis)
Maximum
0.3 Ω
VCC
VIH (High Input Voltage)
Typical
28 ns
3.4 ns
1.65 ns
0.8 V
IXZ631DF18N50
RF Power MOSFET & Driver
Fig. 2
Fig. 3
Input Threshold vs. Vcc Voltage
4.5
3.5
VIH
3
Vcc = 18V
4
VIL
2.5
Vcc Current (A)
Input Threshold (V)
Vcc Current vs. Frequency
2
1.5
1
3.5
Vcc = 15V
3
Vcc = 12V
2.5
Vcc = 10V
2
Vcc = 8V
1.5
1
0.5
0.5
0
0
5
10
15
0
20
5
15
20
25
30
Frequency (MHz)
Vcc Supply Voltage (V)
Fig. 5
Fig. 4
10
tONDLY Propagation Delay vs. Vcc Voltage
Vcc Current vs. Vcc Voltage
45
4
27 MHz
Vcc Current (A)
3
Propagation Delay (ns)
3.5
20 MHz
2.5
15 MHz
2
10 MHz
1.5
1
85°C
40
25°C
35
- 40°C
30
25
0.5
0
5
10
15
20
20
5
10
Vcc Supply Voltage (V)
Fig. 6
25°C
35
Rise Time (ns)
Propagation Delay (ns)
Fig. 7
85°C
40
- 40°C
30
25
20
5
10
15
VCC Supply Voltage (V)
20
Vcc Supply Voltage (V)
tOFFDLY Propagation Delay vs. Vcc Voltage
45
15
20
4
3.8
3.6
3.4
3.2
3
2.8
2.6
2.4
2.2
2
tR Rise Time vs. Vcc Voltage
85°
25°
-40°
5
10
15
VCC Supply Voltage (V)
20
IXZ631DF18N50
RF Power MOSFET & Driver
Fig. 8
Fig. 9
tF Fall Time vs. Vcc Voltage
3
2.8
0.45
2.6
0.4
85°
2.4
2.2
-40°
2
85°
0.35
25°
RDSON (Ω)
Fall Time (ns)
RDSON vs. Vcc Voltage
0.5
1.8
0.3
0.25
25°
0.2
1.6
0.15
1.4
0.1
1.2
0.05
-40°
0
1
5
10
15
5
20
10
VCC Supply Voltage (V)
15
VCC Supply Voltage (V)
Fig. 10
Fig. 11
C OSS Ouput Capacitance vs. VDS
Typical Ouput Characteristics
10000
80
Vcc = 10 V to 15 V
Vcc = 10-15V
Drain Current (A)
70
Coss (pF)
20
1000
60
50
Vcc = 8V
40
30
20
10
0
100
0
100
200
300
400
0
500
10
Vcc = 10V
60
50
Vcc = 8V
30
Normalized RDS(ON)
Drain Current (A)
1.4
Vcc = 12V
40
60
1.6
Vcc = 15V
70
50
Normalized RDS(ON) vs. Temperature
100
80
40
Fig. 13
Extended Ouput Characteristics
90
30
VDS Drain to Source Voltage (V)
VDS Drain to Source Voltage (V)
Fig. 12
20
1.2
1
0.8
0.6
0.4
20
0.2
10
0
0
0
20
40
60
80
100
VDS Drain to Source Voltage (V)
120
-60
-40
-20
0
20
40
Temperature (°C)
60
80
100
IXZ631DF18N50
RF Power MOSFET & Driver
Lead description
SYMBOL
FUNCTION
Drain
MOSFET drain
S/DGND
DESCRIPTION
Drain of power MOSFET.
MOSFET source Source of power MOSFET. This connection is common to DGND.
Vcc
Driver section
supply voltage
IN
Input
DGND
Driver power
ground
N/C
None
Power supply input for the logic input and driver output sections.
Input signal.
The driver ground leads. Internally connected to all circuitry, these leads provide ground
reference for the driver. These leads should be connected to a low-noise analog ground
plane for optimum performance.
No connection to this lead.
Figure 14 Package drawing
IXZ631DF18N50
RF Power MOSFET & Driver
Figure 15 Test circuit
S/DGND
MOSFET & Driver
Module
S/DGND
*Choke– A common-mode choke is optional and can be used to help stabilize the threshold level
due to ground bounce and to minimize false triggering.
CBULK- Bulk capacitance helps to stabilize both the high voltage V DS for the drain circuit and low
voltage Vcc for the driver circuit. Actual values vary according to load and operating conditions. For
the driver section, tantalum capacitors are recommended for their fast energy delivery.
CBYPASS- Ideally, the benefits realized through bypass capacitance increase as more is used by
way of overlapping impedance curves, lowering the overall broadband impedance to ground. Typically a range of 0.1 µF, 0.01 µF, 0.001 µF capacitors in sufficient quantities give good results.
Circuit board layout should be carefully considered to optimize operation. Each of the Vcc leads on
the driver section should be treated as its own power supply lead. Bulk and bypass capacitors attached between drain and source leads should be placed symmetrically between the leads. Excessive parasitic inductance can result in V = L di/dt inductive voltage drops, causing unpredictable operation.
IXZ631DF18N50
RF Power MOSFET & Driver
Figure 16 IXZ631DF18N50 package outline
N/C
N/C
N/C
REV 1
© October 2014 IXYS RF
N/C
An
IXYS Company
1609 Oakridge Dr., Suite 100
Fort Collins, CO USA 80525
970-493-1901 Fax: 970-232-3025
Email: [email protected]
Web: http://www.ixyscolorado.com
IXYSRF reserves the right to change limits, test conditions, and dimensions without notice.