Download A Low-Voltage Folded-Switching Mixer in 0.18

IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 40, NO. 6, JUNE 2005
1259
A Low-Voltage Folded-Switching Mixer
in 0.18-m CMOS
Vojkan Vidojkovic, Johan van der Tang, Member, IEEE, Arjan Leeuwenburgh, and
Arthur H. M. van Roermund, Senior Member, IEEE
Abstract—Scaling of CMOS technologies has a great impact on
analog design. The most severe consequence is the reduction of the
voltage supply. In this paper, a low voltage, low power, ac-coupled
folded-switching mixer with current-reuse is presented. The main
advantages of the introduced mixer topology are: high voltage gain,
moderate noise figure, moderate linearity, and operation at low
supply voltages. Insight into the mixer operation is given by analyzing voltage gain, noise figure (NF), linearity (IIP3), and dc stability. The mixer is designed and implemented in 0.18- m CMOS
technology with metal–insulator–metal (MIM) capacitors as an option. The active chip area is 160 m 200 m. At 2.4 GHz a single
side band (SSB) noise figure of 13.9 dB, a voltage gain of 11.9 dB
and an IIP3 of 3 dBm are measured at a supply voltage of 1 V
and with a power consumption of only 3.2 mW. At a supply voltage
of 1.8 V, an SSB noise figure of 12.9 dB, a voltage gain of 16 dB and
an IIP3 of 1 dBm are measured at a power consumption of 8.1 mW.
Index Terms—CMOS mixers, switching mixers, folded mixers,
current-reuse, low voltage, low power.
I. INTRODUCTION
F
OR digital circuits, CMOS technology scaling yields an
improvement in power consumption, operating speed, and
number of transistors per unit area. While CMOS technology
scaling is quite beneficial for digital circuits, this is not the case
for RF analog circuits. The most severe consequence of technology scaling that affects the RF analog design is a reduction
of the voltage supply. Insufficient voltage headroom causes that
not all circuit topologies can satisfy the required specifications.
Hence, research into low-voltage circuit topologies is important.
This paper discusses a low-voltage ac-coupled folded-switching
mixer with current-reuse. This mixer can operate at a supply
voltage of 1 V and still offer good performance.
The performance of double-balanced switching mixers is normally sufficient for a majority of applications (typically noise
figure (NF) of 10 dB, voltage gain of 10 dB and IIP3 of 1 dBm
at power dissipation levels of 6 mW) [1]. In the double-balanced
switching mixer (see Fig. 1) the transistors in the switching
Manuscript received August 23, 2004; revised December 20, 2004. This work
was supported by the Technology Foundation STW.
V. Vidojkovic was with the Eindhoven University of Technology, MixedSignal Microelectronics Group, 5600 MB Eindhoven, The Netherlands, and is
now with Philips Research Eindhoven, Eindhoven, The Netherlands (e-mail:
[email protected]; [email protected]).
J. van der Tang and A. H. M. van Roermund are with the Eindhoven
University of Technology, Mixed-Signal Microelectronics Group, 5600 MB
Eindhoven, The Netherlands (e-mail: [email protected]; a.h.m.v.roermund@
tue.nl).
A. Leeuwenburgh is with National Semiconductor, 5215 MV, ’s-Hertogenbosch, The Netherlands (e-mail: [email protected]).
Digital Object Identifier 10.1109/JSSC.2005.848034
, and
) are stacked on top of the transtage (
and
). Also,
sistors that comprise the transconductor (
the load resistor
is placed on top of the switching stage.
This way of connecting the transconductor, the switching stage,
and the load resistors is conflicting with operation at low supply
voltages. All dc tail current flows through the transconductor,
the switching stage and the load resistors. Therefore, at a low
V) the voltage drops,
voltage supply (for example at
across the load resistors, the switching transistors and the transistors in the transconductor become critical. In this particular
case it is difficult to keep all the transistors to operate in their
saturation region and this causes a significant drop in performance. Hence, it is of interest to find new mixer topologies that
can handle successfully low supply voltages.
In terms of operation at low supply voltages, the goal is
to reduce the voltage drops across the load resistors and the
switching transistors. This can be done by designing a switching
mixer in which only a part of the dc current from the transconductor flows through the switching stage and the load resistors.
In this case the switching stage may be regarded as folded with
respect to the transconductor. Therefore, we call this mixer
folded-switching mixer. Apart from the dc current flow, the
situation related to the flow of the ac current is quite opposite.
In order to obtain the highest performance possible (voltage
gain, noise figure) the total ac current from the transconductor
must flow through the switching stage. So, the switching stage
topology stays the same as in the double-balanced switching
mixer and the topology of the transconductor has to be suitable
for providing the desired flow of the ac and the dc current.
This paper is organized as follows. The transconductors suitable for application in the low-voltage folded-switching mixer
are discussed in Section II. In Section III, the analysis and design
related to the ac-coupled folded-switching mixer with currentreuse are presented. Insight into the mixer operation is given
by discussing voltage gain, noise figure, linearity, and dc stability. The simulated and experimental results are reported in
Section IV, while mixer benchmarking is discussed in Section V.
The conclusions are presented in Section VI.
II. TRANSCONDUCTORS FOR FOLDED-SWITCHING MIXERS
In the case of the double-balanced switching mixer (see
Fig. 1), the single nMOS transistor is used as the transconductor. Fig. 2 shows three different transconductors suitable for
application in the low-voltage folded-switching mixer. Actually,
they represent improvement of the single nMOS transconductor
with respect to operation at low supply voltages.
0018-9200/$20.00 © 2005 IEEE
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IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 40, NO. 6, JUNE 2005
Fig. 1. Double-balanced switching mixer.
The transconductor with resistive load is the most simple
modification of the single nMOS transconductor [see Fig. 2(a)].
The ac current , which is generated in the nMOS transistor,
splits to the currents flowing through the switching stage
and through the resistor
. The fact that a part of the ac current flows through the resistor represents the drawback of this
transconductor. In order to reduce the value of the resistor
has to be increased. As a consequence care must be taken to
keep the dc voltage at the node A sufficiently high in order to
saturated. At low supply voltages this
keep the transistor
problem is even more prominent.
The drawback of the transconductor with resistive load can
be alleviated by using the transconductor with active load [see
Fig. 2(b)]. By replacing the resistor with the pMOS transistor
the ac current through this transistor
is further reduced due
to the high output impedance of the pMOS transistor. Instead of
using pMOS transistor only to increase the impedance between
, it can be also used to amplify RF signals.
the node A and
In this way the leakage of the ac current toward the ac ground
through the output impedance of the pMOS transistor can be
ideally completely avoided. Hence, a CMOS inverter, which is
used as the transconductor, is obtained [see Fig. 2(c)].
In the CMOS inverter, the RF signal amplification by the
pMOS transistor is a result of current reuse principle [2]. This
is an efficient way to have a high gain and a low noise figure
is equal to the sum of
with a low power. The ac current
and . Based on that the total transconthe ac currents
, where
is the transconductance is equal to
ductance of transistor
and
is the transconductance of
. Before going further with a detailed analysis
transistor
of the folded-switching mixer that uses the CMOS inverter as
the transconductor, it is instructive to check the lowest supply
voltage that can be applied. It is determined by the threshold
and by the overdrive voltages of the transisvoltages
and
. The overdrive voltages of
and
tors
can be calculated using
(1)
(2)
Fig. 2. Transconductors for folded-switching mixers.
is the biasing voltage applied at the gates of the transistors
and
. Finally, the minimal supply voltage
, at
which this mixer can operate, is expressed as
(3)
Typical value of in 0.18- m CMOS is in the range of 500 mV.
From (3), it is clear that the minimum supply voltage
must be higher than 1 V. This is the disadvantage of the CMOS
inverter, which is used as the transconductor in the low voltage
folded-switching mixer.
In order to overcome the described limitation, the biasing for
nMOS and pMOS transistors in the CMOS inverter have to be
separated. In this way an ac-coupled complementary transconis the biasing of
ductor is obtained [see Fig. 2(d)]. If
and
of
, (3) becomes
(4)
to be greater than
can be
Choosing
reduced. Combining the ac-coupled complementary transconductor with the switching stage and the load resistors, the
ac-coupled folded-switching mixer with current-reuse is obtained. It is presented in Fig. 3. The next section presents the
analysis of this mixer.
III. AC-COUPLED FOLDED-SWITCHING MIXER WITH
CURRENT-REUSE
A. Gain and Noise Figure
Assuming that LO voltage is an ideal square wave, the voltage
gain of the mixer in Fig. 3 can be approximated by
(5)
is the transconductance of
and
is the
and
and
is the load resistor
transconductance of
VIDOJKOVIC et al.: A LOW-VOLTAGE FOLDED-SWITCHING MIXER IN 0.18 m CMOS
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Fig. 4. Transfer function of the ac-coupled folded-switching mixer with
current-reuse.
voltage swing at the nodes A and A’ (see Fig. 3). The deviation
from a linear transfer function between the points A and B
can be reduced by keeping the switching transistors far from the
linear region.
C. DC Stability
Fig. 3.
AC-coupled folded-switching mixer with current-reuse.
(see Fig. 3). Since only a small part of the dc current from the
transconductor flows through the switching stage, large load
resistors can be used. Hence, the voltage gain is improved, but
at the same time the switching transistors have to handle a large
has to be
output voltage swing. Therefore, the dc voltage
sufficiently low. On the
kept sufficiently high and voltage
other hand, voltage
should be sufficiently high in order to
and
saturated.
keep the transistors
The NF of the ac-coupled folded-switching mixer with current-reuse, under the assumption that the LO voltage is an ideal
square wave and taking into account the noise folding from the
image frequency, can be approximated by
(6)
is the source resistance and the coefficient is equal to
for long channel transistors and need to be replaced with a larger
value for submicron MOSFETs [3].
B. Linearity
is shown
The transfer function of the mixer
in Fig. 4. The switching transistors will be turned off by the high
voltage swing at the nodes A and A’ (see Fig. 3). In this case a
or
will cause a
high current pushed by the transistors
high voltage across the output impedance of the transistors
or
that will turn the switching transistors
and
or
and
off. The input voltage range between the points A
and B is denoted with (see Fig. 4). Nonlinearity in the mixer
transfer function between the points A and B is caused by operation of the switching transistors in the linear region. In Fig. 4
the deviations are denoted with . Linearity mainly depends on
. It can be improved by increasing and reducing . In the
folded-switching mixer with current-reuse, can be increased
by decreasing the voltages
and
, and by reducing the
In order to design a robust ac-coupled folded-switching mixer
with current-reuse that can stand at least voltage supply variations of 10%, it is necessary to calculate the variations of voltage
or
as a function of the supply voltage variations (
and
). This can be done by applying the large signal
analysis and Kirchoff’s law on the node A (see Fig. 3):
(7)
is the current through the transistor
through
through
and
. Current
can be expressed as
and
(8)
where
is the electron mobility,
is the gate oxide capacitance per unit area, is the channel width, and is the channel
is the gate-source voltage
length, is the threshold voltage,
and is channel-length modulation coefficient. Similar equations can be written for currents and . Substituting the expressions for
, and in (7), an equation that contains
to the third power is obtained that is difficult to solve it in an
insightful closed form.
In order to overcome this difficulty, small signal analysis
and
is applied assuming that the variations of voltages
are small. This analysis will give an estimation about the
variations of voltage . Substituting the small signal model
for each transistor (parallel connection of transistor output
, where
impedance and ideal current source with value
is the transconductance and
the small signal voltage at
or
can be calculated:
the gate) the variations of voltage
(9)
and
are output impedances of transistors
and
.
is the transconductance of the switching transistors. In the
(in the design
mS) dominates and
denominator
. Simulations are done
reduces the variations of the voltage
taking into account process spread, supply voltage variations
C to 70 C). Under
of 10% and temperature variations (
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IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 40, NO. 6, JUNE 2005
Fig. 5. Die microphotograph of the ac-coupled folded-switching mixer with
current-reuse.
Fig. 7. Measured and simulated voltage gain versus frequency.
Fig. 6. Measured voltage gain versus LO voltage swing.
these conditions
varies in the range from 232 to 450 mV
and nominally
mV. These variations do not deteriorate the circuit operation significantly and there is no need for
common mode feedback, which is another advantage of the proposed mixer.
Fig. 8.
Measured IIP3 at a supply voltage of 1 V.
IV. SIMULATION AND EXPERIMENTAL RESULTS
Fig. 5 shows the die photograph of the realized ac-coupled
folded-switching mixer with current-reuse. The active chip area
is 160 m 200 m. Total dissipation of the IC is 8.1 mW at a
supply voltage
of 1.8 V and 3.2 mW at a supply voltage
of 1 V.
as a funcFig. 6 shows the measured mixer voltage gain
. In Fig. 6 the
tion of the differential LO voltage swing
numbers on the x axis denote the peak values of the applied differential LO voltage swing. The LO frequency is set to 2.4 GHz,
while the output signal is measured at an intermediate frequency
(IF) of 1 MHz. As it can be seen, the voltage gain reaches the
mV . For
lower than
highest value for
500 mV , the voltage gain is reduced because the switching
transistors do not perform the current commutation well. For
higher than 500 mV the switching transistors partly operate in the linear region when they conduct. This also causes a
gain reduction.
Measured and simulated voltage gain at supply voltages of
1 V and 1.8 V versus frequency are shown in Fig. 7. The difference between the measured and simulated results is mainly due
to inter-connect parasitics.
The noise figure (NF) is measured and simulated at an IF of
1 MHz with a 50 source resistance and 1 k load resistance,
and with a differential LO voltage swing of 500 mV . For LO
frequency of 2.4 GHz, a single side band (SSB) NF of 12.9 dB is
measured at a supply voltage of 1.8 V and a SSB NF of 13.9 dB
at a supply voltage of 1 V. The measured values for the NF cordB
responds very well to the simulated results: SSB
at
V and SSB
dB at
V.
Fig. 8 shows a measured IIP3 at a supply voltage of 1 V. The
dBm. At
simulated IIP3 for the same supply voltage is
V, a measured and simulated IIP3 are 1 dBm and
0 dBm, respectively.
V. MIXER BENCHMARKING
In order to evaluate the performance of the ac-coupled
folded-switching mixer with current-reuse, the performance
of relevant CMOS mixers are given in Table I. It is important
to mention that mixer performance given in the fifth row are
extrapolated based on the measurement results presented in [7].
When comparing the measured performance of the ac-coupled
folded-switching mixer with current-reuse with the performance
VIDOJKOVIC et al.: A LOW-VOLTAGE FOLDED-SWITCHING MIXER IN 0.18 m CMOS
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VI. CONCLUSION
TABLE I
PERFORMANCE OF SOME CMOS MIXERS
A high-gain, low-voltage, low-power ac-coupled foldedswitching mixer with current-reuse is presented. This mixer
is designed and implemented in 0.18- m CMOS technology.
The main advantages of the proposed new mixer topology are
high voltage gain (15.7 dB), moderate noise figure (12.9 dB),
dBm), operation at low supply
moderate linearity (
voltages (
V), and simplicity since common-mode
feedback is not necessary. Normalizing mixer performance with
a figure of merit shows that the ac-coupled folded-switching
mixer with current-reuse has excellent performance in comparison with other CMOS mixers.
ACKNOWLEDGMENT
The authors would like to thank A. Mulders, J. ter Laak,
A. Hoogstraate, J. Prummel, J. Otten, and F. van Duijvenvoorde from National Semiconductor and O. Stoelenga from
Eindhoven University of Technology for participating in many
fruitful discussions.
REFERENCES
Fig. 9. Mixer benchmarking
of some CMOS mixers, given in Table I, the following advantages
of the ac-coupled folded-switching mixer with current-reuse can
be observed: high voltage gain, moderate noise figure combined
with operation at low supply voltage. Comparing the measured
value for the noise figure of the folded-switching mixer with
current-reuse with the values for the noise figure of the CMOS
mixers given in Table I it is important to take into account the fact
that some referenced mixers are implemented in older CMOS
technologies where the level of thermal and flicker noise was
lower. Also some of them use very high intermediate frequency (IF) avoiding the contribution of the flicker noise. The
disadvantage of the ac-coupled folded-switching mixer with
current-reuse is bad power supply rejection ratio. Therefore,
care must be taken to provide stable power supply.
The performance of the ac-coupled folded-switching mixer
with current-reuse can also be expressed by a figure of merit
(FOM). The FOM is defined in the following way:
[1] V. Vidojkovic et al., “Mixer topology selection for a 1.8–2.5 GHz multistandard front-end in 0.18 m CMOS,” in Proc. IEEE Int. Symp. Circuits
and Systems (ISCAS), vol. 2, 2003, pp. 300–303.
[2] A. Karanicolas et al., “A 2.7-V 900-MHz CMOS LNA and mixer,” IEEE
J. Solid-State Circuits, vol. 31, no. 12, pp. 1939–1944, Dec. 1996.
[3] B. Razavi, Design of Analog CMOS Integrated Circuits. New York,
NY: McGraw-Hill, 2001.
[4] C. Debono et al., “A 900 MHz, 0.9 V low-power CMOS down-conversion mixer,” in Proc. IEEE Custom Integrated Circuit Conf. (CICC),
2001, pp. 527–530.
[5] P. Sullivan et al., “Low voltage performance of a microwave CMOS
Gilbert cell mixer,” IEEE J. Solid-State Circuits, vol. 32, no. 7, pp.
1151–1155, Jul. 1997.
[6] C. Hermann et al., “A 0.6 V 1.6 mW transformer based 2.5 GHz downconversion mixer with 5.4 dB gain and 2:8 dBm IIP3 in 0.13 um
CMOS,” in Proc. Radio Frequency Integrated Circuit Symp. (RFIC),
2004, pp. 35–38.
[7] E. Klumperink et al., “A CMOS switched transconductor mixer,” IEEE
J. Solid-State Circuits, vol. 39, no. 8, pp. 1231–1240, Aug. 2004.
0
Vojkan Vidojkovic was born on June 28, 1974,
in Knjazevac, Serbia and Montenegro. In 1999, he
graduated from the Department of Electronics and
Telecommunications, Faculty of Electronic Engineering, University of Nis, Serbia and Montenegro.
From 1999 to 2000, he worked at Telecom-Serbia,
Nis, as an Assistant for Telecommunications. From
September 2000, he worked in the Mixed-Signal Microelectronics group at the Eindhoven University of
Technology, The Netherlands. He is currently with
Philips Research Eindhoven.
(10)
Voltage gain and NF are expressed in dB and IIP3 in dBm.
The FOM is based on the fact that the performance of the
are as low as
mixer is better if NF and power consumption
and IIP3 are as high as pospossible, while voltage gain
sible. The calculated FOM for the ac-coupled folded-switching
mixer with current-reuse and for CMOS mixers from Table I is
presented in Fig. 9. As it is evident from Fig. 9, the ac-coupled
folded-switching mixer with current-reuse shows very good
FOM compared to the CMOS mixers presented in Table I.
Johan van der Tang (M’96) was born in 1970.
He graduated in electrical engineering from the
Technical University of Twente, Enschede, the
Netherlands, in 1995. In 2002, he received the Ph.D.
degree. His thesis was on “High-frequency Oscillator
Design for Integrated Transceivers.”
From 1995 to 2000, he was with Philips Research Laboratories, The Netherlands, and worked
on analog integrated RF key building blocks for
satellite, TV, radio and optical front-ends in the
0.1–12-GHz range. From 2000 to 2005, he was a
full-time Assistant Professor at Eindhoven University of Technology. While
remaining a part-time Assistant Professor, he moved in 2005 to the company
Semiconductor Ideas to the Market (ItoM), The Netherlands.
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Arjan Leeuwenburgh was born in Heinenoord, The
Netherlands, in 1968. He received the M.S. degree in
electrical engineering from the Technical University
of Eindhoven (TUE), Eindhoven, The Netherlands,
in 1993.
From 1993 to 1995, he worked at the Space
Research Organization of the Netherlands (SRON)
and contributed the ESA-XMM satellite project.
From 1995 to 1999, he worked at Philips Research
(NatLab) in the field of integrated (CMOS) transceivers. Since 1999, he has been with National
Semiconductor, ’s-Hertogenbosch, The Netherlands, where he currently is
working as RF IC Development Manager. His main research interests are in
the area of wireless transceiver design.
IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 40, NO. 6, JUNE 2005
Arthur H. M. van Roermund (M’83–SM’95)
was born in Delft, The Netherlands, in 1951. He
received the M.Sc. degree in electrical engineering
in 1975 from the Delft University of Technology
and the Ph.D. degree in applied sciences from the
K.U.Leuven, Belgium, in 1987.
From 1975 to 1992 he was with Philips Research
Laboratories, Eindhoven. From 1992 to 1999, he
was a full Professor in the Electrical Engineering
Department of Delft University of Technology,
where he was chairman of the Electronics Research
Group and member of the management team of DIMES. From 1992 to 1999,
he was chairman of a two-years post-graduate school for “chartered designer.”
From 1992 to 1997, he was a consultant for Philips. In October 1999, he
joined Eindhoven University of Technology as a full Professor, chairing the
Mixed-Signal Microelectronics Group. Since September 2002, he has also
been Director of Research of the Department of Electrical Engineering. He is
chairman of the board of ProRISC, a nation-wide microelectronics platform.
He is a member of the supervisory board of the Cobra research school.
Since 2001, Dr. van Roermund has been one of the three organizers of
the yearly Workshop on Advanced Analog Circuit Design (AACD). In 2004,
he was awarded Simon Stevin Meester for his scientific and technological
achievements.