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Transcript
MOS Capacitor
Lecture #5
Transistor
Voltage controlled switch or amplifier : control the output by the input to
achieve switch or amplifier
Two types of Transistors:
• Bipolar junction transistor (BJT), uses both diffusion and recombination of electron
and hole charge carriers
• Field effect transistor (FET) uses an electric field and drift to control the
conductivity. FETs are also known as unipolar transistors as they involve singlecarrier-type operation
Field Effect Transistor
FET Transistor consists of Metal-oxide-silicon (MOS) capacitor and two
pn-junction one in forward bias and the second in reverse bias
Metal is a conductor
Oxide is an insulator
n channel MOSFET
p channel MOSFET
Field Effect Transistor
• FET Transistor consists of Metal-oxide-silicon (MOS) capacitor and
two pn-junction one in forward bias and the second in reverse bias
• Channel is the region under the oxide
Field Effect Transistor
We talk about two states:
VGS is very low  Accumulation of holes in the channel  No current IDS=0 (Cutoff)
VGS is high  Accumulation of electrons (inversion) in the channel  high current
IDS>0 (ON)
OFF
There is no a vertical current IGS IGD IGB
ON
Summary for MOS with p-type bulk
State
Surface
potential
Gate voltage
Charges in
the surface
Depletion
Accumulation Flat band
S  0
S  0
VGS  VFB
VGS  VFB
Holes
Holes
p p  N A
pp  N A
2
n
np  i
NA
2
n
np  i
NA
0  S  B
 S  B
Inversion
 B   S  2 B  S  2 B
VFB  VGS  VT
Acceptors
N A  p p
VGS  VT
Intrinsic
n p  p p  ni
Weak
inversion
N A  pp
N A  np  pp
Electrons
n p  N A
Summary for MOS with p-type bulk
Accumulation
Intrinsic
Flat band
Depletion
Inversion
MOS C-V Characteristic
Experimental set-up for C-V measurement:
1. D.C voltage VGB
2. A.C periodic function with amplitude of Va and frequency f=1/T (T is period).
General VGB>>Va, therefore the A.C power supply will not change the state of the
device and under this condition, we can:
The D.C voltage will set the bias or operating point of the device and A.C will measure
the capacitance of the device.
It is important to have slow ramping or rising time between the different values of the
D.C operating point
MOS C-V Characteristic - Summary
VFB
EFS  EFM Q f


q
CO
VT  VFB 
C FB 
tOX
LD 
 ox
 ( ox  S )  LD
Cmax  CO 
 s  KT / q
q NA
Cdep _ min 
tOX
 OX
B
tOX
 ox
 ( ox  S )  wmax
4 S B qN A
 2 B
CO
KT  N A 

ln 

q
n
 i 
wmax
4 S B

qN A
MOSFET Transistor
0
𝐼𝐷𝑆 =
𝑤
1
𝜇𝑛 𝐶𝑂𝑋
𝑉𝐺𝑆 − 𝑉𝑇 − 𝑉𝐷𝑆 𝑉𝐷𝑆
𝐿
2
𝑤
𝜇𝑛 𝐶𝑂𝑋
𝑉𝐺𝑆 − 𝑉𝑇 2
𝐿
𝑉𝐺𝑆 < 𝑉𝑇
𝐶𝑢𝑡𝑡𝑂𝑓𝑓
𝑉𝐷𝑠 < 𝑉𝐺𝑆 − 𝑉𝑇
𝑇𝑟𝑖𝑜𝑑𝑒
𝑉𝐷𝑠 > 𝑉𝐺𝑆 − 𝑉𝑇
𝑆𝑎𝑡𝑢𝑟𝑎𝑡𝑖𝑜𝑛
MOSFET Transistor
(1) - linear
(4) - triode
(7) - saturation
(2) - triode
(5) - triode
(3) - triode
(6) - saturation
MOSFET Transistor
Explanation to pinched-off: When VDS biomes larger than VDS,sat (VGS-VT), the point in the
channel at which the inversion charge is just zero moves toward source terminal.
1. In this case, electrons enter the channel at the source, travel though the channel toward
the drain, and then, at the point where the charges goes to zero, are injected into the
depletion region, where they are swept by the electric field (E) to drain contact.
2. We can consider the space between the source and drain as two regions with two
resistors in serial (Rcahnnel Channel or inversion and R depletion). The Rdepl >>Rchannel, and
therefore most of the voltage (VDS-VDS,sat)=(VDS-VGS-VT) is dropped only on the Rdep and
therefore there is no change in the resistance of the channel.
Gauss's Law
Two plates are identical, but one has a charge of +Q and the other has a charge of -Q, the
field in the region between them will point from the positive plate to the negative plate
and will have a value of :
In the region outside the plates, the two fields will exactly cancel. This arrangement is known
as a parallel-plate capacitor. We'll look at that again as a device used to store charge.
Gauss's Law
𝑩
𝑩
𝜺𝒅𝑬 =
𝑨
𝜺𝑩 𝑬𝑩 − 𝜺𝑨 𝑬𝑨 = 𝑸
𝝆𝒅𝒙 = Q
𝑨
In case a constant electric field
𝜺𝑶𝑿 𝑬𝑶𝑿 − 𝜺𝑴 𝟎 = 𝑸M
𝜺𝑺 𝟎 − 𝜺𝑺 𝑬𝑺 = 𝑸S
𝑸𝑺 = −𝑸𝑴
𝜺𝑶𝑿 𝑬𝑶𝑿 = 𝜺𝑺 𝑬𝑺
𝜺𝑶𝑿 𝑬𝑶𝑿 = 𝑸M
−𝜺𝑺 𝑬 = 𝑸S