Download Team May12-05 Chendong Yang Mengfei Xu Advisor

High Speed, high common
mode immunity
communication interface
Team May12-05
Chendong Yang
Mengfei Xu
Advisor: Nathan Neihart
Client: RBC Medical
Development
Statement of Purpose
 A high speed serial communication interface that would be
capable of a high common mode immunity and high speed
transmission.
Conceptual Sketch/ Block Diagram
V_pp = 300mV
f = 40 MHZ
Serial
LVCOMS
Transmitter
CLK
USB Cable
Comparator
A
D
C
CLK
Functional Requirements
 1. System is capable from 20MHz to1.12 GHz
 2. The clock and associated circuitry will be electrically isolated
from the rest of the system.
 3.LVCMOS come in and same signal come out at the end of the
system
 4. at least 10 Volts Common mode voltage immunity
 5. The system would also need to pass radiated emissions
testing, tested at CISPR-11 Group 1 Class B.
 6. The transmission distance should be at least 2 meter long.
Non-Functional Requirements
 1. Stability
 2. Budget restriction
 3. Easy configuration .
Operating Environment and Constraints
 The most important environment consideration is noise.
 If the noise is bigger than the immunity voltage range, the output
will be infected by the noise.
Estimate Cost
Item
Approx. Cost
Transmitter Board
$200-$250
Receiver Board
$200-$250
ADC Board
$100-$200
Radiated Emission Test
$200-$250
Unexpected Cost(i.e.
damaged board, chip,
electronic)
$200
Total Cost
$1000 - $1500
Schedule (This semester)
Define Project
Aug.
Basic Block
Diagram
Transmitter
Receiver
Market Survey
Market Survey
Schematic Test
Schematic Test
PCB Design
PCB Design
Order PCB
Order PCB
Sept.
Oct.–
Nov.
Nov.Dec.
Functional Decomposition
Name
Functional
Transmitter
A device transform a
signal line voltage input to
double line Low voltage
differential signal output
Receiver
Comparator which
compares two voltages or
currents and switches its
output to indicate which is
larger.
USB cable
transmit the data from
transmitter board to
receiver board
Market Survey
 Requirement:
1. High input toggle frequency, initially at least 40MHZ
2. Small falling/rising time, i.e. t<5ns
3. Affordable Price
 Final Choose: DS90C031 from NationalSemiconductor
1. Rising/Falling time: 1.5 ns
2. Power supply : 5v
3. input switching frequency support: excess 77 MHZ
4. ~$3
5. ±350 mV differential signal
Test Constraints
 To keep their business secretes, companies don’t provide
Pspice models of the transmitters we need. We have
tried many ways to solve this problem such like using
some other models, translating ibis model to Pspice
model, and testing the sample transmitter to see if it is
capable for our transmitter part. we are still not able to
simulate the transmitters. In that case, we only test the
receiver part with input signal generated by the software.
Sample Test
Test result
Input
A square wave with
Vpp=3v,frequency=1.5
Mhz,Vdd=5v, clock is as twice
fast as the data
output
when DS99R103 have finished transmitting the LVCOMS to LVDS, there
are other 23bits signal in the LVDS
Market Survey
 Requirement:
1. Capability of a high common mode immunity, at least
10V, i.e. power supply range should be greater than 10V
2. High input toggle frequency, initially at least 40MHZ
3. Small falling/rising time, i.e. t<5ns
4. Affordable Price
 Final Choose:
LT 1711 from Linear Technology
1. High common mode rejection : 65-75dB
2. Rising/Falling time: 2ns
3. Power supply range : 14 V
4. Maximum input toggle frequency : 100 MHZ
5. ~$5
Schematic Test (Ideal)
• Test Interface: Pspice
• Test Condition:
1. Square differential input
Vpp = 300 mV, PW = 12.5n, f = 40MHZ
2. Common mode input voltage = 10V
3. V+ = 11V, V- = 0V
4. No noise consideration
Schematic
Result
1st Graph: Vout+
2nd Graph: Green: Vin+, Red: Vin-
Add Noise
Schematic Test (Improvement)
• Test Condition:
1. Square differential input
Vpp = 300 mV, PW = 12.5n, f = 40MHZ
2. Common mode input voltage = 10V
3. V+ = 11V, V- = 0V
4. Noise consideration: sine noise
5. Add Hysteresis
6. Line impedance = 100ohm
Result
USB Cable Test
Input signal:
•
•
•
•
Square wave
f = 40 MHZ
Vpp = 300mV
High load impedence
Conclusion:
Normal USB cable can
transmit 40MHZ, small
differential voltage with
tolerable distortion.
Output
PCB Design(In progress)
• Test Interface: Eagle PCB design software
• PCB designed size: 80mm * 70mm
PCB Layout (Current Version)
Current Project Status
Define Project
Issue Left
Basic Block
Diagram
Transmitter
Receiver
Market Survey
Market Survey
Schematic Test
Schematic Test
PCB Design
PCB Design
Order PCB
Order PCB
1. Optimize the PCB
layout
2. Order the electronic
element need for our
PCB.
Individual Responsibility &
Contribution
Mengfei Xu:
• Team Leader
• Transmitter Designer
• Website design.
Chendong Yang
• Communication Liaison
• Receiver Designer
• Document & File Arrangement
Schedule (Next semester)
Jan.Feb
Feb.
March.
Transmitter PCB
Setup
Receiver PCB Setup
Verification Test
Verification Test
Whole System
Verification Test
Improvement
April
Radiated emission
Test
Aug.May.
Verification &
Delivery
Questions?