Download Introduction to Energy Transfer Sampling

 Introduction to Energy Transfer Sampling (ETS) Whitepaper Revision 1.02 David F. Sorrells CTO, ParkerVision May 6, 2015 1 Table of Contents Scope Section 1 Page Number 4 5 8 9 10 Wireless Receivers Wireless Receiver Architectures Section 2 Direct Conversion/Superheterodyne Receiver Comparison Superheterodyne to Direct Conversion Transition Section 3 Frequency Down-­‐‑converters/Mixers in Receivers Types of Frequency Down-­‐‑Converters/Mixers Practical Mixer Limitations Non-­‐‑Linearity / Linearity further discussion Receiver System Analysis Example 1 Impact of the Down-­‐‑converter / Mixer on Receiver Performance Receiver Sensitivity Superheterodyne Receiver Sensitivity Example 1 Exemplary Superheterodyne Receiver Front End 1 Receiver Linearity Receiver Dynamic Range Overall Receiver Performance Measurements Additional Direct Conversion Legacy Mixer Design Considerations Voltage Sampling Frequency Down-­‐‑Converters Practical Voltage Sampling Circuitry Exemplary Superheterodyne Receiver Front End 2 Side by Side Comparison of Exemplary Superheterodyne Receiver Front End 1 and Exemplary Superheterodyne Receiver Front End 2 Overview of Voltage Sampling Frequency Down-­‐‑Converters Compared to Legacy Continuous-­‐‑Time Frequency Down-­‐‑Converters/Mixers 12 14 21 21 22 23 25 26 27 28 29 30 33 38 40 41 Section 4 Introduction to Energy Transfer Sampling Receiver System Analysis Example 3 Energy Transfer Sampling Down-­‐‑Converter Exemplary Superheterodyne Receiver Front End 3 Energy Transfer Sampling Theory of Operation Exemplary Voltage Sampler and Energy Transfer Sampler Component 42 43 45 2 Values and Results Example Voltage Sampler and Energy Transfer Sampler Comparison Table Energy Transfer Sampling (ETS) Input Impedance Matching Exemplary Energy Transfer Sampler (ETS) with Input Impedance Match Energy Transfer Sampling (ETS) Sub-­‐‑Harmonic Operation Overview Energy Transfer Sampling (ETS) Differential Configuration Overview 49 50 51 52 54 55 Reference Section......................................................................................................................56 3 Scope Energy Transfer Sampling (ETS) architectures, circuitry, and designs are applicable to any device or devices that employ receivers that receive electro-­‐‑magnetic (EM) waves or signals. The EM signals include, but are not limited to, radio frequency (RF) carrier signals which can be propagated wirelessly via air and/or space and cable(s) such as coaxial cables and fiber optic cables. This paper focuses on receivers in wireless applications and devices, including receivers that employ Energy Transfer Sampling (ETS). 4 Section 1 Wireless Receivers Wireless devices require a receiver to receive electromagnetic waves or signals that contain information. The wireless receiver’s function is to receive, extract, and convert the information contained in the electromagnetic signals into a useable form. Electromagnetic signals, also known as radio frequency (RF) signals, that contain and carry information wirelessly are referred to as carrier signals or RF carrier signals. The process of impressing information on an electromagnetic signal to create a carrier signal is known as modulation. Modulation can be achieved by varying the amplitude, the phase (as shown above), and/or the frequency of a carrier signal. The process of extracting information from a carrier signal is known as demodulation. 5 Demodulation is performed by wireless receivers. Specifically, wireless receivers receive, amplify, filter, detect, process, and demodulate radio frequency (RF) carrier signals in order to extract the original information and convert it to a usable form. In today’s wireless receivers, it is commonplace to utilize two orthogonal carrier signals to transmit and receive more information in a given frequency bandwidth. The two carrier signals are separated by a 90 degree phase shift and are known as in-­‐‑phase (I) and quadrature-­‐‑phase (Q) signals. The combined in-­‐‑phase and quadrature-­‐‑phase signals create a complex (I and Q) carrier signal. I and Q modulation waveforms include quadrature phase shift keying (QPSK), quadrature amplitude modulation (QAM), and orthogonal frequency division multiplexing (OFDM). 6 The complex I and Q carrier signal is often shown on an orthogonal axis graph which is also referred to as the complex signal plane. The complex signal plane creates an easy visual representation of the modulation and demodulation characteristics of complex carrier signals such as quadrature phase shift keying (QPSK) and quadrature amplitude modulation (QAM). In the complex signal plane, the complex carrier signal amplitude and phase is represented by a vector, which moves to different locations or points in time to represent the information symbols. The complex signal plane graph, the resultant carrier vector, and the points at defined time intervals are known as a signal constellation. Code Division Multiple Access (CDMA), Wideband-­‐‑CDMA (W-­‐‑CDMA), Long Term Evolution (LTE), Bluetooth, and WiFi are examples of wireless standards found in 7 smartphones that require complex carrier signals. Examples of the information contained on complex carrier signals include audio, video, text messages, photos, internet connectivity and global positioning service data (GPS). Wireless Receiver Architectures Historically, there have been two types of receiver architectures: Superheterodyne and Direct Conversion Receivers. Superheterodyne receivers have been the predominate receiver architecture in wireless devices from their inception in 1918 until the early 2000’s. Conversely, direct conversion receivers, which were invented in the 1930’s, were considered impractical for most applications until the late 1990’s. 8 Section 2 Direct Conversion/Superheterodyne Receiver Comparison Until recently, direct conversion receivers were considered largely impractical for a variety of technical reasons, including direct current (DC) offset voltages, local oscillator (LO) re-­‐‑radiation (re-­‐‑rad) signal power, baseband filtering requirements, in-­‐‑phase (I) and quadrature-­‐‑phase (Q) signal matching requirements, and high linearity and dynamic range requirements. In the 1990’s, the use of direct conversion receivers in high performance and high volume applications such as cellphones was a contentious subject. By contrast, superheterodyne receivers did not suffer from the perceived technical impracticalities of direct conversion receivers. All of the perceived direct conversion technical issues could be either greatly reduced or eliminated by using a superheterodyne design. Additionally, the performance of a superheterodyne receiver was considered to be vastly superior to that of a direct conversion design. However, in order to realize the technical and performance benefits of superheterodyne receivers, a large number of circuit components is required, many of which are impractical to integrate into semi-­‐‑conductor integrated circuits (IC’s). The large number of components and the lack of integration possibilities were major factors of the large size and high power consumption of a superheterodyne receiver. Furthermore, the superheterodyne receiver architecture is not inherently flexible when it comes to receiving different frequency bands and different types of carrier signals (multi-­‐‑band/multi-­‐‑mode). These superheterodyne receiver drawbacks contributed to the renewed interest and advancement of direct conversion receiver designs. 9 Superheterodyne to Direct Conversion Transition Due to the increasing receiver demands of wireless devices, especially in the cellphone markets, there was an renewed interest in direct conversion technology and research in the late 1990’s. It became clear to the cellphone industry that wireless receiver requirements going forward must include higher levels of integration (smaller size and lower cost), lower power consumption, and increased performance and flexibility. One of the earliest products to employ a direct conversion receiver in a cellphone was trade named OthelloTM. OthelloTM , designed by Analog Devices, Inc. was among the earliest direct conversion cellular receiver architectures that was able to meet a cellular standard. The chipset was released in 1999, supported the GSM standard, and was implemented in a 0.6um (600nm) BiCMOS semiconductor process. [Reference: Analog Devices in GSM, Introductory Section for February 2000 CD-­‐‑ROM, Analog Devices, ADI GSM Intro, Februrary 2000, Slide 12] It is important to note that the OthelloTM direct conversion receiver performance specifications were inferior compared to its superheterodyne competitors. However, the OthelloTM product was more highly integrated, smaller, and cost less 10 than the superheterodyne receiver it replaced. In 1999, Othello’sTM product features outweighed the overall direct conversion receiver performance limitations for some cellphone designers and manufacturers. During the 2000’s, Superheterodyne receivers were completely phased out of cell phone integrated circuits (IC) and were replaced with direct conversion receivers and transceivers. In order to meet ever increasing wireless performance and flexibility demands, technology advancements in direct conversion receiver architectures and circuitry were required. A key technology trend that enabled high performance, multi-­‐‑mode, and multi-­‐‑band receiver operation with high levels of integration was the replacement of the traditional continuous-­‐‑time analog multiplying frequency down-­‐‑converters/mixers (as found in OthelloTM) with new and different down-­‐‑conversion architectures and circuitry. 11 Section 3 Frequency Down-­‐‑converters/Mixers in Receivers One of the key functions that determines a large part the receiver’s overall performance in both superheterodyne and direct conversion receivers is the frequency down-­‐‑converter, often referred to as a mixer. In modern engineering, there are numerous terms that are used interchangeably (both correctly and incorrectly) with the term mixer. These synonyms include, but are not limited to, frequency multiplier, multiplier, frequency down-­‐‑converter, down-­‐‑converter, frequency converter, and direct demodulator. Superheterodyne receivers use two or more independent frequency down-­‐‑converters or mixers and two or more independent local oscillators (LO’s) whereas direct conversion receivers utilize two frequency down-­‐‑converters or mixers that operate as single, unified in-­‐‑phase (I) and quadrature-­‐‑phase (Q) down-­‐‑converter or mixer with a single LO. In a superheterodyne receiver, the function and purpose of the first frequency down-­‐‑converter/mixer working in conjunction with the first local oscillator is to convert a higher frequency radio frequency carrier signal to a lower frequency carrier signal. The lower frequency carrier signal is called an intermediate frequency or IF. All of the modulated information is preserved in the intermediate frequency (IF) signal, which for practical engineering reasons, is easier to amplify, filter , and process than the original carrier signal. In a superheterodyne receiver, the process of frequency down-­‐‑conversion to intermediate frequencies (IF’s) can be repeated as many times as necessary. The superheterodyne receiver’s overall performance is determined in part by the operating characteristics of the frequency down-­‐‑converters or mixers and the intermediate frequency (IF) signal processing. 12 Independent Superheterodyne down-­‐‑converters/mixers Independent Local Oscillators The function and purpose of the first and only in-­‐‑phase (I) and quadrature-­‐‑phase (Q) frequency down-­‐‑converter in a direct conversion receiver is to demodulate or extract the I and Q baseband signals from the original carrier signal. Compared to down-­‐‑converters used in superheterodyne receivers, the operating characteristics of the I and Q frequency down-­‐‑converter in a direct conversion receiver is responsible for a much larger percentage of the receiver’s overall performance and has additional technical and performance design requirements. Single Local Oscillator Frequency down-­‐‑converters/mixers operating as a single, unified d irect conversion I and Q frequency down-­‐‑converter/mixer 13 It is important to note that although the electrical engineering block diagram symbols for a down-­‐‑converter/mixer are identical for both superheterodyne and direct conversion receivers, both the circuitry and design requirements can be vastly different. Types of Frequency Down-­‐‑Converters/Mixers Throughout the history of wireless communications, there have many types of traditional and legacy frequency down-­‐‑converters/mixers, including diode mixers, bi-­‐‑polar transistor mixers, and field effect transistor(FET) mixers. These types of legacy mixers utilized circuitry non-­‐‑linearities to multiply two signals together and to produce the sum and difference frequencies of the two signals. The two signals that are normally multiplied are an RF signal and a local oscillator (LO) signal. LO Signal RF Signal VD is voltage drop across the non-­‐‑linear device and Is is a function of a1V D + a2 VD2 + … “… the second-­‐‑order product term produces the desired output. Let’s suppose that VR and VL are the fraction of VRF and VLO that appear across the nonlinear device (possibly a diode). “The product term produces the desired mixer output:
” Sum and d ifference of the RF and LO frequencies 14 [Reference: ECE145B/ECE218B, “Mixer Lectures”, March 14, 2007] A complementary reference describes the operation of a multiplier/ mixer similarly: [Reference: Introduction to Receivers, ece 218b, Rodwell, 2013, link: http://www.ece.ucsb.edu/Faculty/rodwell/Classes/ece218b/notes/Introduction_to_Receivers_w11.pdf] For further clarification of the operation of a mixer/multiplier, a third reference explains: 15 “If it existed, an ideal multiplier would perform the function” “…as shown in Figure 1.” “In the world of RF circuit design the term mixer is more appropriate, as an ideal multiplier is rarely available. Instead, active and passive circuits that approximate signal multiplication are utilized. The notion of mixing comes about from passing the sum of two signals through a nonlinearity, e.g.,” “In this mixing application we are most interested in the center term”
[Reference: ECE 4670 Spring 2014 Lab 3 Mixers and Amplitude Modulation, page 1, link: http://www.eas.uccs.edu/wickert/ece4670/lecture_notes/Lab3.pdf] In wireless receivers, x1(t) is normally a radio frequency (RF) signal which can be represented by the expression and x2(t) is a local oscillator (LO) signal which can be represented by . . Multiplying by results in two desired output frequencies (ydesired(t)), which is the sum of the RF signal fc and the LO signal fLO (fc+fLO) and the difference of RF signal fc and LO signal fLO (fc-­‐‑fLO). 16 [See Derivation 1] Sum and d ifference of RF(fc) and LO(fLO) frequencies Legacy mixers generally fall into three categories: Analog, Active, and Switching. Analog mixers have all of the transistors in the design biased in a linear or pseudo-­‐‑
linear region. Analog mixers are often referred to as analog multipliers. Active mixers have all or some transistors biased in a linear or pseudo-­‐‑linear region, and some transistors can be operated as a switch. For example, Gilbert cell mixers can be implemented either as analog mixers or active mixers. Analog and active mixers can be configured to have signal gain. Linear LO input signals (sinusoidal) Analog Gilbert Cell Mixer/Multiplier All transistors biased In a linear or pseudo-­‐‑
linear mode Non-­‐‑Linear LO input signals (switching) Active Gilbert Cell Mixer/Multiplier Input transistors biased In a linear or pseudo-­‐‑
linear mode 17 [Reference link: http://www.radio-­‐‑electronics.com/info/rf-­‐‑technology-­‐‑design/mixers/gilbert-­‐‑cell-­‐‑mixer-­‐‑multiplier.php] A Gilbert cell by design and operation is a continuous input / continuous output device. Gilbert cells require the local oscillator (LO) signals to be both differential and symmetrical. The analog Gilbert Cell, which can also be designed using field effect transistors (FET’s) as shown below, requires sinusoidal LO input signals: Analog Gilbert Cell Mixer/Multiplier All transistors biased In a linear or pseudo-­‐‑
linear mode Active Gilbert Cells require non-­‐‑linear switching LO input signals: Active Gilbert Cell Mixer/Multiplier Input transistors biased In a linear or pseudo-­‐‑linear mode 18 In the Gilbert cell examples above, the outputs are labeled as IF output(s) and differential IF output(s). Under certain operational conditions including when the RF carrier frequency fc and the local oscillator (LO) frequency fLO are substantially equal, the Gilbert cell is capable of producing baseband (BB) and differential baseband signals at the output(s). Switching mixers, also called passive mixers, have no transistors or other circuit elements biased in a linear or pseudo-­‐‑linear region. Because switching mixers have no circuit elements biased in a linear or pseudo-­‐‑linear region, they cannot have signal power gain. Differential LO signals Single Ended LO signal Exemplary Double Balanced Diode Switching Mixer Like the Gilbert cell, the local oscillator (LO) signals that control the operation of the diodes in the double balanced diode switching mixer are both differential and symmetrical. Although the local oscillator (LO) input signal as shown in the schematic above is a single-­‐‑ended connection, the transformers create the required differential and symmetrical LO signals. The optimum performance of the switching mixer above occurs when the LO input signal is sinusoidal and has a duty cycle that 19 is approximately equal to 50%. A 50% duty cycle in a double balanced diode mixer creates a continuous input / continuous output down-­‐‑converter / mixer. Another popular switching or passive down-­‐‑converter mixer topology uses field effect transistors (FET’s) in a double balanced circuit configuration: LO signals Given the LO signals are both differential and symmetrical, the passive double balanced FET mixer is a fully differential, continuous input / continuous output frequency conversion device. As with the passive diode mixer, the optimum performance of the double balanced passive FET mixer occurs when the differential LO signals have a duty cycle of approximately 50%. Passive mixers, under certain operational characteristics including when the RF carrier frequency fc and the local oscillator (LO) frequency fLO are substantially equal, are capable of producing baseband (BB) output signals. 20 Practical Mixer Limitations Practical legacy mixers cannot be implemented as ideal mixers or multipliers. Instead of only generating the desired output, a practical legacy mixer produces many undesired frequency components and signals at the output. Using the single diode mixer example and related equation from the ECE145B/ECE218B, “Mixer Lectures”, March 14, 2007 reference above, it can be seen that: DC and Second Harmonic Undesired Outputs Desired Mixing Output [Reference: ECE145B/ECE218B, “Mixer Lectures”, March 14, 2007] The desired and undesired frequency components and signals at the exemplary single diode mixer output can be expressed using a power series: Non-­‐‑Linearity / Linearity further discussion In engineering parlance, the strength and presence of the undesired outputs are the result of what is known as circuit non-­‐‑linearities and are quantified by “linearity” principles, calculations and measurements. If a mixer circuit could perform as an ideal multiplier, only the desired output would be created and the mixer would be said to be perfectly linear. It is therefore judicious, especially in direct conversion receivers, to have a down-­‐‑
converter or mixer with the most possible linearity to reduce or eliminate the undesired outputs. There are many mixer architectures and circuits that attempt to 21 reduce the unwanted outputs including balanced and double balanced mixer designs. Some of these undesired outputs are of no to little consequence to the performance of superheterodyne receivers, but are critical to the performance of direct conversion receivers. For example, in a superheterodyne receiver, any undesired DC (direct current) at the down-­‐‑converter / mixer output(s) is inconsequential because the first down-­‐‑converter/mixer output(s) can be AC (alternating current) coupled to the following receiver circuitry to effectively block the unwanted DC. Conversely, in a direct conversion receiver, the output of the down-­‐‑converter can be DC coupled and the unwanted DC cannot be blocked and becomes a strong interferer to the desired signal. Receiver System Analysis Example 1 Impact of the Down-­‐‑converter / Mixer on Receiver Performance When evaluating receivers, engineers are interested in three key receiver performance metrics, (1) receiver sensitivity, (2) receiver linearity, and (3) receiver dynamic range: (1) Receiver sensitivity determines the minimum desired RF input signal power the receiver can receive and demodulate in the presence of noise. (2) Receiver linearity is related to the strongest desired RF signal power that the receiver can receive and demodulate. (3) Receiver dynamic range is related to the receiver’s ability to receive and demodulate a weak RF signal in the presence of a strong RF signal. Fortunately, there are some basic system analysis equations that allow engineers to “plug in” the performance parameters of the individual receiver circuits and determine the receiver’s overall performance. 22 Receiver Sensitivity Receiver sensitivity is determined by the lowest RF carrier signal power a receiver can demodulate. Receiver sensitivity is related to “minimum detectable signal”(MDS), which is the smallest signal a receiver can detect. Receiver sensitivity is equal to the MDS plus the minimum specified carrier to noise (C/N) power ratio. [Reference: Understanding and Enhancing Sensitivity in Receivers for Wireless Applications, Technical Brief SWRA030, Edited by Matt Loy, May1999] The MDS and receiver sensitivity are directly related to the receiver’s noise factor, which is used to calculate the receiver’s noise figure. The noise factor is calculated using Friis equation. “The cascaded noise factor equation applies to multi-­‐‑stage networks. Figure 26 shows a system with several cascaded stages constituting a receiver system. This system has an n-­‐‑number of stages in which both available gain and noise figure are known for each stage. Gain is expressed in dB for this system. Some of the blocks may have gain, whereas others have loss (negative gain). If a stage contributes a loss to the signal, the gain in dB is negative. A stage that increases the signal level is treated as a positive gain in dB. Each stage is sequentially numbered with subscripts referenced in the following equations. All gains are defined as the available gain of each stage. Harold Friis defined total system noise factor FT mathematically by equation (51) conforming to Figure 26. 23 [Reference: Understanding and Enhancing Sensitivity in Receivers for Wireless Applications, Technical Brief SWRA030, Edited by Matt Loy, May1999] It is important to note that in order to calculate the receiver’s noise factor and ultimately the receiver’s noise figure, the gain or loss of each receiver stage must be stated in power. 24 Receiver stages include low noise amplifiers (LNAs), down-­‐‑converters/mixers, filters, intermediate frequency amplifiers (IF Amps), and baseband amplifiers (BB Amps). Superheterodyne Receiver Sensitivity Example 1 Exemplary Superheterodyne Receiver Front End 1 LNA Passive Mixer IF SAW F ilter Noise Figure(dB): 1 .5dB Down-­‐‑converter Noise Figure(dB): 4dB Factor(Linear): 1.41 Noise Figure(dB): 7dB Noise Noise Factor(Linear): 2 .51 Gain(dB): 19dB Noise Factor(Linear): 5 .01 Gain(dB): -­‐‑4dB Gain(Linear): 79.43 Gain(Linear): .398 Gain(dB): -­‐‑7dB IP3: 1 0.0 IP3: 50 Gain(Linear): .200 IP3: 10.0 IF LNA Noise Figure(dB): 3dB Noise Factor(Linear): 2 .00 Gain(dB): 20dB Gain(Linear): 100 IP3: 3 0 Exemplary Superheterodyne Receiver Front End 1 By applying Friis’s equation, it can be shown that the example 1 superheterodyne receiver has an input noise factor of 1.72 which equates to a receiver input noise figure of 2.35dB. In order to calculate the example receiver’s minimum detectable signal (MDS) two additional example receiver specifications are required: (1) The receiver bandwidth and (2) the minimum specified input carrier to noise ratio in dB. In this example the receiver bandwidth is 9600Hz and the minimum carrier to noise ratio is 9dB. The resultant receiver MDS is -­‐‑131.83dBm and the receiver sensitivity is -­‐‑122.83dBm. 25 For completeness, a graph of the signal to noise power ratio per receiver stage is included: Signal!to!Noise!Power!per!Stage!
12)
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8)
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Signal)to)Noise)Power)per)Stage)
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Receiver Linearity Receiver linearity is often quantified by a mathematical construct known as a intercept point. “The system intercept point is computed with an equation similar to the cascaded noise factor equation (equation (51)). Equation (87) uses numeric gains and input intercept points. Total numeric input intercept point ipiT for any undesired response is determined by the reciprocal of equation (87).” 26 “Total intercept point is given in dBm if the numeric power is referenced to 1 mW.” [Reference: Understanding and Enhancing Sensitivity in Receivers for Wireless Applications, Technical Brief SWRA030, Edited by Matt Loy, May1999] The third order intercept point (IP3) is one of the most commonly used input intercept points used to evaluate receiver performance. Applying the above equations to exemplary superheterodyne receiver front end 1, the input IP3 or IIP3 equals -­‐‑9.05dBm. Receiver Dynamic Range “The spur-­‐‑free dynamic range is the difference between the fundamental power and the noise power when the distortion products are equal to the noise power. Figure 45 clarifies the spur-­‐‑free dynamic range. Said another way, at a specific fundamental 27 power level, the distortion product power is equal to the noise power. The spur-­‐‑free dynamic range is defined mathematically by equation (94). “ [Reference: Understanding and Enhancing Sensitivity in Receivers for Wireless Applications, Technical Brief SWRA030, Edited by Matt Loy, May1999] Equation (94) can be simplified by substituting IP3 for IP3o -­‐‑ Gsys. Subsequently, the spurious free dynamic range of exemplary superheterodyne receiver front end 1 is 81.85dB. Overall Receiver Performance Measurements Receiver performance can also be determined by measuring the error vector magnitude (EVM) of a signal constellation and the bit error rate (BER). EVM is a measure of overall signal quality, which is a function of the receiver’s noise figure, linearity, and dynamic range. Bit error rate (BER) is a measure of the percentage of bit errors relative to the total number of bits received by the receiver. BER can be correlated to EVM. Using a quadrature phase shift keying (QPSK) signal constellation as an example, signal constellation 1 shows an ideal carrier signal trajectory. Signal constellation 2 shows the carrier signal trajectory in the presence of noise. 28 Signal Constellation 2 Signal Constellation 1 Additional Direct Conversion Legacy Mixer Design Considerations In order to utilize legacy mixer designs in direct conversion receivers like OthelloTM, engineers were forced to add correction and calibration circuitry to the double balanced Gilbert cell in order to meet the minimum required receiver specifications. The correction and calibration circuitry was included to further reduce the impact of mixer design issues in direct conversion receivers including unwanted direct current (DC) offset voltages, local oscillator (LO) re-­‐‑radiation (re-­‐‑rad) signal power, in-­‐‑phase (I) and quadrature-­‐‑phase (Q) signal path matching requirements, and increased linearity requirements. These design issues affect the receiver’s range, reliability, complexity, and repeatability. Even with the additional correction and calibration circuitry, the performance of direct conversion receivers that employed legacy down-­‐‑converters/mixers was inferior to the superheterodyne receivers they replaced. Recognizing the limitations and drawbacks of legacy down-­‐‑converters/mixers, engineers began to explore alternative down-­‐‑converter architectures and circuits. One such alternative that was the subject of many technical articles and papers was voltage sampling. 29 Voltage Sampling Frequency Down-­‐‑Converters The use of voltage sampling techniques as an alternative to legacy continuous time down-­‐‑converters/mixers in receivers has been extensively explored by the engineering community. First, it is important to note that a voltage sampler does not achieve frequency down-­‐‑conversion by multiplication like traditional analog, active, or passive mixers. Unlike a traditional or legacy mixer, a voltage sampler converts a continuous-­‐‑time input signal into a discrete-­‐‑time output signal by sampling the input signal over aperture periods (pulses). Further contrasting legacy mixers to samplers, a sample and hold output does not contain the sum and difference frequencies of the RF carrier signal fc plus or minus the oscillator signal fLO. Ideal voltage samplers produce the voltage at the sampling instant at their output and have an infinitely high path loss between their input and their output. “Ideal sampling produces a train of Dirac delta functions, and the weight of each delta function is proportional to the value of the sampler input at the time of sampling. Dirac delta functions cannot, of course, be realized in practice. “ [Reference: Sampling, Peter Kinman, Fresno State University, link: http://zimmer.fresnostate.edu/~pkinman/pdfs/Sampling.pdf] Dirac delta functions consist of infinitely narrow and infinitely tall pulses which cannot be created by practical circuitry. Because ideal sampling cannot be realized in practice, it is commonplace to approximate ideal sampling. 30 “Natural sampling is a practical method that approximates ideal sampling. The analog input x(t ) is multiplied by a train of uniformly spaced, rectangular pulses. The figure below illustrates the difference between ideal and natural sampling. If the width of the pulses is much smaller than the spacing between pulses, then natural sampling may be regarded as an approximation of ideal sampling.” [Reference: Sampling, Peter Kinman, Fresno State University, link: http://zimmer.fresnostate.edu/~pkinman/pdfs/Sampling.pdf] Natural sampling takes into account realizable pulses, p(t) and is the fundamental basis for the most common and practical voltage sampling circuitry, referred to as sample-­‐‑and-­‐‑hold. “The most common sampler is the sample-­‐‑and-­‐‑hold device. The figure below illustrates how this device works. The analog signal x(t) is sampled every seconds. The sampler output holds steady at the last sample value, until a new sample is available. In this way, the sampler output is a staircase approximation to x(t). “ 31 Re-Cap
[Reference: Sampling, Peter Kinman, Fresno State University, link: Analog Input
http://zimmer.fresnostate.edu/~pkinman/pdfs/Sampling.pdf]
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the next sampling instant. Ideal Sampling
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[Reference: Data Converters, EECS 247 Lecture 17, 2005 H.K.] Creating an ideal voltage sampler requires unrealizable operational timing and circuit values including zero resistance switches, infinitely narrow sampling pulses or apertures, infinitely small capacitance values, and an infinitely high output impedance. As stated earlier, the concept of infinitely high is a mathematical construct and is not realizable in physical or practical hardware. 32 Ideal T/H Sampling
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Ideal T/H Sampling
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EECS 247 Lecture 17: Data Converters
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[Reference: Data Converters, EECS 247 Lecture 17, 2005 H.K.] As stated above, ideal impulse or track-­‐‑and-­‐‑hold voltage samplers produce the input voltage at the sampling instant at their output and have an infinitely high path loss between their input and output. Practical Voltage Sampling Circuitry Of great interest to engineers are practical circuits that approximate an ideal voltage sampler. An exemplary paper that explores and evaluates a practical voltage sampling down-­‐‑converter is titled, “A 2GHz Subharmonic Sampler for Signal Downconversion”, by Aarno Parssinen, Student Member, IEEE, Rahul Magoon, Stephen I. Long, Senior Member, IEEE, and Veikko Porra, Senior Member, IEEE, published in 1997. In the paper, the authors confirm the ideal sampling theory, “As 33 seen from Fig. 3, the conversion loss is minimized when an infinitely narrow sampling pulse is used.” [page 2347, Column 2, section C. Strobe pulse circuit]. Additionally, the authors compare the available local oscillator (LO) frequencies design choices between legacy down-­‐‑converters/mixers and sampling circuitry and conclude, “Therefore, in comparison to classical continuous-­‐‑time mixers, an additional degree of freedom for LO frequency selection is available.” [page 2344, column 1, section Introduction] The concept of the additional freedom of the local oscillator (LO) frequency selection is related to “aliasing.” Aliasing is also referred to as under-­‐‑sampling or sub-­‐‑sampling an input signal. It is also important to note that in all of the above sampling references, the sampling circuitry is assumed to meet or exceed Nyquist sampling theorem requirements. Often, when samplers are used as frequency down-­‐‑converters this is not the case. [Reference: Aliasing, Bruno A. Olshausen, PSC 129 – Sensory Processes, October 10, 2000, link: http://redwood.berkeley.edu/bruno/npb261/aliasing.pdf] If the sampling frequency violates the Nyquist sampling theorem, the sampler’s output signal will alias. “Aliasing arises when a signal is discretely sampled at a rate that is insufficient to capture the changes in the signal.” [Reference: Aliasing, Bruno A. Olshausen, PSC 129 – Sensory Processes, October 10, 2000, link: http://redwood.berkeley.edu/bruno/npb261/aliasing.pdf] 34 The concept of aliasing is unique to samplers and does not apply to multiplying mixers. When samplers are used for frequency down-­‐‑conversion, aliases can offer additional advantages in direct conversion receiver designs. This paper describes the additional freedom for selecting LO frequencies mathematically as: “….where n is an integer called the sampling ratio.” [page 2344, column 2, section Introduction]. A more complete mathematical relationship to describe a sampling down-­‐‑converter’s output frequency while preserving the concept of aliasing is shown below: FAR = FLO = (FC -­‐‑ FIF) / n; where n= .5, 1, 2, 3... where FAR is the aliasing rate, FLO is local oscillator frequency, FC is the RF carrier frequency, and FIF is the intermediate frequency. In the case of direct conversion, the desired frequency offset (FIF) is equal to zero: n*FAR = FC; where n= .5, 1, 2, 3.... and FAR = FC/n In contrast to the legacy multiplying down-­‐‑converters/mixers, which can only perform direct conversion at a single local oscillator (LO) frequency, a receiver designer utilizing sampling has a choice of multiple local oscillator (LO) frequencies that will produce the desired output frequency. In the sampling domain, these multiple LO frequencies are known as harmonics and sub-­‐‑harmonics. Relating to the equation above, n = .5 is the second harmonic, n = 1 is the first harmonic or fundamental, n= 2 is the second sub-­‐‑harmonic, n= 3 is the third sub-­‐‑harmonic , n= 4, etc.. Samplers that operate when n = 2, 3, 4… are called sub-­‐‑harmonic samplers. It should be noted that although the LO frequency produces aliases of the RF carrier signal, the LO frequency does not produce aliases of the modulated information 35 signals on the RF carrier signal. Additionally, the paper describes the operation and requirements of practical voltage track-­‐‑and-­‐‑hold sampling circuitry including, “When the switch is closed, the output tracks the input…” “Opening the switch turns the sampling into the hold mode, and the output retains the final value of the input until the switch turns on again.” and “In the circuit, the time constant for charging the hold capacitance must be small compared to the time duration while the switch is closed in order to track the input. The falling edge of the sampling pulse must be steep enough so as not to limit the input bandwidth. The circuit output should be terminated with a high-­‐‑impedance buffer to minimize signal droop during hold.” [page 2345, column 1, section II. Conversion Efficiency of a Sub-­‐‑sampling Mixer] The authors promulgate the concept that a track-­‐‑and-­‐‑hold circuit can be optimized with practical component values to approximate an ideal impulse sampling response to produce a relatively accurate voltage sample. Table 1 provides a summary of the track-­‐‑and-­‐‑hold sampling circuitry performance: 36 The voltage sampling gains of -­‐‑1dB and -­‐‑2dB are voltage losses from the sampled input signal to the output of the sampling circuit and are defined in the paper as down-­‐‑conversion losses. “The downconversion loss for the passive sampler is 1 dB and the total system gain 3 dB.” [page 2344, column 1, section Abstract]. Since all of the technical work in this paper is directed towards track-­‐‑and-­‐‑hold voltage sampling, it is understandable that the authors would state the performance in terms of voltage. However, as per Friis’ noise factor equation, in order to determine how this exemplary track-­‐‑and-­‐‑hold sampler will perform in a receiver, the down-­‐‑
conversion loss must be stated in power not voltage. Fortunately, Table 1 includes the circuit’s Noise Figure which is approximately to the circuit’s path loss in dB. Replacing the down-­‐‑converter in the Receiver System Analysis Example 1 above with the measured track-­‐‑and-­‐‑hold circuit performance from Table 3 yields: 37 LNA Noise Figure(dB): 1 .5dB Noise Factor(Linear): 1 .41 Gain(dB): 19dB Gain(Linear): 79.43 10.0 IP3: Sampling Down-­‐‑converter IF SAW F ilter Noise Figure(dB): 29dB Noise Figure(dB): 4dB Noise Factor(Linear): 794.3 Noise Factor(Linear): 2 .51 Gain(dB): -­‐‑4dB Gain(dB): -­‐‑29dB Gain(Linear): .398 Gain(Linear): .0013 IP3: 10.0 IP3: 50 IF LNA Noise Figure(dB): 3dB Noise Factor(Linear): 2 .00 Gain(dB): 20dB Gain(Linear): 100 IP3: 3 0 Exemplary Superheterodyne Receiver Front End 2 The example superheterodyne receiver front end 2 has an input noise factor of 51.52 which equates to a receiver input noise figure of 17.12dB. The minimum detectable signal (MDS) using the same 9600Hz receiver bandwidth and 9dB carrier to noise ratio as the receiver in example 1 is -­‐‑117.06dBm and the receiver sensitivity is -­‐‑108.06dBm. In receiver sensitivity example 1, the receiver’ sensitivity is -­‐‑122.83dBm and in this example, the receiver’s sensitivity is -­‐‑108.06dBm. Comparing the receiver 38 sensitivity from the two examples of -­‐‑108.06dBm and -­‐‑122.83dBm equals a difference of 14.77dB, which is also the difference in the two receiver’s noise figures (17.12dB – 2.35dB = 14.77dB). The overall receiver sensitivity of receiver example 2 has been diminished by 14.77dB and, given the same input signal power of -­‐‑
122.83dBm from example 1, the output signal to noise of example 2 is degraded by 36dB (4.65dB – (-­‐‑31.35dB) = 36.0dB). Example Receiver Front End 2 Signal!to!Noise!Power!per!Stage!
15)
10.57728767)
10)
8.924713721)
0.008258856)
0)
*5)
Signal!to!Noise!Power!per!Stage!
12)
10.57728767)
10)
5)
!LNA!
!Downconverter!
!SAW!
8)
!IF!Amp!
*10)
Example Receiver Front End 1 *15)
6)
*14.22728189)
4)
*25)
*35)
4.652201131)
Signal)to)Noise)Power)per)Stage)
*20)
*30)
6.997819517)
Signal)to)Noise)Power)per)Stage)
2)
*31.34692846)
0)
!LNA!
!Downconverter! !SAW!
!IF!Amp!
Under these conditions, any signal constellation received by receiver 2 would have an error vector magnitude (EVM) approaching 100% and a corresponding bit error rate (BER). The third order intercept point (IP3) of exemplary superheterodyne receiver front end 2 is calculated to be -­‐‑9.05dBm, which is equal to the IP3 of example receiver 1. The spurious free dynamic range (SFDR) for example 2 is 72dB compared to the SFDR of 81.85dB from example 1. 39 Side by Side Comparison of Exemplary Superheterodyne Receiver Front End 1 and Exemplary Superheterodyne Receiver Front End 2 Example Example Receiver Front End 1 Receiver Front End 2 Noise Figure 2.35dB 17.12dB Sensitivity -­‐‑122.83dBm -­‐‑108.06dBm IP3 -­‐‑9.05dBm -­‐‑9.05dBm Dynamic Range 81.85dB 72.0dB By replacing a legacy mixer in receiver 1 with a practical voltage sampler in receiver 2, it is clear that performance of receiver 2 is severely degraded. Receiver 2 is much less sensitive and has much less dynamic range. As a real world example of the impact of these performance metrics, all cellular standards require a receiver’s noise figure to be 10dB or below. Receiver 2 would not meet any cellular standard on that basis alone. As another example, CDMA receivers require a dynamic range of greater than 75dB to be allowed onto a network: Receiver 1 meets this specification with margin whereas receiver 2 fails by 3dB. “SAW-­‐‑less” cellphone receivers typically require a minimum dynamic range of 80dB. It should also be noted that in today’s competitive environment, most competitive cellphone receiver’s integrated circuits (IC’s) have noise figures of less than 3dB, which greatly exceeds the standards requirements. Unfortunately, as can be seen from the example above, voltage samplers have impractical noise figures and limited dynamic range when used in either superheterodyne or direct conversion receivers. Because of these performance limitations, voltage sampling down-­‐‑converters are not typically found in cellphone, WiFi, and Bluetooth receivers. 40 Overview of Voltage Sampling Frequency Down-­‐‑Converters Compared to Legacy Continuous-­‐‑Time Frequency Down-­‐‑
Converters/Mixers Traditional or legacy multiplying (non-­‐‑sampling) frequency down-­‐‑
converters/mixers have reasonable noise figures (NF’s), typically between 3dB to 12dB compared to the 25dB to 50dB noise figures (NF’s) of practical voltage samplers. This significant difference in the higher noise figures of voltage samplers has a negative impact of all receiver performance parameters. Receivers that use voltage sampling are less sensitive (less range) and have lower dynamic range (less reliability) than their legacy mixer based counterparts. As a general rule, the lower noise figures realized in legacy multiplying frequency down-­‐‑converters/mixers enable more practical receiver designs when compared to voltage samplers. As noted above, one of the first cell phone direct conversion receivers was the OthelloTM product, which was based on a legacy Gilbert Cell analog multiplier frequency down-­‐‑converter. The lower noise figure of the legacy down-­‐‑converter lowers the power gain requirements of the preceding low noise amplifier (LNA) and helps preserve the receiver’s overall dynamic range. However, in order to achieve a receiver’s desired overall dynamic range requirements, legacy down-­‐‑converters need to be operated at higher voltages with higher power consumption and higher local oscillator (LO) signal powers compared to voltage samplers. Neither voltage samplers or legacy down-­‐‑converters are optimal solutions for superheterodyne or direct conversion receiver designs. 41 Section 4 Introduction to Energy Transfer Sampling In wireless receiver designs, it is desirable for the frequency down-­‐‑converter to have a low noise figure (NF) while maintaining or improving high IP2 and IP3 linearity. It is also desirable to simultaneously achieve the low noise figure (NF) and high linearity using minimal operational voltages, low power consumption, and minimum local oscillator (LO) signal power. Additionally, it is advantageous for the frequency down-­‐‑converter to output the best signal to noise ratio (SNR) possible under the specified operating conditions. Energy Transfer Sampling (ETS) provides all of these advantages and enables the highest level of integration in the smallest integrated circuit process geometries. Furthermore, frequency down-­‐‑converters based on Energy Transfer Sampling(ETS) can be optimized for direct conversion receivers. Some of the receiver performance benefits of Energy Transfer Sampling (ETS) can be demonstrated by substituting the performance parameters of a practical ETS down-­‐‑converter component into Exemplary Superheterodyne Receiver Front End 1 or 2 to create a third receiver front end example for comparison. The measured performance parameters of the practical ETS component used in Receiver System Analysis 3 below are listed on ParkerVision’s PV5870 Energy Transfer Sampling I/Q Modulator/Demodulator specification sheet. [Reference: PV5870_SpecRevJ, copyright 2015] 42 Receiver System Analysis Example 3 Energy Transfer Sampling Down-­‐‑Converter LNA Noise Figure(dB): 1 .5dB Noise Factor(Linear): 1 .41 Gain(dB): 19dB Gain(Linear): 79.43 IP3: 1 0.0 Energy Transfer Sampling Down-­‐‑converter Noise Figure(dB): 6.1dB Noise Factor(Linear): 3.311 Gain(dB): -­‐‑5.2dB Gain(Linear): .3020 IP3: 30 IF SAW F ilter IF LNA Noise Figure(dB): 4dB Noise Figure(dB): 3dB Noise Factor(Linear): 2 .51 Noise Factor(Linear): 2 .00 Gain(dB): -­‐‑4dB Gain(dB): 20dB Gain(Linear): .398 Gain(Linear): 100 IP3: 50 IP3: 3 0 Exemplary Superheterodyne Receiver Front End 3 The Example Superheterodyne Receiver Front End 3 with the ETS down-­‐‑converter has an input noise factor of 1.609 which equates to a receiver input noise figure of 2.09dB. The minimum detectable signal (MDS) using the same 9600Hz receiver bandwidth and 9dB carrier to noise ratio as the receiver in examples 1 and 2 is -­‐‑
132.09dBm and the receiver sensitivity is -­‐‑123.09dBm. 43 The IP3 of example receiver 3 is +7.23dBm and the spurious free dynamic range (SFDR) is 92.88dB. The table below shows the performance metrics of all three receiver front end examples: Example Receiver Example Receiver Example Receiver Front End 1 Front End 2 Front End 3 (Passive Mixer down-­‐‑ (Voltage Sampler (Energy Transfer converter) down-­‐‑converter) Sampling down-­‐‑ converter) Noise Figure 2.35dB 17.12dB 2.07dB Sensitivity -­‐‑122.83dBm -­‐‑108.06dBm -­‐‑123.11dBm IP3 -­‐‑9.05dBm -­‐‑9.05dBm +7.23dBm Dynamic Range 81.85dB 72.0dB 92.893dB When used in direct conversion receivers, Energy Transfer Samplers exhibit additional performance benefits compared to legacy mixers and voltage samplers. 44 Energy Transfer Sampling Theory of Operation Energy Transfer Samplers (ETS) perform frequency down-­‐‑conversion by using a portion of the energy from a continuous-­‐‑time input signal over a discrete-­‐‑time period to generate a frequency down-­‐‑converted signal from the input signal energy. Because of the discrete-­‐‑time sampling elements of Energy Transfer Samplers (ETS), the down-­‐‑converted ETS output signal is created by sampling the continuous-­‐‑time input signal at an aliasing rate (sampling at less than twice the highest frequency in the input signal). The highest frequency in the input signal used to determine the aliasing criteria is related to the Nyquist minimum bandwidth. Nyquist Minimum Bandwidth graph shows the modulation This bandwidth of an exemplary quadrature phase shift keying (QPSK) modulated radio frequency ( RF) carrier s ignal. The RF carrier frequency is labeled as 0 and the Nyquist minimum bandwidth is determined by the symbol rate (symbols per s econd which are related to bits per second). Highest Frequency in the input signal Sampling at a rate that is less than twice the carrier frequency plus one-­‐‑half of the Nyquist minimum bandwidth will result in aliasing. The process of Energy Transfer Sampling (ETS) to create a frequency down-­‐‑
converted output signal is accomplished by successive steps of: 1) Transferring a 45 portion of the energy from the input signal into a storage element and 2) Transferring a portion of the energy in the storage element to the output or load. Energy Example
Current Flow
Sample Switch
Closed
Input
Impedance
Step 1 Energy Storage
Capacitor
RF Carrier Signal
Output Impedance
Energy Transfer
Signal
Energy Example
Current Flow
Sample Switch
Open
Input
Impedance
Energy Storage
Capacitor
RF Carrier Signal
Output Impedance
Step 2 Energy Transfer
Signal
Exemplary Single Ended Exemplary Energy Transfer Sampler Current Flow In the case where the Energy Transfer Sampler (ETS) storage element is a capacitor, a portion of the energy from the continuous-­‐‑time input signal is stored (controlled charge) in the capacitive storage element in the form of charge (q) when the switch is closed (aperture period) and a portion of the stored charge (q) is transferred to 46 the output when the switch is open. Since only a portion of the charge stored in the capacitor is transferred to the load (controlled discharge) when the switch is open, the down-­‐‑converted output waveform is generated over multiple charging/discharging sampling cycles which results in accumulating and integrating the energy in the capacitive storage element over multiple aperture periods. The process of charging, accumulating, integrating, and discharging the energy over multiple aperture periods provides a high energy to noise ratio down-­‐‑converted output signal which is consistent with one of the principle advantages of Energy Transfer Sampling (ETS): Transferring non-­‐‑negligible amounts of energy from a continuous-­‐‑time input signal and generating the down-­‐‑converted output signal from the transferred energy with a low noise figure, high signal to noise ratio (SNR), and a high Energy per bit to noise power (Eb)/(No). Energy Transfer Samplers (ETS) derive their name from the energy and power relationship. Power is expressed in Watts or Joules per second: Power(t) = Joules(t) / second (time) Energy is expressed in Joules and is related to power as per the equation below: Energy(t) = Power(t) * seconds (time) Additionally: Power(t) = V(t) * I(t); Energy(t) = V(t) * I(t) * seconds In order to transfer energy, a non-­‐‑negligible amount of current (I(t)) must flow over a period of time when the energy sample switch is closed and when the energy sample switch is open. By contrast, in a ideal voltage sampler, the current (I(t)) would be zero when the voltage sample switch is closed and when the voltage sample switch is open. 47 When the energy sample switch is closed during the aperture period, the amount of energy transferred into the storage element is related to the input V(t)during the aperture period * I(t)during the aperture period * aperture period in seconds: Energy(t) transferred to the storage element during the aperture period -­‐‑> V(t)switch closed * I(t)switch closed * aperture period in seconds When the energy sample switch is open, the amount of energy transferred to the output is related to V(t)switch open * I(t)switch open * ((1/Sample rate) – aperture period) in seconds: Energy(t) transferred to the output between aperture periods -­‐‑> V(t)switch open * I(t)switch open * ((1/Sample rate) – aperture period) Adding the amount of energy transferred to the Energy Transfer Sampler’s (ETS) output in Joules during the aperture period (sample switch closed) to the amount of energy transferred to the ETS’s output in Joules between aperture periods (sample switch open) and dividing the sum by the energy sampling rate in seconds yields the amount of power transferred between the ETS’s input and output, which allows the Energy Transfer Sampler’s (ETS) path loss and noise figure to be determined. Path Loss in Power(Watts) = (Energy(t)transferred to the output switch closed + Energy(t)transferred to the output switch open)) / Sample rate in seconds The concept of transferring non-­‐‑negligible amount of energy and power from the input to the output makes Energy Transfer Samplers unique in the sampling domain. Prior to Energy Transfer Samplers (ETS), impulse and track-­‐‑and-­‐‑hold samplers measured the voltage of the continuous-­‐‑time input signal at a sampling instant. The goals, operation, component values, and results of Energy Transfer Samplers (ETS) are completely different than voltage sampling. 48 Exemplary Voltage Sampler and Energy Transfer Sampler Component Values and Results 50 Ohms Input Z Voltage Sampler Circuit 50 Ohms Input Z Energy Transfer Sampler Circuit 49 Example Voltage Sampler and Energy Transfer Sampler (ETS) Comparison Table Technology Input Capacitance Impedance (Z) (C) Energy Transfer Sampler (VS) Impedance (Z) Path Loss (dB) 6pf (Energy 50 Ohms Sampler (ETS) Voltage Output Storage 500 Ohms 7.9dB 100 MOhms 54dB Capacitance) .2pf (Voltage 50 Ohms Hold Capacitance) 1:1 30:1 ETS Input ETS storage ETS:VS Value Impedance = VS capacitance is Ratio Input Impedance 30 times (1/200,000):1 VS Output capacitance (1/40,738):1 or 46.1dB Impedance is ETS transfers 200,000 times the 40,738 times greater than VS ETS Output hold Impedance more power to the output than the VS The circuit simulations and comparison table above show that the component values, operation, and results are comprehensively different for an Energy Transfer 50 Sampler (ETS) versus a voltage sampler. Energy Transfer Sampling (ETS) Input Impedance Matching One of the criteria for Energy Transfer Sampler (ETS) operation is that non-­‐‑
negligible amounts of energy must be transferred into a storage element when the energy sample switch is closed and, when the energy sample switch is open, non-­‐‑
negligible amounts of energy must be transferred to the energy sampler output. In order to meet this criterion, a sufficient amount of current (I(t)) must flow when the energy sample switch is both opened and closed. Conversely, in an ideal voltage sampler, the current (I(t)) would be zero. Recall that: Power(t) = V(t) * I(t); Energy(t) = V(t) * I(t) * seconds Because an Energy Transfer Sampler’s (ETS) storage element is reactive and has a significant impedance relative to the input impedance, the voltages (V(t)) and currents (I(t)) are out of phase. As per impedance matching principles, the phase relationship between the voltages (V(t)) and the currents (I(t)) can be controlled to improve the amount of energy transferred into the storage element when the energy sampling switch is closed and from the storage element to the output when the switch is open. Controlling the voltage (V(t)) and the current (I(t)) phase relationship can improve the frequency down-­‐‑conversion efficiency and further reduce the path loss. By contrast, a voltage sampler does not transfer non-­‐‑
negligible energy or power and cannot be “impedance matched.” 51 Exemplary Energy Transfer Sampler (ETS) with Input Impedance Match Two E lement Impedance Matching Network 50 Ohms Input Z Compared to the first Exemplary Energy Transfer Sampler (ETS), the ETS with the two element input impedance matching network has a significantly less path loss. Non-­‐‑Impedance Matched Energy Transfer Sampler (ETS) Path Loss: 7.9dB Impedance Matched Energy Transfer Sampler (ETS) Path Loss: 2.1dB 52 The input impedance matched Energy Transfer Sampler (ETS) has further performance gains compared to a voltage sampler. Example Voltage Sampler and Energy Transfer Sampler (ETS) Comparison Table Technology Input Capacitance Output Impedance (Z) (C) Impedance (Z) Path Loss (dB) Input Impedance Matched Energy 6pf (Energy 50 Ohms Storage 500 Ohms 2.1dB 100 MOhms 54dB Capacitance) Transfer Sampler (ETS) Voltage Sampler (VS) ETS:VS Value Ratio .2pf (Voltage 50 Ohms Hold Capacitance) 1:1 30:1 ETS Input Impedance ETS storage = VS Input capacitance is Impedance (1/200,000):1 VS Output Impedance is 30 times greater 200,000 times the (1/154,881):1 or 51.9dB The input impedance than VS hold ETS Output matched ETS capacitance Impedance transfers 154,881 times more power to the output than the VS 53 An Energy Transfer Sampler’s (ETS) input impedance match can implemented using discrete components as shown above or the voltages (V(t)) and currents (I(t)) phase relationships can be controlled as part of the output circuitry of a preceding circuit such as an low noise amplifier (LNA). Energy Transfer Sampling (ETS) Sub-­‐‑Harmonic Operation Overview The frequency down-­‐‑converted output of an Energy Transfer Sampler (ETS) is determined by the aliasing signal created by sampling a portion of the input signal energy at an aliasing rate. An Energy Transfer Sampler’s (ETS) frequency response is that of a sampling system where FAR is the frequency of the aliasing or sampling rate, FC is the frequency of the RF carrier, and FIF is the intermediate frequency or frequency offset: FAR = FLO = (FC -­‐‑ FIF) / n; where n= .5, 1, 2, 3... In the case of direct conversion, the desired frequency offset (FIF) is equal to zero: n*FAR = FC; where n= .5, 1, 2, 3.... and FAR = FC/n For example, in direct conversion operation, if the input RF carrier frequency is 1 GHz, Energy Transfer Samplers (ETS) will produce baseband signals when the energy transfer sampling frequency is approximately 2GHz (n=.5), 1GHz (n=1), .5GHz (n=2), .333GHz (n=3), .250GHz(n=4), and so on. Sub-­‐‑harmonic Energy Transfer Samplers (ETS) are operated at n=2, n=3, n=4….. 54 When Sub-­‐‑harmonic Energy Transfer Samplers (ETS) are input impedance matched, they can exhibit low noise figures similar to ETS’s operated at the first harmonic or fundamental frequency sampling rate. Energy Transfer Sampling (ETS) Differential Configuration Overview The basic Energy Transfer Samplers (ETS) shown above are single-­‐‑ended (non-­‐‑
differential) examples designed to highlight and illustrate the fundamental operation and characteristics of Energy Transfer Sampling (ETS). Differential Energy Transfer Samplers (ETS) have additional advantages over single-­‐‑ended ETS’s including reduced direct current (DC) offsets, increased dynamic range, and common-­‐‑mode rejection of unwanted signals and noise. 55 Reference Section Derivation 1 RF signal = LO signal = Let = 90 -­‐‑ ; then Multiply: * using the Trigonometric Identity: Equals: Simplify: Let = 0; (0 is the reference phase of fc) Simplify using: and ; the desired output containing the sum and difference frequencies of and 56