Download Polycrystalline Silicon

Junction Structure and Dark Current
The junction potential at the p-n junction has an important effect on the semiconductor
energy levels. Consider first the separated p-type and n-type phases first. They have the
same conduction and valence band edge energies, separated by the same and gap, but
different Fermi levels and therefore different work functions, p andn.
See Figure 1
When the two doped materials are pushed together and equilibrated, the Fermi level must
be the same throughout the device causing the band edge energies, the semiconductor
energy levels) to bend across the junction in response to the local electric field. The
equilibrium band-bending energy is qVbo is related to the difference in the work functions
of the separate, uncharged materials qVbo = n - p
As the Fermi level in a doped semiconductor normally is in the gap, but near the
majority-carrier band edge, qVbo is normally slightly smaller than the bandgap energy.
Suppose now that a bias voltage, Vj, is applied across the solar n-p Si solar cell in the
dark. At equilibrium, no net current flows in the cell, but small movements back and
forth of electrons and holes in the valence band occur. These are called the generation,
ih,gen and ie,gen thermal generation currents from the minority carriers (e- on the p side and
holes on the n-side. Also the recombination currents, io h,rec and io e, rec, present from the
majority carriers) are present, both generated in the device at a miniscule rates under
thermal conditions.
See Fig
Those minority carriers that reach the junction without first recombining are swept across
it in opposite directions by the strong electric field. On the other hand, the majority
carriers must flow up the band bending barrier (energetically unfavorable), but
entropically favorable because the carriers move from a region of high to low
concentration.
At equilibrium, the generation and recombination currents in each band exactly balance
each other, and the sum of the hole and electron thermal generation currents is called the
saturation currentl density, io of the junction.
io = ih,gen + ie,gen = io h,gen + io e,rec
When a forward bias voltage, Vj >0, is applied across the junction of the dark cell, the
barrier height is reduced to qVb = q(Vbo -Vj). The generation currents are not affected,
but the recombination currents are. The nets current across the jnction, which is the
difference between the recombination current and the generation current is call the dark
current or junction current ij.
ij(Vj) = ih,rec(Vj) + ie,rec(Vj) – ih,gen – ie,gen = ih,rec(Vj) + ie,rec(Vj) – io h,rec – io e,rec
When a reverse bias, Vj<0, is applied, the barrier height is increased to qVb =
q(Vbo +│Vj│), as shown. the generation currents are still unaffected, but the
recombination currents are now suppressed. Only a very small bias-independent
saturation current passes: ij (Vj<0) = -io
The dependence fo the recombination currents ih,rec(Vj) and ie,rec(Vj) on Vj, is determined
by the cominant recombination mechanism of the carriers injected into the junction. In
moste cells, the dark current-voltage characteristic conforms to the empirical diode eqn.
ij(Vj) = io[exp(qVj/(kT)) – 1]
 is the diode idealit factor.
For an ideal junction, in which no injected carriers recombine in the junction, =1. For an
ideal junction, in which some carriers do recombine in the junction, 1<<2.
For thin-film cells a better eqn. to use is
ij(Vj) = io1[exp(qVj/(kT)) – 1] + io2[exp(qVj/(kT)) – 1]
the 1st term corresponds to carriers that move across the junction without recombining,
and the second to the carriers that recombine in mid-gap.
Independent of the exact form of the diode eqn., all PV cells behave as rectifiers in the
dark, showing highly nonlinear current-voltage character. Junctions must show
rectifying properties in the dark, if they are to show photovoltaic properties in the
light.
When a PV cell is illuminated, a photocurrent and photovoltage are generated.
Fig
Absorption of photons of energy greater than the bandgap energy of the semiconductor
creates excess minority carriers throughout the illuminated region of the cell. The light at
the interior of the cell falls off exponentially with distance into the cell.
Once the minority carriers are generated by the photons, (same song and dance), they
diffuse from the quasi neutral region (QNR) toward the junction where they are swept
across the junction by the junction potential. The sum of the two currents, electrons and
holes, is the photocurrent, iph = ih,ph + ie,ph
The photocurrent is directly proportional to the absorbed photon flux, but independent of
the junction potential
Under open circuit, no current is drawn from the cell and the photocurrent must be
balanced by the recombination current, so the junction self-biases in the forward direction
by the open-circuit voltage Voc. At this voltage, the recombination current exactly
opposes the photocurrent such that
iph – ij(Voc) = 0
Fig
Under short circuit conditions, the illuminated cell will deliver maximum output current,
but at zero output voltage. If the internal resistance effects are negligible, the junction
bias, Vj is also zero, so the band bending is the same as in the dark junction at
equilibrium. Here the short circuit current is given by: isc = │iph│ - io
Under normal circuit conditions, the band bending and junction current are intermediate
between the open-circuit and short circuit ideals, the cell delivers current i at output
voltage V = Vj and the current is given by: i = iph – ij(Vj)
If the photocurrent is bias-independent, the current-voltage character of the dark and
illuminated cell will look similar, but the latter will be shifted down with respect to the
former by the constant amount iph. This is called Superposition.
Fig
The superposition is an ideal case. It is not to be expected where the photocurrent is bias
dependent, which can happen for a number of reasons. In the amorphous silicon cell, the
field int he junction region is wak and the extent of the recombination in it is bias
dependent. Also cells operating a high injection mode, where the concentration of
photogenerated minority carriers becomes comparable with that of the majority carriers,
don’t show superposition since the majority carrier concentrations and fluxes are not the
same in the light and dark. Also cells that have a significant internal series resistance or
shunt conductance also depart from superposition.
Current Voltage Characteristics (i-V)
The i-V characteristic of the illuminated cell can be found by supstituting the diode eqn.
into the normal circuit condition eqn.
i = iph – ijVj) = iph – io[exp(qV/(kT))-1].
The output power is a product of i and V, iV, which is the area of the rectangle of sides i
and V inscribed in the i-V curve. The power should be zero for both the open circuit and
short circuit conditions. The fill factor, defined previously is a measure of the squareness
of the i-V curve. nfill = imp Vmp / (isc Voc)
In efficient cells, the fill factor is around 0.7 to 0.8. In poor cells it can be 0.5 or lower.
The Voc can be found from the above eqn. by setting i=0 and V=Voc. The Voc is given by:
Voc = kT/q ln (1+ iph/io) ~ kT/q ln(iph/io)
For good performance iph and Voc must be as large as possible. What can be expected?
The max value of iph would be obtained if all the photogenerated electron-hole pairs were
collected as photocurrent, and iph can achieve 80-90% of this limit if light absorption and
minority carrier collection are both highly efficient.
The limiting value of Voc is the built in voltage, Vbo . This corresponds to a complete
flattening fo the bands across the junction. This could only happen under extrememly
intense illumination. At AM1 conditions, the values of Voc are usually not much greater
than 0.7 Vbo . Thus Vbo should be as large as possible, essentially limited by the band gap
of the material, or more succinctly, the work function difference between the two sides of
the junction should be as large as possible.
Note that Voc increases as the saturation current, io, decreases. The io has no minimum
value. In thin cells with well passivated surfaces, io can be driven down toward zero, and
Voc toward its upper limit of Vbo .
In thicker cells where volume recombination occurs, the lower limit on io is determined
by the rate of radiative recombination of minority carriers, but usually nonradiateiv
recombination also occurs and this raises io by several orders of magnitude.
The band bending diagrams shown so far are for the simplest and most common type of
photovoltaic junction. This is a p-n homojunction. There are others such as a p-i-n
homojunction, p-n heterojunction formed between semiconductors with different band
gaps, a metal semiconductor junction formed between a metal and an n-type
semiconductor etc.
See fig
Polycrystalline Silicon
Polycrystalline and amorphous silicon cells have advantages
over single-crystal Si cells. There are cost reductions:
a) inexpensive refining processes
b) less Si for each device
c) less costly and energy- and tim-consuming wafering or
layer deposition steps
Problems making these types of cells include:
a) lower efficiencies
b) device performance degradations
c) lack of in-depth knowledge of materials and devices
What is polycrystalline Si?
Material made up of many grains of single-crystal silicon
See Fig
Larger more perfect grains give better performance, the electrical
Behavior more nearly resembles cell made from single-crystal Si.
When light-generated charge carriers encounter grain boundaries,
problems result. With larger grains means fewer grain boundaries so
better cell performance.
Charge carries tend to flow from top to bottom, a cell whose grains
are wide vertical columns is a better cell. (Fig) Polycrystalline
solar cells have been fabricated with efficiencies over 10% and have
significant long-term reliability, with decrease raw material
Czochralski wafers are often 300m thick and an equal or greater amount
Of Si than is contained in the active cell is lost when Si ingots are sawn into
Wafers.
In Polycrystalline fabrication, ribbon growth techniques of flat rectangular
Polycrystalline, 150mm cell wafers result in a factor of 2x300/150 (a factor of 4)
in savings of material.
Grain Boundaries
Grain boundaries hinder the flow of charge carriers either by adversely affecting
Their movement or by capturing them. If light-generated charge carriers
encounter a grain boundary before separation by the junction potential, then
recombination of electrons and holes can result. If they are held back from free
movement on their way to the electrical contacts then it is a resistance issue.
Impurities may build up at grain boundaries as well sometimes short circuiting
the cell. Grain boundaries can also provide a pathway for light generated carriers
that have been separated by the junction to move back across it, decreasing the
voltage.
Grain boundaries can contain numerous recombination centers, which are dangling
bonds from either broken or distorted quality of the Si lattice or impurities. Dangling
bonds have the same charge a s the majority carrier: in n-type Si they are negatively
charged and in p-type, positively. But an electron in a dangling bond is less stable
than one on normal Si site. So, such captured electrons naturally fall into a morestable, lower energy site recombining with holes.
Fabrication
Must be produced in relatively uncontaminated way with wide (cm-sized) columnar
Grains spanning the cell from back to front. Formed in directional solidification process.
If not cooled in this way, from one direction but from all sides, then randomly oriented
and oddly-shaped boundaries would result.
Grains can have atom-to-atom structural defects called dislocations which behave as
Grain boundaries on a smaller scale. Another problem is SiC inclusions that result
From heating up carbon impurities during fabrication.
Casting
A vat of molten Si is allowed to solidify, and impurity segregation is good because
Contaminants tend to remain n the liquid during solidification and are not
Incorporated into the crystal. Grains can be large. Some dislocations and SiC inclusions
result. Also, cast Si must be sawed, resulting in a 50% material loss.
Ribbon Growth
A pair of elongated silicon crystallites, dendrites are extended into the Si melt. Then
as the dendrites are raised a web forms between them, making an almost perfect nearly
single crystal Si ribbon. In a seeded version a seed crystal is oriented to cause vertical
grain boundaries of highly controlled on nondestructive character to propagate down
ward from the seed into the web. This can result in large grains about 1cm wide and
cells with up to 13% efficiency.
Silicon on Ceramic SOC
Dip coating involves slowly withdrawing a piece of carbon-coated ceramic from a pool
of molten silicon resulting in the deposition of a polycrystalline layer of Si. The ceramic
form must be designed into the cell as the Si cannot be removed from it.
Silicon on Inexpensive Substrates
Silicon vapor deposition on cheap, abundant, easily handled materials such as steel
or glass. However impurities from the substrate (or from process equipment likely
enter the Si. The best efficiencies are about 3.6%.
Amorphous Silicon
The structure in amorphous Si is very disordered. Until recently (1974) amorphous Si
was thought to be totally inappropriate. However, by controlling the conditions under
which it is made and by modifying its composition, it can be used in solar cells In fact
even though it is not well understood, it is a leading possibility for future solar cell
production.
In amorphous Si the tetrahedral units do not line up with each other. They are randomly
rotated with respect to each other. The tetrahedral relationship of neighboring atoms is
almost preserved, but the long range order is not. The small random rotation destroys
this making the amorphous Si dense with chains or clusters of linked tetrahedral groups
ending in broken uncompleted dangling bonds. Amorphous Si absorbs light more
strongly for a given thickness than crystalline Si.
A main barrier to amorphous Si being an excellent photovoltaic material is the presence
of the dangling bonds. They can result from disorder of the Si atoms or from
non-silicon impurity atoms which impede the motion of the charge carriers. However,
if the amorphous Si is deposited so that it contains hydrogen in 5-10% concentration),
the dangling bonds are removed and the efficiency is raised.
When an electron is promoted to a conduction band in crystalline Si, it can travel
great distances, but in amorphous Si, there are localized states that result at the
lowest energies in the conduction band that restrict the motion of the electrons that
occupy them. Light is so restricted that in amorphous Si, the carriers do not move
far from the point of generation. This means that it is likely that the light
generated electrons and holes recombine rather than remaining mobile and
contributing to conductivity.
Amorphous Si Solar Cell
Since the electrons and holes cannot move far, the conventional pn-junction solar cell
design does not work.
Doping amorphous Si p-type or n-type causes further structural distortion and reduces the
already poor minority charge carrier mobility. Although a junction filed would exist,
photogenerated carriers would simply recombine before they can be accelerated and
separated by the field
Its bandgap energy is 1.65eV, which is greater than the bandgap of crystalline Si. A
cell’s output voltage is directly related to the size of its bandgap, so cells made of
amorphous silicon have higher output voltages. This compensates for the fact that lower
energy photons are not absorbed by amorphous Si.
Amorphous silicon absorbs light about 40 times more strongly than crystalline Si. So to
absorb the same amount of light, one-fortieth of the thickness is required. This strong
absorption is the key to amorphous Si. Since carriers in amorphous Si have low mobility
and recombine rapidly, the only way they can be collected during illumination is for the
time needed for their collection to be short. This requires a very thin cell.
Workable hydrogenated amorphous silicon cells are designed to have an ultrathin 0.008
micrometers highly doped p-doped top top layer, a thicker (0.5-1 micrometer) undoped
(intrinsic) middle layer, and a very thin (0.02 micrometer) bottom n-doped layer. The top
layer is so thin and relatively transparent that most incident sunlight passes right through
it and then generates electron-hole pairs in the undoped amorphous silocon. The top ptype and bottom n-type induce an electric field across the entire intrinsic region similarly
to the induced junction potential in a regular crystalline pn device.
A conventional crystalline silicon pn device has a thickness of about 100 micrometers.
However, the extent of the junction field is about 1 micron thick, which is about the same
as the electric field which is induced across the entire intrinsic region in the amorphous Si
solar cells.
See figure
This design compensates for the very low charge mobility in the tip and bottom doped
layers as the light induced charge carriers are not induced within them. The p-i-n design
also makes it possible for the light-generated charge carriers to be separated within the
field of the sandwiched intrinsic layer.
Even after dangling bonds and impurities have been reduced by hydrogenation, intrinsic
amorphous silicon still has a very low intrinsic charge mobility. Photogenerated charge
carriers lose their momentum so quickly and stay so near their origination point that they
would likely return to their bound states. But the electric field induced across the
intrinsic region gives the electrons and holes just enough extra motion to keep them
going and out of trapping defects, keeping them as free charge carriers.
The electric field acts in opposite directions on the free electrons and holes, separating
them, sending the electrons toward the n-doped bottom layer and the holes toward the pdoped top layer. Even though the free carrire mobility is still low, the intrinsic layer is so
thin and the field with it is so strong that charges can be successfully separated and a
photocurrent produced. Efficiencies of 6%, voltages of 0.8 V (higher than crystalline
silicon’s) and currents greater than 10 mA/cm2 . have been attained with the simplest
kinds of p-i-n devices. Efficiences for more complex structures have attained 10% and
higher ones are expected.
Fabrication Techniques
Making solar cells from amorphous silicon needs to be closely controlled, but it is a thin
film material, and little of it is needed, so even complex processing can produce a cheap
solar cell.
In most processes, a suitable gaseous form of silicon-hydrogen alloy is decomposed and
deposited as a thin film of amorphous Si onto a clean substrate. H2 isincluded in the
deposition gas so the film is deposited as a Si:H alloy material. This would have fewer
structural imperfections.
The addition of a p-dopant like boran or an n-dopant like phosphorous can easily be done
in the same process with the addition of diborane or phosphine gas.
The substrate on which the Si is deposited must be kept between 200 and 3500 C. If the
temp is hotter then the film becomes microcrystalline with many tiny, randomly oriented
crystal grains. At temperatures cooler than 200, the hydrogen and silicon do not form a
simple structure free of electronic defects. Also at temps above 350, hydrogen is driven
from the material, rejuvenating the dangling bonds.
There are many methods for depositing thin films of amorphous Si. Three are:
a) Glow discharge
b) Sputtering
c) Chemical Vapor Deposition
Glow Discharge
This technique has been used to make the most efficient amorphous silicon cells. There
are two major types of glow discharge: direct current and alternating current (rf
discharge). Direct current glow discharge silcon cells are less efficient than those made
by AC, radiofrequency glow discharge methods.
In rf discharge a stream of silane and hydrogen gas is passed between a pair of electrodes
with power alternating at 13.56 MHz. This rf induces an oscillation of energetic
electrons between the electrodes, and the electrons collide with the silane, breaking it
apart into molecular fragments which deposit on a substrate placed on top of one of the
electrodes at a rate of about 10-50nm/min. this produces a thin film of hydrogenated
amorphous Si. Doping can be don by adding diborane or phosphine gas. This process
does not use much energy and is potentially able to produce large-area cells
See Figure
Sputtering
This is a process where a focused stream of energetic particles such as argon ions hits a
silicon target, driving off silicon atoms. The Si atoms are ejected from the target in a
beam that reaches an appropriate substrate. Hydrogen or dopant gases can be passed over
the substrate to react with the gaseous silicon, forming hydrogenated/doped amorphous
Si. Hydrogenation can also be done by adding H2 to the argon sputtering gas striking the
target.
.4 p 95 SERI
Chemical Vapor Deposition (CVD)
In CVD gases such as disilane thermally decompose to form a solid on an appropriate
substrate. Both polycrystalline and amorphous Si can be deposited this way. The gas
reactions are potentially highly controllable. As yet, polySi or amorphous silicon cells
made via CVD have lower efficiency than those made by rf discharge.
Fig.
n-i-p cell
It is also possible to reverse the order of the layers in an amorphous Si cell.. The n-doped
layer can be placed on top, and the p-type layer on the bottom. Much work has been
done on this. Undoped amorphous Si is slightly n-ype in its electrical behavior. This is
disadvantageous in terms of the n-i-p design, as there is a less abrupt interface at the front
of the cell. This lowers the junction’s voltage because more holes leak backward into the
n layer, where they recombine with electrons. To compensate, the intrinsic layer is often
lightly p-doped to make the i layer more nearly intrinsic or even slightly p-type.
An advantage of the n-i-p design is that an n-doped amorphous silicon layer absorbs less
light than a p-doped layer. This is because n-type amorphous Si has a slightly wider
bandgap and is thus transparent to a greater proportion of the spectrum. As a result, more
light reaches the intrinsic region in the n-i-p design.
Stacked Cell
There are two types of amorphous Si and Si alloy stacked cels:
a) multilayered cells made of the same material
b) multilayered cells made with different materials
This is one of the most important recent advances in amorphous Si research.
In a simple stacked cells made of the same material, the cells act like batteries joined in
series: the individual voltages add. So if each has a 0.5V output, then the combined
output would be 1.0V, and without much change in the total power. So the current must
be about half that of single cell since the voltage is twice.
For effective stacked cell design, light must be absorbed and collected equally in both the
top and bottom cells for equal current to be generated by each. The top cell must be thin
enough to let half the light pass right through it, while the bottom must be thick enough to
absorb the passed light.
The advantages of stacking two similar amorphous Si cells on top of each other are:
a) The cell voltages add, and higher voltage is often of practical use in actual devices.
b) Carrier collection within each layer is facilitated because the layers are thinner than ina
normal cell (to absorb only half the light) so there are fewer electron-hole pairs lost by
recombintation.
The stacked cell design works only for thin film solar cells. Since the depositions needed
to make thin films don’t use much energy. Two ways to exploit the stacked cell
geometry are being pursued:
a) Developing multilayered amorphous Si cells.
b) Developing multilayered combinations of amorphous Si with other thin films.
Up to five layers of similar amorphous Si cells have been joined into stacked cells. Layer
thickness is controlled such that light is absorbed and collected in each cell equally.
Lower current results, but the power loss is less and also thin conductive oxides, rather
than metal grids, can be used.
The most sophisticated and promising stacked cell design is a layered combination of
several different thin film materials. If the top cell has a band gap fo 1.65 eV and the
lower cell has an absorbance of 1.4 eV then light with energy above 1.65 eV is absorbed
in the top cell, light between 1.4 and 1.65eV would pass right through the top cell and
would be absorbed in the lower bandgap cell. By using a part of the sun’s spectrum that
would otherwise be lost
Cadmium Telluride Solar Cells
Until recently, silicon was used for almost all photovoltaic applications, with good
success but at relatively high cost. Only two additional semiconductors have shown real
promise for replacing silicon as the primary material for photovoltaic power generation:
CdTe and Cu(InGa)S2. Other materials including Se, Cu2S, Cu2O, InP, CdSe, and Zn3P2
have been investigated, but due to disappointing results or high cost they have fallen by
the wayside. Also GaAs is being developed for special applications where very high
efficiency is required.
CdTe is thought to be an optimum material for use in solar cells. It is produced as a thin
film, as it has a high absorption coefficient. Its action is similar to our discussion of
crystalline silicon in that there is a p-n junction formed with a junction potential at the
interface. The absorbed photons create electron-hole pairs and the potential energy of the
excited minority carriers is converted into electrical energy as it is swept through the
junction potential. As in Si, the separation of the carrier from its opposite leads to a
photoinduced voltage, which can drive an electron through an external cicuit.
This type of solar cell then requires high minority carrier lifetimes and mobilities which
can be only obtained by good crystalline properties, chemical purity, suitable doping and
low resistance. In this type of thin-film solar cell, the diode is created by two materials
know as the window layer and the absorber and it is usually a heterojunction p-n solar
cell. CdTe is the absorber.
CdTe can be used in p-n homojunction cells, but there has been very limited success here
due to the strong light absorption, CdTe is a direct bandgap semiconductor, coupled with
a high surface recombination rate limiting the minority carrier lifetime. Also, it is
difficult to manufacture CdTe p-n junctions in thin film form as the interdiffusion
severely distorts the junction.
Heterojunction p-n cells are the most promising. The first was n-CdTe/p-CuTe2 with
about 7% efficiency, but diffusion of Cu stopped further development. Next was nCdS/p-CdTe heterojunction. This is effective as Cd Te has a bandgap energy of 1.45eV
and an absorption coefficient of >105 cm- 1 for visible light, so that the absorber layer
needs to be only a few m thick to absorb>90% of the photons at energies>1.45eV.
Current densitite of 27mA/cm2 and open circuit voltages of 880mV with AM1.5
efficiencies of 18.5% can be expected for cells made from CdTe.
How can the material be both n-type and p-type. In the high temperature phase of CdTe,
a slight nonstoichiometry is present in the form of a slight Cd deficiency. This leads to ptype material. No excessive care is necessary for preparing p-type CdTe films as long as
the substrate temperature is sufficiently high. Since the bond energies are so high,
5.75eV, solar photons do not normally lead to dissociation and destabilization.
There is a significant mismatch of the lattice parameters between CdS and CdTe. This
leads to some problems with forming the junction between the two materials. Post
deposition treatments can partially alleviate this problem
The n-CdS/p-CdTe heterojunction solar cell must be illuminated through the CdS
window, so that the light is absorbed in the CdTe close to the junctions. The preferred
fabrication procedure is to deposit CdS onto a transparent tin(IV) oxide coated glass
substrate. Next the CdTe is deposited onto the CdS, and finally a low resistance contact
is made to the CdTe followed by a back electrode, which does not have to transmit light.
Fig
The CdS will absorb part of the light to be converted in the CdTe so it should be a thin as
feasible. CdS grows natively n-type without additional foreign doping. Data indicate
that when the CdS layer is decreased, only half of the short-circuit current due to light
below 515nm can be realized before the fill factor starts to fall off due to weak areas.
The optimum CdS thickness is in the 50-80nm range, but production tends to keep it a bit
thicker. Physical vapor deposition (sublimation/condensation) and chemical spraying are
the main ways to make CdS films. An alternative is chemical bath deposition from a
metastable aqueous solution of Cd(C2H3O2)2, thiourea, ammonium hydroxide, and
ammonium acetate at temps. of about 70o C can deposit CdS on TCO glass.
The CdTe deposition process must utilize the advantages of the material: the native ptype, good crystallinity, and high minority carrier mobility. About ten procedures have
been developed to do this. Among them are:
Sublimation-condensation
Chemical Spraying
Galvanic Deposition
Screen Printing
Chemical Vapor Deposition
Atomic Layer Epitaxy
Sputtering