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ABHINANDAN H. PATIL +919886406214 | [email protected] https://in.linkedin.com/in/abhinandan-h-patil-4850322b PROFILE • • • Pursuing Ph. D from BITS Pilani, Goa from Jan 2014. Planning to convert full time Ph.D program into part time and take up appropriate job with clear long term roadmap. Associated with computer science and software engineering for around 15 years. 10 years of software industry experience, mainly in wireless telecom sector. EDUCATION • • • Doctor of Philosophy, computer science, expected 12/2017 BITS Pilani, Goa, India. Thesis: Design and Implementation of Combinatorial Test Suites for Operating Systems used for Internet of Things. Guide: Prof. Neena Goveas Co-Guide:Prof. Krishnan Rangarajan. Master of Technology, computer science and engineering, 08/2013. VTU PG Block, Belgaum, Karnataka, India. Thesis: Enhancement of CodeCover Tool for Java Projects. CGPA: 7.85/10. Bachelor of Engineering, electronics and communications, 08/1999. KUD, Dharwad, Karnataka, India. Percentage: 75.8%, First Class with Distinction. EXPERIENCE Infosys Technology Architect • Worked as Technology Architect. Bangalore, Karnataka, India 01/2011 – 07/2011 Motorola India Private Ltd Bangalore/Chicago/Phoenix Lead Software Engineer 03/2001 – 07/2009 • Development and maintenance of Java Network Simulator (JNS) Tool for Mobility Manager (MM) of 3G1x network. Lead the execution of multiple features. Design, Estimation and Coding. Two long stints at Chicago and Phoenix for supporting MM features. • Reverse engineering of Group Call Processing Task (GCPT) for iDEN (Proprietary network) and porting to SDL using Telelogic tools. Porting and maintenance activities. • UMTS UE development which was used as simulator tool to test the Motorola network. Development and Testing of UE simulator. Kshema Technologies (Mphasis now) Bangalore, Karnataka, India Associate Systems Engineer 11/1999 – 03/2001 • Development, Maintenance and Testing of computer telephony product for Dialogic Corporation USA. INDUSTRY SKILL SET Programming languages: C, C++, VC++,Core-Java. System programming: IPC, POSIX, Shared memory, Semaphores, Sockets, GNU utilities. Scripting: Shell, Perl, Awk, Sed. Operating Systems: Windows, Ubuntu, Kubuntu, RHEL, Unix flavors. IDEs: Dev C++, Eclipse, Visual studio. Process related: Version Control, Code review, ClearQuest, Coding Standards and Maintainable Code. Java: JVM, Socket programming, Ant, Maven, Junit, Clover, CodeCover. Testing: Whitebox testing, Test Cases, Development of Automation Tools. Software Development Methodologies: Object Oriented. PUBLICATION DETAILS Regression Test Suite Prioritization using Residual Test Coverage Algorithm and Statistical Techniques in IJEME, MECS press, Sept 2016. Regression Test Suite Execution Time Analysis using Statistical Techniques in IJEME, MECS press, May 2016. Test Suite Design Methodology using Combinatorial Approach for Internet of Things Operating Systems in Journal of Software Engineering and Application July 2015. Integrated Test Environment for Combinatorial Testing in IEEE Conference (IACC), Jun 2015. Re-architecture of Contiki and Cooja Regression Test Suites using Combinatorial Testing Approach in ACM SIGSOFT SEN Mar 2015 Issue. CodeCover : Enhancement of CodeCover in ACM SIGSOFT SEN Jan 2014 Issue. Enhancement of CodeCover: A Code Coverage tool for Java projects. ERCICA, Elsevier publications. ISBN:9789351071020 DISTINCTIONS UGC-National Eligibility Test Qualified in Computer Science and Application in open category. Good PGCET Rank (2011)/Good CET Rank(1995). Several Bravo Award recipient (Bravo is Award for Individual Merit in MIEL) during stay at Motorola. PERSONAL DETAILS DOB: 31st Aug 1977. Marital status: Married and have two kids. On site exposure: 12.5 months stay at USA. Holds valid Indian passport up to 2023.