Download Junction Field Effect Transistor (JFET)

Digital and Interfacing
Systems
Ceng 306.
Introduction to JFETs
Supplement
Prepared by Mike Crompton (Rev 28 May 2002)
Introduction to Junction Field Effect Transistors
A different type of transistor from the NPN and PNP Bi-Polar junction transistors
discussed previously is the Junction Field Effect Transistor or JFET. It is a three terminal
device but only has two pieces of doped silicon, one P-Type and one N-Type, as opposed
to three in the regular transistor. There are two types of common JFET, N-channel and
P-channel. Both operate in a similar manner, differing only in the polarity of bias
voltages and direction of current flow. The N-channel will be used for this introduction.
The general symbol for the N-channel JFET is shown in Fig.1 below right. The three
terminals are labeled D for Drain, G for Gate and S for Source. These can be loosely
compared to the collector, base and emitter of an NPN transistor.
The N-channel JFET is constructed by
embedding a small piece of P-Type silicon (the
Gate) into a block of N-Type silicon. One end
of the N-Type block is the Source and the other
end the Drain. Beneath the P-Type Gate is a
small depletion zone (Field) that creates a
“channel” leading from Source to Drain. See
Fig.2 at right.
If a positive voltage was connected to the
Drain, 0V applied to the Gate and the Source
was connected to ground, electrons could flow
freely from the Source, through the Channel
under the Field and exit at the Drain. The
number of electrons or amount of current flow
would basically be decided by the size of the
positive voltage on the Drain. If this voltage
were too great, a large depletion zone (or field)
would form between the Gate and Drain
‘pinching’ off any current flow out of the
Drain. Remember that reverse biasing a
junction increases the depletion zone, and with
the P-Type Gate at 0V and the N-Type Drain at
a large positive voltage, that junction is reverse
biased. Further increases in the positive voltage
will only increase the size of the depletion
zone and stop any current flow.
When the correct positive voltage is applied, a maximum amount of current will flow
from Source to Drain. If however we now apply a small negative voltage (say -2 V) to the
Gate, the Field will increase and extend further below the Gate region, reducing the size
of the channel and cutting down on the number of electrons able to pass. (Reduced
current flow). See Fig.3 above right.
2
A further increase of the negative voltage on the gate (say –4V) will produce a related
increase in the Field that almost completely blocks the Channel allowing only a few
electrons (very small amount of current) to pass. See Fig.4 above right.
Making the Gate –5V will increase the field to a size that will completely ‘pinch off’ the
Channel, blocking all current flow.
Therefore, it can be seen that changes in the Gate voltage between 0V and –5V alter the
size of the JUNCTION FIELD, the EFFECT of which is to vary the Source/Drain current
through the TRANSISTOR between saturation and cut-off .
Graph showing decrease in Source/Drain current with increased negative Gate voltage
Source/Drain Current Flow
Maximum I
(Saturation)
I = 0 (Cut-off)
-5V
Gate Voltage
-4V
-3V
-2V
-1V
0V
The JFET can be used as a switch, 0V on the Gate = saturation with maximum current
and can be regarded as a closed switch; or –5V on the gate = cut-off with no current flow
and regarded as an open switch.
When operated between cut-off and saturation, the JFET can be used as an amplifier.
With –2V on the base, a certain amount of current will flow and when that –2V is
changed up or down by small variations from a ‘signal’ source, the current flow through
the JFET will increase or decrease. Adding a relatively large resistance in the Drain
circuit will produce relatively large changes in voltage as the current varies. Therefore a
3
small voltage change at the Gate produces a large change across the Drain resistor. i.e.
amplification.
The main advantage of a JFET over a bi-polar junction transistor is the high input
impedance. Since the Source/Gate junction is reverse biased (ground on the N-Type
Source and a minus voltage on the P-Type Gate) the depletion zone between them
(resistance) is much greater than the regular transistor which has it’s Emitter/Base
junction forward biased and results in a small depletion zone with little resistance.
A much greater increase in input impedance was realized when the Gate was actually
insulated from the Source/Drain block by an extremely thin layer of metal oxide. This
device was then given the rather long name of ‘Metal Oxide Semi-conductor Field Effect
Transistor’. You may have heard it referred to by it’s acronym MOSFET. The big
problem with this device was the ease with which static electricity could literally punch a
hole through that very, very thin oxide layer thereby destroying the device. Modern
MOSFETs have some degree of built in protection against static, but anti-static
precautions are strongly advised.
When two carefully matched different types of MOSFET (like NPN and PNP transistors,
or N-Channel and P-Channel JFETs) are used in complimentary pairs, they are referred to
as ‘Complimentary Metal Oxide Semi-conductor Field Effect Transistors’. This is
abbreviated to CMOS. These devices are used to store the ‘Set Up’ information in the
special CMOS ROM in most computers. Because of the incredibly small amounts of
power they use there is very little drain on any battery used to maintain them in an active
state, making them ideal for the semi permanent storage of small amounts of data.
4