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Presented By
Chandra Shekar Reddy.Y
11/5/2008
Computer Architecture & Design
1
Introduction
I/O systems generally place greater emphasis on
dependability & cost.
I/O systems must also plan for expandability and
diversity of devices.
Performance plays a small role for I/O systems.
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Computer Architecture & Design
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Diversity of I/O systems
Three characteristics are useful in organizing the wide
variety of I/O systems.
 Behavior : Input (read once), Output (write only) or
storage
 Partner : Either Human or a machine at the end of the
I/O device.
 Data rate : The peak rate at which the data can be
transferred between the i/o devices and main
memeory or processor.
Ex : A key board, i/p device used by a human with data
rate about 10 bytes per second.
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A typical collection of I/O devices
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Computer Architecture & Design
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Typical I/O devices
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Computer Architecture & Design
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Interfacing I/O devices to processor
memory and operating systems
Giving Commands to i/o devices
Basically two techniques are used to address the devices.
1.Memory-mapped I/O : An i/o scheme in which
portions of address space are assigned to i/o devices.
Ex : Simple printer has 2 i/o device registers.
a. Status register : It contains done bit and error bit.
b. Data register : The data to be printed is put into
this register.
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Computer Architecture & Design
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2. Alternative method is to use dedicated i/o instructions in
the processor.
 These specify both the device no. and command word.
 The processor communicates via a set of wires
normally included as a part of i/o bus.
 Commands can be transmitted over data lines in the
bus.
Ex : Intel IA32, IBM 370.
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Communicating with the processor.
 Polling : The process of periodically checking the status of
the i/o devices to determine the need to service the devices.
Disadvantage : Waste of processor time.
 Interrupt Driven i/o Systems : It employs i/o interrupts to
indicate the processor that an i/o device needs attention.
A system can use either vector interrupts or an exception
cause register.
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Computer Architecture & Design
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 The status register determines who can interrupt the computer.
 A more refined blocking of interrupts is available in the
interrupt mask field.
 There is a bit in the mask corresponding each bit in the pending
interrupt field of cause register.
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Transferring the data between a
device and memory
Polling and i/o interrupts are the basic methods for
implementing data transfer.
Direct Memory Access : A mechanism that provides a
driver controller the ability to transfer the data directly
to or from memory with out involving the processor.
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Conclusion
I/O systems are evaluated on several different
characteristics : Dependability ,variety of i/o devices
supported , cost .
These goals lead to widely varying schemes for
interfacing i/o devices.
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Computer Architecture & Design
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References
Computer Organization & Design – David Patterson John L. Hennessy.
http://www.pcguide.com
http://en.wikipedia.org/wiki
http://www.amigau.com/aig
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