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Lecture 1
What is computer architecture?
 It is the specification of what a computer should do and how it should do it, at a
design level, without the implementation details.
 It is possible to specify an architecture without going as far as the details of an
implementation.
 There may be several different implementations of the same architecture. There are
different levels of architecture, for instance System Architecture, Instruction Set
Architecture, and Microarchitecture.
Instruction Set Architecture
 Refers to the architecture at a level seen by an assembly language programmer: the
registers, operations and data operand addressing modes as well as the set of
instructions available for manipulating data, specifying program flow and controlling
CPU activities.
Microarchitecture
 The detail of how data and control signals flow in order to implement the ISA. It
includes devices, registers and operations not seen by a programmer at the ISA level.
System Architecture
 The architectural design of interactions between the CPU and other entities
necessary to form a complete computing system, such as memory, buses, I/O units
together with the operation of those entities.
What sort of architectures are there?
 Sequential architectures: Stored program architecture (Von Neumann)
 Parallel architectures, e.g. Dataflow
Concentrate on stored program model.
Addressing Modes – Specify the whereabouts of instruction operands.
CISC [Complex Instruction Set Computer] – the design approach to stored program
computers.
RISC [Reduced Instruction Set Computer] – limits memory access to Load and Store
operations and performs all other operations from register to register.
Lecture 2
The Instruction Set
Instruction Set Architecture (ISA) Level
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The purpose of a processor is to operate on data: get data from memory, process it and do
something with the results.
The fundamental model is the Stored-Program Computer. A list of instructions is stored in
memory. The processor, or Central Processing Unit (CPU), fetches an instruction, executes it
and continues to the "next" instruction. In most cases, this pattern is repeated to infinity.
The repeated pattern is known as the Instruction Cycle.
Each instruction either processes data or manages the flow of instructions.
To process the data there is an Arithmetic and Logic Unit (ALU). The ALU determines what
data types are recognized directly. The ALU determines what can be done directly with data
and what data types can be operated on.
At ISA level the ALU is visible through the instructions that are provided.
Since many of the operations carried out by the ALU naturally have two operands, there are
two inputs to the ALU. Data needs to be held temporarily at these inputs, and this is done by
holding the data in special storage units called registers. Many traditional architectures
recognize one of these input registers as the "principal" data register and name it the
Accumulator. The number of bits in each of these registers is determined by the number of
bits that can be processed in parallel by the ALU. This number of bits is known as the CPU
word length and is commonly some power of 2, such as 16, 32 or 64.
As well as holding operands in registers, many architectures support a range of operand
addressing modes that generally involve some degree of indirection. Indirection occurs
when an operand is identified by placing its memory address in a register or another
memory location and identifying the location of the operand address within the instruction
Instructions are fetched from a memory unit known as main memory or primary storage.
The memory address of the next instruction is held in a special CPU register, known
generically as the Program Counter (PC). The flow of instructions is managed by
manipulating the contents of the PC using operations such as Branch (Jump), Call and
Return.
There are several ways to implement subroutine call and return, but re-entrancy is generally
achieved by using a stack, which is generally off-chip in main memory. The stack mechanism
is supported by a Stack Pointer (SP) register within the CPU, as well as Push and Pop
operations.
Some architectures recognize that a CPU will have to communicate with its environment.
The designers consider how to accomplish this by thinking of how to identify input and
output devices. There are two main ways of dealing with I/O: memory-mapped I/O or the
use of a separate I/O address space.
Finally, there is often a need to control the operation of the CPU. This may occur if one
wishes to halt the instruction cycle, for instance, or to set up conditions that govern the
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operation of particular instructions. Thus, most ISA-level instruction sets include a Halt
instruction, a No Operation instruction and instructions to set or clear particular condition
creating bits known as flags.
To summarise, our Instruction Set Architecture relates to a Central Processing Unit that
comprises an Arithmetic and Logic Unit, an Accumulator register, additional general purpose
registers, operand addressing registers, a Program Counter register, and a Stack Pointer
register. The CPU executes instructions that it fetches from a main memory unit. This
memory unit contains a large number of locations, each identified by a unique memory
address. The number of bits in a memory address is explicitly recognized by the CPU in the
width of the PC, SP and other internal registers and in the operand address generation
mechanism.
Instructions available at ISA level can be classed into the following main groups: Data
Movement, Arithmetic and Logic, Flow of Control (Branch, Call and Return), Input/output
and Machine Control.
There are other instruction types that have not yet been mentioned here, but at the
moment we are just establishing a base from which to proceed with our consideration of
the ISA level.
Lecture 3
The Instruction Set
The 8085 Processor
The 8085 processor is an 8-bit CPU. It has an 8-bit accumulator (ACC or A) with a 16-bit
PC. Thus the maximum addressable main memory size is 64K. Other registers are:
BC
DE
HL
SP
Flags
16-bit register B or 8-bit registers B and C
16-bit register D or 8-bit registers D and E
16-bit register H or 8-bit registers H and L
16-bit address register
8-bit flags register
General purpose
General purpose
Data pointer
Stack pointer
Contains 5 condition flags
Instructions are variable-length and can occupy 1, 2 or 3 bytes.
Operand addressing modes available are implied, register, immediate, direct and register
indirect (using the BC, DE and HL register pairs as 16-bit pointers to memory).
Conditions are indicated by setting 1-bit flags to show the result of an ALU operation. The
flags can be tested using conditional jump, call or return instructions. There are 5 condition
flags: Sign (s), Zero (z), Auxiliary Carry (ac), Parity (P) and Carry (cy). These flags are padded
with 3 extra bits to form an 8-bit Flags register, so that s, z, ac, p and cy occupy bits 7, 6, 4, 2
and 0 of the Flags register. The Flags register is not accessible as an entity in its own right,
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but forms the low byte of the 16-bit Program Status Word (PSW). The high byte of the PSW
is obtained from the A register. The PSW is accessible only via PUSH and POP stack
operations.
The Sign flag is set when the result of an ALU operation is negative, according to the Two’s
Complement number representation. The Zero flag is set when the result of an operation is
zero. The Auxiliary Carry flag is not explicitly accessible by conditional test instructions, but
is used internally in the Binary Coded Decimal (BCD) correction instruction, Decimal Adjust
Accumulator (DAA). The Parity flag is set if the A register contains an even number of 1 bits,
a condition known as even parity. The Carry flag is set when a carry out of bit 7 occurs as a
result of an arithmetic operation.
Sign Flag – Set when the result of an ALU operation is negative.
Zero Flag – Set when the result of an ALU operation is zero.
Auxiliary Carry Flag – Used internally in the Binary Coded Decimal (BCD) correction
instruction and the Decimal Adjust Accumulator (DAA).
Parity Flag – Set if the A register contains an even number of 1 bits.
Carry Flag – Set when a carry out of bit 7 occurs as a result of an arithmetic operation.
Memory is byte-organised, with the Little-Endian convention employed for the storage of
multiple-byte quantities.
Stack is located off-chip, in main memory and is accessed through the SP. The stack expands
into memory locations having lower addresses than those already occupied. The SP is
decremented before a byte is saved on the stack. Only 16-bit quantities are moved to and
from the stack.
Lecture 4
The Instruction Set - Supporting Principles
In this lecture, we take a look at some of the principles underlying the 8085 architecture.
In particular, this is our first opportunity to look at operand addressing modes and basic
integer arithmetic.
Operand Addressing Modes
There are many ways in which a processor can access its operands. The 8085 processor
introduces five of these. Operand addressing modes can be used on their own or in
combination with each other.
Implied
With this addressing mode, the location of the operand is implied by the instruction. For
instance, CMA (Complement Bits of the Accumulator) operates on the A register. Other
examples in the 8085 instruction set include XTHL and XCHG. The PUSH and POP
instructions imply access to the stack through the SP.
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Register
If there are several registers in the CPU, some bits of the instruction must be allocated to
distinguishing between them. Registers that are given names in the datasheet description of
an ISA level are identified by a bit pattern in machine code. This bit pattern is called a
register address. Since there are generally far fewer registers than memory locations, the
register address is much shorter than a memory address, typically 3 to 6 bits. The register
address can often be combined with the opcode in a single byte.
Example
XRA B
; A <– A XOR B
Immediate
This is where the operand data is included immediately following the opcode in the
instruction. In the case of the 8085, the operand will consist of either 1 or 2 bytes, making
the overall instruction length equal to at least 2 bytes. This addressing mode is useful for
loading constants, initialising variables and initialising pointers.
Example
LXI H, 3020H
; HL <– 3020 (hexadecimal)
Direct
Here, the instruction contains a memory address, usually following the opcode and any
register specified. The operand is contained in the memory location(s) corresponding to the
address given in the instruction. The overall instruction is at least 3 bytes long.
Example
LDA 3020H
; A <– m<3020H>
Register Indirect
The instruction operand is in memory. The address of the memory location containing the
operand is in a register. The register is addressed in the instruction.
Example
LDA 3020H
; A <– m<3020H>
Arithmetic
The 8085 deals only with integer arithmetic.
Number bases
Three number bases are of interest: Binary, Octal and Hexadecimal. We look briefly at
conversions among them and between each of them and decimal.
Binary
Base-two, or binary, contains the digits 0 and 1.
Decimal -> Binary
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To convert a decimal number to binary, divide repeatedly by 2 until a quotient of zero is
produced, keeping track of the remainders and the order in which they occur. Then arrange
the remainders in reverse order of production, so that the last remainder becomes the most
significant binary digit (bit) and the first remainder becomes the least significant bit.
Example
Convert Decimal 79 to Binary:
79/2 = 39 Remainder 1
39/2 = 19 Remainder 1
19/2 = 9 Remainder 1
9/2 = 4 Remainder 1
4/2 = 2 Remainder 0
2/2 = 1 Remainder 0
1/2 = 0 Remainder 1
Thus 79D = 1001111B
Least Significant Bit (LSB)
Most Significant Bit (MSB)
Binary -> Decimal
To convert a binary number to decimal, note that every bit position has a weighting. If we
number the bit positions from the right, labelling the rightmost (least significant) bit position
as position zero, then the weighting of each position is 2 to the power of the bit position.
The value of each bit position is the digit in that position multiplied by the corresponding
weighting. The decimal value of the binary number is the sum of all the bit position values.
Example
Convert the Binary number 1001111B to Decimal:
1 * 2^0 = 1 * 1 = 1
1 * 2^1 = 1 * 2 = 2
1 * 2^2 = 1 * 4 = 4
1 * 2^3 = 1 * 8 = 8
0 * 2^4 = 0 * 16 = 0
0 * 2^5 = 0 * 32 = 0
1 * 2^6 = 1 * 64 = 64
Add 1 + 2 + 4 + 8 + 64 = 79
Thus 1001111B = 79D
Octal
Base-eight, or octal, contains the digits 0, 1, 2, 3, 4, 5, 6 and 7.
Decimal -> Octal
To convert a decimal number to octal, divide repeatedly by 8 until a quotient of zero is
produced, keeping track of the remainders and the order in which they occur. Then arrange
the remainders in reverse order of production, so that the last remainder becomes the most
significant octal digit and the first remainder becomes the least significant octal digit.
Example
Convert Decimal 119 to Octal:
119/8 = 14 Remainder 7
6
Least Significant Digit
14/8 = 1 Remainder 6
1/8 = 0 Remainder 1
Thus 119 D = 167Q
Most Significant Digit
Octal -> Decimal
To convert an octal number to decimal, note that every octal digit position has a weighting.
If we number the digit positions from the right, labeling the rightmost (least significant) digit
position as position zero, then the weighting of each position is 8 to the power of the digit
position. The value of each digit position is the digit in that position multiplied by the
corresponding weighting. The decimal value of the octal number is the sum of all the octal
digit position values.
Example
Convert the Octal number 167Q to Decimal:
7 * 8^0 = 7 * 1 = 7
6 * 8^1 = 6 * 8 = 48
1 * 8^2 = 1 * 64 = 64
Add 64 + 48 + 7 = 119
Thus 167Q = 119D
Hexadecimal
Base-sixteen, or hexadecimal, contains the digits 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, and F.
Decimal -> Hexadecimal
To convert a decimal number to hexadecimal, divide repeatedly by sixteen until a quotient
of zero is produced, keeping track of the remainders and the order in which they occur.
Then arrange the remainders in reverse order of production, so that the last remainder
becomes the most significant hexadecimal digit and the first remainder becomes the least
significant bit.
Example
Convert Decimal 1015 to Hexadecimal:
1015/16 = 63 Remainder 7
63/16 = 3 Remainder 15 = hex digit F
3/16 = 0 Remainder 3
Thus 1015 D = 3F7H
Least Significant Digit
Most Significant Digit
Hexadecimal -> Decimal
To convert a hexadecimal number to decimal, note that every bit position has a weighting.
If we number the hexadecimal digit positions from the right, labelling the rightmost (least
significant) digit position as position zero, then the weighting of each position is sixteen
(16D) to the power of the digit position. The value of each digit position is the digit in that
position multiplied by the corresponding weighting. The decimal value of the hexadecimal
number is the sum of all the digit position values.
Example
Convert the Hexadecimal number 3F7H to Decimal:
7
7 * 16^0 = 7 * 1 = 7
F * 16^1 = 15 * 16 = 240
3 * 16^2 = 3 * 256 = 768
Add 768 + 240 + 7 = 1015
Thus 3F7H = 1015D
One’s Complement
Representing a signed number with 1's complement is done by reversing all the bits values.
1 to 0 and 0 to 1. Let's look at an example in 4-bit arithmetic. How can we represent the
number -510 in 1's complement?
1. First, we write the positive value of the number in binary.
2.
Next, we reverse each bit of the number
0101 (+5)
1010 (-5)
Two’s Complement
Representing a signed number with 2's complement is done by adding 1 to the 1's
complement representation of the number. To illustrate, let's look at the same example we
used for 1's complement. How can we represent the number -510 in 2's complement using 4bits?
1. First, we write the positive value of the number in binary.
0101 (+5)
2. Next, we reverse each bit to get the 1's complement.
1010
3. Last, we add 1 to the number.
1011 (-5)
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Binary
Octal
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
0
1
2
3
4
5
6
7
10
11
12
13
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Decimal
Hexadecimal
0
1
2
3
4
5
6
7
8
9
10
11
12
0
1
2
3
4
5
6
7
8
9
A
B
C
1101
1110
1111
15
16
17
13
14
15
D
E
F
Base-2
Base-8
Base-10
Base-16
Lecture 5
Buses
The function of a bus is to carry data from one point to another. Rather than connecting
every possible pair of points with individual data paths, a bus runs past all the points and
each point is allowed either to put data on the bus or copy data from it at the appropriate
intersections.
Buses are used within the CPU to connect registers, the ALU and the external environment.
Buses are used outside the CPU to connect the CPU, Memory and Input-Output devices in a
single printed circuit board (PCB).
Buses are used outside computers to connect computers to external peripherals or to other
computers.
There are many types of bus, but the main divisions are Parallel buses and Serial buses.
In a parallel bus, there is one conductor for each data bit and several data bits may be
transmitted on the bus simultaneously. The length of the bus is limited by electrical and
timing considerations and is of the order of 1 metre.
In a serial bus, there is only one conductor and the data bits are transmitted one at a time.
The length of the bus is limited by electrical considerations but the limit is usually higher
than that of a parallel bus.
The bit is transmitted by an electrical signal. A material which is a good conductor of
electricity a conductor is needed to carry the signal. A copper wire could be used, for
instance.
The presence or absence of a bit is indicated by a voltage level on the copper wire.
Voltage is a measure of the difference in electrical potential between two points.
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Bypass Capacitors
Rapid switching in a digital circuit creates high-frequency signals that can be radiated from
and received by bus lines. These, in turn, can give rise to spurious voltages that augment the
difficulties caused by inductance and capacitance effects between data lines. Minimising
these unwanted signals (noise) is referred to as signal conditioning. Capacitors are often
connected between data lines and ground in order to nullify high-frequency noise. These
are called bypass capacitors.
Signal Conditioning – Minimises unwanted noise created by high-frequency signals.
Bypass Capacitors – Capacitors that are connected between data lines and ground in order
to nullify high-frequency noise.
Circuit Components
Resistors
Resistance is provided in circuits by resistors. The leads of a resistor can be axial or radial.
Traditionally, resistor values are colour coded. There are two systems: Body- Tip-Spot and
End-to-Centre. The systems only influence the order in which the values are read, not the
actual colour codes.
Inductors
When the current in an electric circuit changes, the circuit opposes the change. One of the
circuit properties that oppose the change is called inductance. As current flow in a
conductor increases, it gives rise to an increasing magnetic field around the conductor.
Capacitors
Just as inductors tend to oppose changes in current flow in electric circuits, there are also
elements that oppose changes in voltage. These elements are called capacitors.
Ohm's Law
The current that flows in an electric circuit is directly proportional to the emf (voltage)
applied and inversely proportional to the resistance of the circuit.
E = IR
I = E/R
R = E/I
In these equations, current is always expressed in Amps, emf in Volts and resistance in
Ohms.
Examples
1. A device is connected to the terminals of a battery. By measurement, the voltage
across the ends of the wire is 12V and the current flowing in the circuit is 3A. What is
the resistance of the device?
 Answer: R = E/I = 12/3 = 4 Ω
2. What is the voltage across a 25Ω resistor when a current of 200mA is flowing
through it?
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 Answer: E = IR = 25*0.2 = 5V
3. A voltage drop of 60V is measured across a resistance of 12kΩ. What current is
flowing?
 Answer: I = E/R = 60/12000 = 5mA
The Series Circuit
When resistors are connected in series, the total resistance equals the sum of the individual
resistances.
Rt = R1 + R2 + R3 + ... + Rn
The same current flows through every resistance.
Kirchoff's Second law
The sum of the voltage drops across series resistances in a closed circuit equals the total
voltage applied to the circuit.
Example
A closed circuit powered by a 12V battery consists of three resistors with values of
2Ω, 4Ω and 6Ω connected in series. What is the voltage drop across each resistor?
Consider what you know:
Rt = R1 + R2 + R3
It = I1 = I2 + I3
Vt = V1 + V2 + V3
So an equivalent circuit comprises a resistance of 12 ohms connected across a 12V source.
Thus the current flowing is I = E/R = 12/12 = 1A
The voltage drops across the individual resistors are given by
V1 = IR1 = 1*2 = 2V
V2 = IR2 = 1*4 = 4V
V3 = IR3 = 1*6 = 6V
It can be seen that the sum of the voltage drops equals the applied voltage.
Example
A circuit contains three resistors connected in series across a 100V source. The current flow
is 2A. Resistors R1 and R2 have known values of 5Ω and 10Ω respectively.
Calculate (i) the resistance of the entire circuit, (ii) the value of resistor R3 and (iii) the
voltage drop across each of the three resistors.
Step 1
Sketch the circuit. Fill in the known values and leave the unknown values blank.
Thus,
It = 2A
Vs = 100V
Rt = ?
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I1 = It = 2A
V1 = ?
R1 = 5 ohms
I2 = It = 2A
V2 = ?
R2 = 10 ohms
I3 = It = 2A
V3 = ?
R3 = ?
Step 2
It = 2A
Vs = 100V
Rt = ?
So Rt = Vs/It = 100/2 = 50 ohms
Rt = R1 + R2 + R3
50 = 5 + 10 + R3
R3 = 50 - 15 = 35 ohms
V1 = ItR1 = 2*5 = 10V
V2 = ItR2 = 2*10 = 20V
V3 = ItR3 = 2*35 = 70V
Potential Divider
A potential divider chain is a circuit designed to provide current at a reduced voltage.
Input voltage is divided between 2 resistors, R1 and R2. Output voltage is taken across R2.
Assume the input voltage is Vin, output voltage is Vout and a current I flows in the circuit.
Then the voltage drop across R1 is IR1, voltage drop across R2 is IR2 and total voltage across
the resistors is I(R1+R2).
So, Vin = I(R1+R2), Vout = IR2 and Vout/Vin = R2/(R1+R2) or Vout = VinR2/(R1+R2)
Kirchoff's First Law
The sum of all the currents flowing towards a junction always equals the sum of all the
currents flowing away from the junction.
To use Kirchoff's First Law on a circuit:
 Draw the circuit
 Show the current flow through every resistance in the circuit
 Determine which currents flow towards or away from every junction in the circuit
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 The value and direction of unknown currents can often be determined by applying
Kirchoff's First Law.
Example
R1, IN, A
R3, A, B
R2, A, C
R4, B, C
R6, B, D
R5, C, D
R7, D, OUT
I1 = ?
I2 = 7A, A->B
I3 = 3A, A->B
I4 = ?
I5 = 5A, C->D
I6 = ?, I7 = ?
Resistance in Parallel Circuits
Assume R1 and R2 are connected in parallel across a voltage source V from which a current I
is drawn.
From Kirchoff's First Law,
I = I1 + I2
Let Rt represent the joint resistance presented by R1 and R2 in parallel.
By Ohm's Law,
I = V/Rt
I1 = V/R1
I2 = V/R2
So V/Rt = V/R1 + V/R2
1/Rt = 1/R1 + 1/R2
This is often written as Rt = R1R2/(R1 + R2)
In general, 1/Rt = 1/R1 + 1/R2 + 1/R3 + ... + 1/Rn for any n resistors connected in parallel.
Note that the result of putting resistors in parallel is to create a total resistance that is lower
in value than any of the individual resistances.
Power
The rate at which work is done in an electrical circuit is called power. It corresponds to the
rate of energy dissipation due to resistance presented to current flowing in the circuit.
The unit of electric power is the Watt.
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One Watt is the rate at which work is being done in a circuit in which a current of one
ampere is flowing when an emf of one volt is applied.
The power consumed in a resistor is determined by the voltage measured across it
multiplied by the current flowing through it.
P = VI
Since V = IR, P = I2R
Since I = V/R, P = V2/R
Many devices have a wattage rating to indicate the rate of power dissipation they can
withstand. Thus, for instance, resistors of the same resistance are available in a range of
wattage ratings.
Inductive Reactance
Inductive reactance is the opposition offered by an inductor to current flow. It depends not
just on the inductance, but also on frequency.
Inductive reactance is given by XL = 2πfL
Here XL is in ohms, L in Henries, f in Hertz
In the case of pure inductance, current will lag voltage by 90 degrees or π/2 radians.
In general, the angle by which current lags voltage is called the phase angle, denoted by Φ.
Factors affecting capacitance
Capacitors consist of parallel plates separated by an insulating material that is referred to as
a dielectric.
 Increasing the plate area increases the capacitance.
 Increasing the distance between the plates decreases the capacitance.
 Changing the dielectric material changes the capacitance.
Capacitive Reactance
A capacitor allows current to flow in an AC circuit.
 Current flow is highest when the capacitor plates begin to charge and lowest as the
charge reaches its maximum.
 Switching the polarity of the voltage applied to the capacitor allows the highest value
of current to flow more frequently.
 Thus, the AC current flowing through a capacitor increases with the frequency of the
applied voltage.
Lecture 6
Semiconductors
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A semiconductor is a material that has an electrical resistance between that of a conductor and an
insulator. Semiconductor materials also contain 4 electrons in their outer electron shell (valence
shell).
The arrangement of atoms in the semiconductor is very important; semiconductors must have a
cubic crystal structure to function properly
P and N type Semiconductors
Two different types of semiconductor can be made by adding tiny amounts of impurities to the
semiconductor material in a process known a doping; one type of semiconductor is the P type which
is made by adding a small amount of boron.
The other type is the N type semiconductor which is doped with phosphorus (P) which is a group 15
elements that has 5 electrons it its outer shell, when added to the crystal structure it leave a free
electron, thus it is known as a donor impurity.
Doping – Adding tiny amounts of impurities to the semiconductor material.
P Type Semiconductor – Made by adding a small amount of boron.
N Type Semiconductor – Made by adding a small amount of phosphorus.
Donor Impurity – Occurs when an element is added to the crystal structure and has a free electron.
Lecture 7
The Instruction Set (continued)
The Intel 8086 Processor
The 8086 processor is a 16-bit CPU. It has a 16-bit accumulator (A register) with a 16-bit PC,
known now as the Instruction Pointer (IP).
One of the aims of the 8086 design was to maintain a level of backwards compatibility with
the 8085 so that old software could easily be adapted to run on the new processor.
A far back as its 8080 development system, Intel had had a way of regarding memory that
involved thinking about a program as being composed of four segments, each having a
different purpose. These segments were called the Code Segment, the Data Segment, the
Stack Segment and the Extra Segment.
As in the case of the 8085, conditions are indicated by setting 1-bit flags to show the result
of an ALU operation. In addition, there are control flags that can be set or reset in order to
control CPU operation. The condition flags can be tested using conditional jump, call or
return instructions. There are 6 condition flags: Overflow (OF), Sign (SF), Zero (ZF),
Auxiliary Carry (AF), Parity (PF) and Carry (CF). There are 3 control flags: Trap (T),
Interrupt (IF) and Direction (DF).
Instructions by Class
Data Movement Group
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MOV ra, rb
MOV memaddr, r
MOV r, memaddr
MOV r, data
MOV memaddr, data
XCHG ra, rb
XCHG memaddr, r
XCHG r, memaddr
XLAT
LEA r16, memaddr
LDS r16, memaddr
16
Move (Copy) contents of rb to ra
Move contents of r to memory
Move contents of memory to register
Move immediate data to register
Move immediate data to memory
Exchange contents of ra and rb
Exchange contents of mem & reg
Exchange contents of mem & reg
Translate AL from table
Load effective address
Load Segment Register
r[a] <– r[b]
m<memaddr> <– r
r <– m<memaddr>
r8 <– data
m<memaddr> <– data
ra <–> rb
m<memaddr> <–> r
r <–> m<memaddr>
AL <– m<BX + AL>
r16 <– offset(memaddr)