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COLLEGE OF COMPUTER SCIENCE AND ENGINEERING
INFORMATION AND COMPUTER SCIENCE DEPARTMENT
ICS-232 COMPUTER ORGANIZATION & ASSEMBLY LANGUAGE
TERM 022 (Spring 2003)
INSTRUCTOR: Said Abdallah Muhammad
Office: 22/248-2
Tel: 2081
e-mail: [email protected]
URL: http://www.ccse.kfupm.edu.sa/~raharja (Lab Instructor)
Office Hour : Sunday, Tuesday: 12:00 noon – 12: 50 a.m.
Monday: 8: 00 a.m. – 10: 00 a.m. (By appointment)
Catalog Description: Computer organization. Data and instruction representation.
ASCII code. Binary and Hexadecimal number systems. Assembler directives versus
machine instructions. Keyboard input and screen output. Instruction formats and
types. Conversion between ASCII strings and binary numbers. Stack operations.
Debugging. Interrupts. Macros. Video output. Disk I/O.
Course Prerequisite: ICS-201 and COE 200.
Text book Introduction to Assembly Language Programming, Dandamudi
Computer Systems Design, Heuring
Grading Policy:
10% Quizzes (FIVE)
Quiz 1 (Tuesday, March 11, 2003)
Quiz 2 (Tuesday, March 25, 2003)
Quiz 3 (Tuesday, April 22, 2003)
Quiz 4 (Tuesday, May 6, 2003)
Quiz 5 (Saturday, June 1, 2003)
10% Assignments (FOUR)
20% Lab {Passing the Lab is required to pass the course}
Lab works 8%
Lab quizzes 8% (2% + 3% + 3%)
Final Lab Test 4%
15% Exam I (Tuesday, April 1, 2003, 06:30PM – 09:30PM)
20% Exam II (Tuesday, May 20, 2003, 07:00PM – 10:00PM)
25% Final Exam (As scheduled by the Registrar's Office)
Important notes:
1. Regularly reading the announcements is a required component of this class, as
important information is posted there. Saying "I didn't know such-and-such
because I didn't read the news" is not an acceptable excuse.
2. Attendance will be checked at the beginning of each class or lab.
3. Every unexcused absence or late more than 10 minutes leads to a loss of
0.25%.
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4. Exceeding NINE class absences or TWO lab absences will result in a DN
grade. An official excuse must be shown within one week following the return
to classes.
5. No make-up assignments, quizzes, lab quizzes, lab test or exams.
6. All programs (where applicable) must be shown to be working before any
points could be earned.
7. If a student is found to copy another student’s work, both students will get a
zero score.
Course Syllabus (Tentatives)
1. Introduction: Why Assembly language? The 8086 family of processors,
Machine language, assembly language, assembler, Register, instruction fields,
opcode, operands, Stored program concept, Instruction register, program
counter, Fetch-Execute Cycle, Instruction set architecture, Data typing in High
Level Language and Machine Language, Mapping between high-level
languages and Assembly language, The CPU and Memory Interface, Buses:
Data bus, address bus, control bus, one and two bus architectures
2. Data Representation: Number representation: unsigned and signed numbers
(sign-magnitude, 1’s complement and 2’s complement), Why 2’s complement
representation is adopted for signed numbers, Overflow, Carry Flag and
ranges, Character representation: ASCII Code, Unicode, Parity bit
3. Pentium Registers: Data registers, Pointer and Index registers, Instruction
Pointer, Flags Register, Segment registers, Memory segmentation: logical and
physical address
4. Assembly Language Syntax and Program Structure: Assembly language
syntax: Name field, operation field, operand field, comment field, Program
structure: Memory models, data segment, stack segment, code segment,
Instructions and Directives
5. Constant and Variable Definition: Variable definition using DB, DW, DD,
PTR, LABEL, Named Constants using EQU, Array definition using DUP,
OFFSET Directive.
6. Basic Pentium Instructions: MOV, XCHG, ADD, SUB, INC, DEC, NEG,
CMP, JMP, JZ, JNZ, LOOP
7. Basic I/O using INT 21H: Read a character (Sub function 01), Display a
character (Sub function 02), Read a string (Sub function 10), Display a string
(Sub function 09)
8. Status & Flags Register: SF, ZF, CF, OF, PF, AF, Effect of Data flow
instructions on Flags, Effect of basic arithmetic instructions on flags, Flag
manipulation Instructions (CMC, CLC, STC)
9. Pentium Addressing Modes: 16-bit Addressing Modes, 32-bit Addressing
Modes: Immediate, Register , Direct, Memory Indirect, Based, Indexed,
Based-Indexed
10. Advanced Arithmetic: ADC, SBB, MUL, IMUL, DIV, IDIV, Sign Extension:
CBW, CWD
11. Flow Control Instructions: Unconditional Jump, Conditional Jump: Signed
conditional jump, Unsigned conditional jump, Loop instructions: Loop,
Loope, Loopne, High-Level Conditional Structures: IF-Then-Else, Case,
Branches with compound conditions, For loop, while loop, repeat until loop,
Short, Near, and Far jumps
12. Logic Instructions: AND, OR, NOT, XOR, TEST
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13. Shift & Rotate Instructions: SHR, SAR, SHL, SAL, ROL, ROR, RCL, RCR
14. Stack & Procedures: Stack registers: SP, BP, Stack instructions: PUSH, POP,
PUSHF, POPF, Procedure definition, CALL, RET, and RET n instructions,
Passing parameters to procedures, Global variables, Passing the address of the
data, Using the stack, Local Variables, EXTRN and PUBLIC, Creating a
library of procedures
15. Macros: Macro definition and invocation,Local labels, Macros invoking other
macros, A macro library, Repetition macros: REPT, IREP, Conditionals
16. String Instructions: The direction flag, The role of SI and DI registers for
string instructions, Move string: MOVS, MOVSB, MOVSW, MOVSD, Store
string: STOS, STOSB, STOSW, STOSD, Load string: LODS, LODSB,
LODSW, LODSD, Scan string: SCAS, SCASB, SCASW, SCASD, Compare
string: CMPS, CMPSB, CMPSW, CMPSD, Prefixes: REP, REPE, REPNE
17. I/O instructions: Hierarchical structure: applications, operating system, BIOS,
hardware, I/O address map vs. memory address map, I/O ports, Direct and
indirect I/O, IN, OUT, INSB, INSW, OUTSB, OUTSW
18. BIOS and DOS Interrupts: Types of Interrupts: Processor, Hardware,
Software, Interrupt and Trap flags, Interrupt vector, Interrupt service routines,
Interrupt vector table, Interrupt instructions: INT, INTO, IRET, BIOS
Interrupts, DOS Interrupts
19. Introduction to computer Organization: Computer system components: CPU,
Memory, I/O devices, CPU-Memory-I/O interface, Types of Interfaces: SCSI,
IDE, ISA.
20. Memory System Design: Memory Hierarchy: registers, cache, RAM, Hard
Disk, Tape, Performance parameters, RAM structure: conceptual RAM cell,
Design of 1-D and 2-D RAMs, Static RAM cell, Dynamic RAM cell,
Synchronous vs. Asynchronous memory, Types of ROMS
21. Peripheral Devices: Magnetic Disk Drives, Sectors, tracks, seek time,
rotational latency, Important parameters in hard disk performance, Types of
CDs: CD-ROM, CD-R, Types of tapes
22. CPU Design: CPU: data path and control unit, Data path design(Register
transfer sequence, Interconnecting registers using MUXs and Buses,
Interconnecting registers with an ALU, Single-Bus CPU, Control transfer
sequence , Fetching an instruction, ADD instruction, Branch instruction,
Branch on Negative, XCHG, CMP, Performance considerations, Two-Bus
CPU, Three-Bus CPU, CPU-Memory Interface Circuit, Hardwired Control
Unit Design, Microprogrammed Control Unit Design , Control word, control
store, Microprgram counter, microinstruction register, Horizontal
microprogramming, Field-encoded control word, Vertical Microprogramming,
Multi-way branching: Bit Oring
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