Download OPERATIONAL TRANSCONDUCTANCE AMPLIFIERS FOR GIGAHERTZ APPLICATIONS You Zheng

OPERATIONAL TRANSCONDUCTANCE AMPLIFIERS
FOR GIGAHERTZ APPLICATIONS
by
You Zheng
A thesis submitted to the
Department of Electrical and Computer Engineering
In conformity with the requirements for
the degree of Doctor of Philosophy
Queen’s University
Kingston, Ontario, Canada
(September, 2008)
Copyright ©You Zheng, 2008
Abstract
A novel CMOS operational transconductance amplifier (OTA) is proposed and
demonstrated in this thesis. Due to its feedforward-regulated cascode topology, it breaks
the previous OTA frequency limit of several hundred MHz and operates at frequencies up
to 10 GHz with a large transconductance. This is confirmed by an in-depth highfrequency analysis, simulations, and experimental demonstrations using purpose-built
circuits. Experimental results also show that the proposed OTA has high linearity and low
intermodulation distortion, which is of particular interest in microwave circuits. The
OTA’s noise behavior and the effects of process variations, device mismatch, and power
supply noise on the transconductance are also studied. To the best of our knowledge, the
noise analysis here is the first of its kind on regulated cascode circuits, which can be
applied to other regulated cascodes with minor changes.
Three microwave applications of this OTA are explored in this thesis: 1) an active
bandpass filter with a wide tuning range, 2) a 2.4-GHz ISM-band variable phase shifter,
and 3) a microwave active quasi-circulator, which are all in CMOS MMIC form. These
three circuits can be easily integrated with other chip components for System-on-Chip
(SoC) realizations. The use of the OTA makes these three applications super compact: the
active filter is at least 5 times smaller than previous circuits with a similar topology, and
the phase shifter and quasi-circulator are at least 3 times smaller than previous works in
that frequency range. Furthermore, the tunability of the developed OTA on its
transconductance gives its applications extra freedom in tuning their frequencies and
i
gains/losses electronically. In the first application, the active bandpass filter has a novel
narrowband-filtering topology and has a wide tuning-range of 28% around 1.8 GHz,
which makes it very suited for reconfigurable multi-band wireless systems. In the second
and third applications, the active variable phase shifter has a comparable variable phase
shift range of 120º in the 2.4-GHz ISM band and the active quasi-circulator has
transmissions close to 0 dB and directivities over 24 dB from 1.5 GHz to 2.7 GHz.
ii
Acknowledgements
Deep thanks are owed to many people who contributed to the creation of this thesis.
Without their invaluable supports, this thesis would never come true.
I would like to first thank my supervisor, Prof. Carlos E. Saavedra for his enthusiasm
and inspiration in providing supervision, encouragement and sound advices throughout
all the stages of my thesis project. I also cherish all the leisure time we spent together on
tennis, movie, and lunch. With his invaluable knowledge, insights and friendliness, he
helped to make research fun for me.
CMC Microsystems offered numerous financial and technical supports for this thesis
project, including IC designs, fabrications, and tests. Many thanks to its Silicon
Allocation Review Committee (SARC) for granting the IC areas of this thesis project and
also its technical support team including Jian Wang, Jim Quinn and Feng Liu for their
great patience in answering my endless questions and explaining the design and
fabrication details to me. Thanks are also owed to Mariusz Jarosz in the CMC
Engineering Department and Patricia Greig in the CMC Photonics Testing Collaboratory
for providing me the most convenience in using their instruments for the tests.
I would also like to thank Prof. Brian M. Frank, who gave me a lot of invaluable
instructions with his excellent knowledge and deep insights in RF CMOS technologies.
His friendliness and his willingness to help people strongly impressed me.
Prof. Edgar Sánchez-Sinencio at Texas A&M University gave the permissions to use
iii
some figures in this thesis from his previous distinguished works. His kindly help is
greatly appreciated.
Thanks are also given to Brad Jackson, Ahmed El-Gabaly, Gideon Yong, Stanley Ho,
John Carr, Ryan Bespalko, Yang Zhang, Mridula Das, Francesco Mazzilli, Michael
O’Farrell, Fei Chen, and Wei Yang for their kindly helps and useful discussions during
my graduate studies at Queen’s University.
Furthermore, I want to thank my parents and my wife, Yonghong Yang, for their
encouragement and understanding over years. Thanks are also given to my little baby,
Angela Y. Zheng, for her company during this thesis writing.
iv
Table of Contents
Abstract............................................................................................................ i
Acknowledgements........................................................................................ iii
Table of Contents.............................................................................................v
List of Figures.............................................................................................. viii
List of Tables ................................................................................................ xii
Abbreviations and Symbols......................................................................... xiii
Chapter 1 General Introduction .......................................................................1
1.1 High Frequency OTAs .............................................................................................. 1
1.2 OTA Concept ............................................................................................................ 2
1.3 CMOS OTA History ................................................................................................. 4
1.4 Thesis Contributions and Overview.......................................................................... 4
Chapter 2 OTA Review ...................................................................................6
2.1 CMOS OTAs............................................................................................................. 6
2.1.1 Single input/output OTAs................................................................................... 6
2.1.2 Differential OTAs............................................................................................... 8
2.2 OTA Trends............................................................................................................. 11
2.2.1 High Frequency ................................................................................................ 12
2.2.2 High Linearity................................................................................................... 13
2.2.3 Low power........................................................................................................ 17
2.3 OTA Applications ................................................................................................... 19
2.3.1 Variable Resistors............................................................................................. 20
2.3.2 Active Inductors ............................................................................................... 22
2.3.3 Filters ................................................................................................................ 25
2.3.3.1 OTA-C Filters ............................................................................................ 25
v
2.3.3.2 High-Frequency Filters .............................................................................. 29
2.3.4 Oscillators......................................................................................................... 30
2.4 Summary ................................................................................................................. 31
Chapter 3 High-Frequency OTAs................................................................. 32
3.1 Introduction ............................................................................................................. 32
3.2 Cascoding Techniques............................................................................................. 34
3.3 Feedforward-Regulated Cascode OTA ................................................................... 39
3.4 OTA Theoretical Analyses...................................................................................... 42
3.4.1 High-Frequency Analysis ................................................................................. 42
3.4.2 Noise Analysis .................................................................................................. 49
3.5 Microwave Performance ......................................................................................... 51
3.5.1 Transconductance and Frequency Response .................................................... 51
3.5.2 Power and Intermodulation Distortion ............................................................. 57
3.5.3 Demonstration Circuits..................................................................................... 61
3.5.3.1 Active Inductor........................................................................................... 61
3.5.3.2 Microwave Oscillator................................................................................. 65
3.6 Summary ................................................................................................................. 71
Chapter 4 Wide Tuning-Range Bandpass Filter — OTA Application I ...... 72
4.1 Introduction................................................................................................................................... 72
4.2 Topology Considerations .......................................................................................................... 74
4.2.1 Ladder Filter Topology...................................................................................................... 74
4.2.2 Coupled-Resonator Filter Topology................................................................. 79
4.3 Active Bandpass Filter Design ................................................................................ 84
4.4 Experimental Demonstration................................................................................... 89
4.5 Summary ................................................................................................................. 94
Chapter 5 ISM-Band Variable Phase Shifter — OTA Application II.......... 95
5.1 Introduction ............................................................................................................. 95
5.2 Overview of MMIC Phase Shifting Techniques ..................................................... 97
vi
5.3 OTA-based Active Variable Phase Shifter............................................................ 101
5.3.1 Phase Shifter Design....................................................................................... 101
5.3.2 Simulation and Experimental Demonstrations ............................................... 105
5.4 Summary ............................................................................................................... 113
Chapter 6 Active MMIC Quasi-Circulator — OTA Application III ......... 114
6.1 Introduction ........................................................................................................... 114
6.2 Quasi-Circulator Design........................................................................................ 116
6.3 Experimental Demonstration................................................................................. 119
6.4 Summary ............................................................................................................... 124
Chapter 7 Conclusions................................................................................ 125
7.1 Thesis Summary and Contributions ...................................................................... 125
7.2 Future Work .......................................................................................................... 127
References................................................................................................... 129
Appendix..................................................................................................... 141
A-1. Derivation of ip and in.......................................................................................... 141
A-2. Derivation of Zp and Zn ....................................................................................... 142
A-3. Computation of Butterworth and Chebyshev Filters .......................................... 143
vii
List of Figures
1-1.
Three types of OTAs and their equivalent circuit models: (a) singleinput/output, (b) differential-input single-output, and (c) differential
input/output. ....................................................................................................... 3
2-1.
Single-input/output OTAs from [16] with permission: (a) a commonsource transconductor, (b) a cascode transconductor, (c) a foldedcascode transconductor, (d) a regulated-cascode transconductor, and (e)
a positive transconductor. .................................................................................. 7
2-2.
Differential-input single-output CMOS OTAs from [16] with permission:
(a) a simple OTA, and (b) a balanced OTA....................................................... 9
2-3.
Differential-input/output CMOS OTAs from [16] with permission................ 11
2-4.
Source-degeneration linear techniques from [16] with permission......... 15
2-5.
Linear techniques using nonlinear-term sum cancellation from [16] with
permission: (a) multiplication-sum technique, and (b) squaring-sum
technique (V1= -V2). ........................................................................................ 16
2-6.
A complex combined linear technique from [26] with permission. ................ 17
2-7.
(a) Simplified class-AB amplifier and (b) level-shifter............................ 19
2-8.
OTA variable resistors (a) single-ended variable resistor (b) floating
variable resistor after [2].................................................................................. 20
2-9.
(a) OTA negative variable resistor, and (b) its application in a loss
compensation for a LC tank circuit. ............................................................ 21
2-10. (a) single-ended active inductor, and (b) floating active inductor after [2]. .... 23
2-11. Two-transistor active inductors using CS-CD and CG-CS topologies
after [41]........................................................................................................... 24
2-12. OTA integrator................................................................................................. 26
2-13. Four second-order OTA-C filter structures after [2]........................................ 27
2-14. OTA-C oscillators after [46]: (a) 2OTA3C, (b) 3OTA2C, and (c) their
unified equivalent circuit model. ..................................................................... 30
3-1.
Cascode OTAs from [16] with permission: (a) basic cascode
transconductor, and (b) regulated cascode transconductor. ............................. 34
3-2.
Output resistance model of the basic cascode OTA. ....................................... 36
viii
3-3.
Equivalent circuit model of the regulated cascode transconductor. ................ 38
3-4.
Regulated cascode OTAs using different feedback regulation topologies:
(a) a common-source amplifier (T3) after [54] and (b) a common-source
amplifier plus an additional OTA (gm) after [50]............................................. 38
3-5.
(a) Proposed CMOS fully-differential OTA using negative feedforwardregulated cascodes, (b) one pair of cross-connected cascodes. ....................... 40
3-6.
(a) High-frequency half equivalent circuit model of the OTA in Fig.3-5,
(b) high-frequency MOSFET transistor model, (c) simplified circuit
model of the proposed OTA............................................................................. 43
3-7.
Thermal noise model of the proposed OTA. ................................................... 50
3-8.
(a) Block diagram and (b) microphotograph of the fabricated OTA
synthetic resistor (outlined by the black ring).................................................. 52
3-9.
Proposed OTA’s transconductance (VC=-0.55V). ........................................... 55
3-10. Input/output parasitic capacitance of the proposed OTA (VC=-0.55V)........... 55
3-11. Distributions of the transconductance and the input/output parasitic
capacitance with 1% deviations of W/L for all transistors in the Monte
Carlo simulation (@2GHz).............................................................................. 56
3-12. (a) Schematic and (b) microphotograph of the single-stage differential
amplifier........................................................................................................... 58
3-13. Measured P1dB compression point of the test amplifier in Fig. 3-12(a)......... 60
3-14. Measured IP3 intermodulation of the test amplifier in Fig. 3-12(a) with
two-tone signal inputs. ..................................................................................... 60
3-15. (a) Schematic and (b) microphotograph of the fabricated active inductor
(outlined by the black ring).............................................................................. 62
3-16. Inductance of the active inductor (Vc=-0.55V). .............................................. 63
3-17. Series resistance of the active inductor (Vc=-0.55V). ..................................... 64
3-18. Distribution of the active inductance in Fig. 3=16 with 1% deviations of
W/L for all transistors in the Monte Carlo simulation (@2GHz). ................... 65
3-19. (a) Schematic and (b) microphotograph of the fabricated active-inductorbased oscillator................................................................................................. 67
3-20. Measured output fundamental spectrum of the oscillator at VC=-0.55V......... 68
3-21. Measured output harmonic spectra of the oscillator at VC=-0.55V. ................ 68
3-22. Measured harmonic output powers and frequency versus the OTA
control voltage. ................................................................................................ 69
3-23. Measured phase noise of the oscillator at 2.89 GHz........................................ 70
ix
4-1.
Low-pass ladder filter prototype with normalized component values gk
after [43], [66].................................................................................................. 75
4-2.
2.1-GHz Butterworth bandpass filter with a 30-MHz bandwidth.................... 76
4-3.
Simulation results of the designed bandpass ladder filter: (a) simplified
inductor model to obtain the Q factors in the simulations and (b)
simulated transmissions at different inductor Q factors. ................................. 78
4-4.
(a) Transformation of a coupled-resonator filter from the previous
bandpass ladder filter using two impedance inverters and two impedance
converters, and (b) the final coupled-resonator filter after the adjacentcomponent absorptions. ................................................................................... 80
4-5.
Coupled-resonator bandpass filter transmissions at different inductor Q
factors from simulations. ................................................................................. 84
4-6.
(a) Active MMIC bandpass filter using a coupled-resonator topology,
and (b) tunable active inductor using two high-speed OTAs. ......................... 86
4-7.
Simulation result with three ideal inductors for LAI in the filter: filter
transmission (S21) and return loss (S11). ........................................................ 88
4-8.
Post-layout simulation result with the three designed active inductors for
LAI in the filter: filter transmission (S21) and return loss (S11). ..................... 89
4-9.
Microphotograph of the fabricated bandpass filter. ......................................... 90
4-10. Measured transmissions at different control voltages VC. ............................... 91
4-11. Measured center frequency versus the frequency tuning voltage VC. ............. 92
4-12. Measured transmission and input reflection coefficient at fc=1.96GHz. ......... 93
5-1.
Typical MIMO system with its transmitter and receiver architectures............ 96
5-2.
Typical distributed-type (DT) variable phase shifter....................................... 97
5-3.
Typical varactor-loaded LC variable phase shifter. ......................................... 98
5-4.
Typical forward-type (FT) variable phase shifter using a coupler and a
power combiner. .............................................................................................. 99
5-5.
Type reflective-type (RT) variable phase shifter using a single coupler. ........ 99
5-6.
Block diagram of the proposed variable phase shifter. .................................. 103
5-7.
(a) 3-transistor active circulator using CMOS technology, and (b) it
simulated S parameters. ................................................................................. 104
5-8.
LC network with an active inductor............................................................... 105
5-9.
Microphotograph of the fabricated variable phase shifter. ............................ 106
5-10. Simulated and measured phase shift versus the varactor control voltage
x
at 2.4 GHz. ..................................................................................................... 107
5-11. Simulated and measured transmission and input reflection versus the
varactor control voltage at 2.4 GHz. .............................................................. 107
5-12. Simulated stability factors K and || for the designed phase shifter.............. 108
5-13. Measured phase shift at different varactor control voltages (not in linear
steps) across the 2.4-GHz ISM band.............................................................. 110
5-14. Measured transmission with the phase-shift tuning....................................... 111
5-15. Measured input reflection with the phase-shift tuning. ................................. 111
5-16. Measured output power versus the input power. ........................................... 112
6-1.
Full circulator and quasi-circulator with their ideal S-parameter matrices.... 115
6-2.
Block diagram of the CMOS MMIC quasi-circulator. .................................. 117
6-3.
CG-CS active balun to generate the out-of-phase signals. ............................ 118
6-4.
Microphotograph of the fabricated CMOS MMIC quasi-circulator.............. 119
6-5.
Measured transmissions S21 and S32, and isolation S31. ................................. 121
6-6.
Measured input reflections of the three ports. ............................................... 122
6-7.
Measured other isolations of the three ports. ................................................. 122
6-8.
P1dB compression point of the transmissioin from P1 to P2.......................... 123
xi
List of Tables
3-1. Power supply rejection ratios (PSRR) from the simulation............................... 57
3-2. Comparisons between this work and the recent works...................................... 70
4-1. Normalized component values for Butterworth lowpass filters (g0=1,
c=1, N=1 to 10) after [43], [66]. ...................................................................... 75
4-2. Direct transformation of a bandpass ladder filter from its low-pass
ladder filter prototypes in Fig. 4-1 after [43]. .................................................... 76
4-3. Transformation of a bandpass coupled-resonator filter (before adjacentcomponent absorption) directly from its low-pass ladder filter prototype
in Fig. 4-1........................................................................................................... 82
4-4. Active bandpass filter performance summary and comparison......................... 93
5-1. Performance summary and comparison of the previous works and this
work. ................................................................................................................ 112
6-1. Performance summary and comparison........................................................... 123
xii
Abbreviations and Symbols
AI
Active inductor
APN
All-pass network
BW
Bandwidth
CMOS
Complementary metal-oxide semiconductor
CMRR
Common-mode rejection ratio
CPW
Coplanar waveguide
FTPS
Forward-type phase shifter
GaAs
Gallium arsenide
MIMO
Multiple input multiple output
MMIC
Monolithic microwave integrated circuit
NEF
Noise excess factor
OPAMP
Operational amplifier
OTA
Operational transconductance amplifier
RF
Radio frequency
RTPS
Reflective-type phase shifter
SAW
Surface acoustic wave
SoC
System on chip
A or G
Gain
C
Capacitance
Cox
Gate oxide capacitance per unit area in F/m2
xiii
Esat
Saturated electrical field
f
Frequency in Hertz
gm
Transconductance
gd0
Zero-bias drain conductance
gk
Normalized ladder filter component value

Bias dependent factor

Phase shift
k
Boltzmann constant
K’
Process transconductance parameter
L
Inductance or gate length
Q
Q factor
R or r
Resistance
T
Transistor or temperature in Kelvin
S
S parameter

Permeability
VT
Threshold voltage

Frequency in rad/sec
W
Gate width
Y
Admittance
Z
Impedance
xiv
Chapter 1 General Introduction
1.1 High Frequency OTAs
Today operational amplifiers (OPAMPs) are widely used as basic building
blocks in implementing a variety of analog applications from amplifiers, summers,
integrators, and differentiators to more complicated applications such as filters and
oscillators.
Using
OPAMPs
greatly
simplifies
design,
analysis,
and
implementation for analog applications. OPAMPs work well for low-frequency
applications, such as audio and video systems. For higher frequencies, however,
OPAMP designs become difficult due to their frequency limit [1], [2]. At those
high frequencies, operational transconductance amplifiers (OTAs) are deemed to
be promising to replace OPAMPS as the building blocks. Theories of using OTAs
as the building blocks for analog applications have been well developed [1], [2].
To date, with much effort dedicated by analog IC researchers and the continuous
scaling-down on commercial semiconductor technologies, the reported OTAs can
work up to several hundred MHz [3]-[13]. In this thesis, a fully differential highfrequency OTA suitable for microwave applications will be presented which has a
large transconductance up to 10 GHz. It will also be shown that there are more
applications of the OTAs other than the aforementioned analog applications that
are specifically interesting at microwave frequencies. All of these developments
indicate that OTA microwave circuits are just around the corner.
1
Chapter 1. General Introduction
1.2 OTA Concept
An ideal operational transconductance amplifier (OTA) is a voltage-controlled
current source with a constant transconductance and infinite input/output impedances, as
illustrated in Fig. 1-1. It can be characterized by the following expressions,
io  g m v i ,
Zi   , Zo   ,
(1-1a)
(1-1b)
where vi and io in (1-1a) denote the input voltage and the output current respectively, and
gm is the transconductance with a constant value ideally. Zi and Zo in (1-1b) represent the
input and output impedances respectively. For general purposes, (1-1a) and (1-1b) are
enough to evaluate an OTA’s performance. However, they become inaccurate when a
practical OTA at high frequency or with large input signal is concerned. Effects of high
frequency parasitics and active device nonlinearity have to be considered in such cases.
The high-frequency and linearity issues of OTAs will be addressed in the following
chapters.
Depending on the input and output configurations, OTAs can be categorized into
three types: single input/output, differential-input single-output and differential
input/output (fully differential). The other possible type, single-input differential-output,
is not practical and has not been used in previous applications. The above three types of
OTAs and their equivalent circuit models are presented in Fig. 1-1. According to their
different configurations, (1-1a) can be modified to express the three types of OTAs
respectively:
2
Chapter 1. General Introduction
Figure 1-1. Three types of OTAs and their equivalent circuit models: (a) single-input/output, (b)
differential-input single-output, and (c) differential input/output.
io   g m v i ,
(1-2a)
i o  g m (v i   v i  ) ,
(1-2b)
io  io  io  g m (vi   vio ) .
(1-2c)
In these three types of OTAs, the transconductance gm can be tuned via their DC current
bias Itune. The single input/output transconductor shown in Fig. 1-1(a) is the simplest to
implement, e.g. a single-NMOS common-source transconductor. The simplicity of this
type of OTA makes it interesting for high frequency implementation, while most
previous works preferred the differential configurations in Fig. 1-1(b) and Fig. 1-1(c) due
to their common-mode rejection and their flexibility to engage feedback configurations
[1], [14], [15]. The latter two types in Fig. 1-1 have nearly the same performance and can
be replaced by each other in most circuits using OTAs [2], [16]. The implementations of
these three types will be further described in Chapter 2.
3
Chapter 1. General Introduction
1.3 CMOS OTA History
In the early 1990s, RF integrated circuits (RFICs) were dominated by bipolar and
GaAs technologies, while CMOS technologies were mainly used for basedband signal
applications. As the gate lengths of CMOS devices were scaled down to one micron in
the middle of 1990s, CMOS RFICs over GHz became possible [17]. Since then,
continuous scaling-down of CMOS devices to today’s deep sub-micron devices has
opened a new era for CMOS RFIC designs, including OTA circuits. Previous OTAs were
developed in CMOS technologies due to the unique properties that CMOS can offer: 1)
Ease to implement a transconductor – MOSFETs are naturally voltage-controlled current
devices; 2) High cutoff frequency – the latest record was beyond 400 GHz [18]; 3) Wellcommercialized and low-cost processes; 4) Ability to integrate both digital and analog
circuits, i.e., system-on-chip (SoC). Currently, CMOS OTAs are developed in three
trends: high frequency, high linearity and low power. High-frequency OTAs will be the
focus of this thesis.
1.4 Thesis Contributions and Overview
A novel feedforward-regulated cascode OTA that can operate up to microwave
frequencies is proposed, in-depth analyzed, and experimentally demonstrated in this
thesis, which is the first contribution of this thesis. The developed OTA has a large
transconductance with high linearity and low intermodulation distortion, which makes it
very suitable for implementing numerous types of microwave integrated circuits,
including its three applications successfully explored in this thesis: an active wide tuningrange bandpass filter, a 2.4-GHz ISM-band variable phase shifter, and a microwave
4
Chapter 1. General Introduction
active quasi-circulator. All three applications are in the CMOS MMIC form. They
occupy much smaller chip areas and have better performance than their previous works.
These three applications are also the contributions of this thesis.
The rest of this thesis starts from a literature review of the previous CMOS generic
and cascode OTAs in Chapter 2. Their trends as well as their applications are also
described in the same chapter. In Chapter 3, the new high-frequency OTA with the feedforward regulated cascode topology is proposed, followed by a set of in-depth theoretical
analyses on its high-frequency performance and its noise performance. The effects of
process variations, device mismatch, and power supply noise on the OTA’s
transconductance are also studied. The proposed OTA is successfully demonstrated using
some purpose-built microwave circuits. Thereafter, the three more complicated MMIC
applications are successfully explored in Chapters 4, 5, and 6 respectively to further
demonstrate the developed high-frequency OTA. A thesis summary together with the
thesis contributions and future work are presented in Chapter 7 to conclude this thesis.
5
Chapter 2 OTA Review
2.1 CMOS OTAs
CMOS technologies are very convenient for implementing OTAs because their
MOSFETs are inherently voltage-controlled current devices. A variety of CMOS OTAs
with different topologies have been developed for different purposes so far. According to
their input/output topologies though, they can be categorized into the previouslymentioned three types, i.e., single input/output, differential-input single-output, and
differential input/output. These three types of CMOS OTAs as well as their advantages
and disadvantages are generally described below.
2.1.1 Single input/output OTAs
Fig. 2-1 presents some common CMOS topologies [16] to implement the single
input/output OTAs. The one in Fig. 2-1(a) is a single-NMOS common-source
transconductor. Although it is the simplest, it has relatively low output impedance due to
its Miller effect (input-output coupling) and low linearity, deviating it from an ideal OTA.
To alleviate this problem, a cascode topology in Fig. 2-1(b) is suggested, where a
common-gate transistor M2 is introduced to provide isolation between the input and
output. This unilateralization method increases not only the output impedance and
linearity, but also the bandwidth and the available transconductance, at the expense of a
higher voltage supply. The third topology in Fig. 2-1(c) differs from the cascode topology
in its common-gate transistor, where a PMOS transistor is applied instead of a NMOS
one, resulting in a folded cascode topology. It provides the same isolation, but with a
6
Chapter 2. OTA Review
Figure 2–1. Single-input/output OTAs from [16] with permission © 2000 IEEE: (a) a commonsource transconductor, (b) a cascode transconductor, (c) a folded-cascode transconductor, (d) a
regulated-cascode transconductor, and (e) a positive transconductor.
reduced voltage supply. Fig. 2-1(d) is a regulated-cascode transconductor, which is an
enhanced cascode transconductor. It replaces the gate DC bias of M2 in Fig. 2-1(b) with a
negative feedback from its source. This feedback further improves the linearity and the
output impedance by a factor of (A+1) compared to the cascode transconductor, where -A
is the feedback gain. The improvement mechanism behind the cascode and regulatedcascode topologies will be further explained in the next chapter. The fifth one in Fig. 21(e) utilizes a PMOS current mirror to convert a negative transconductor to a positive one,
for which the output polarities of the block diagram and the circuit model in Fig. 1-1(a)
have to be inverted in order to represent it.
Ignoring the parasitics with those cascode and regulated-cascode transconductors in
Fig. 2-1(b), (c), and (d), the output currents of their input common-source transistors (M1)
will propagate to their outputs (io) without any loss. Therefore, despite the different
topologies of the transconductors in Fig. 2-1, their transconductance gm can be unified,
gm 
io
  g m,M1 .
vi
7
(2-1)
Chapter 2. OTA Review
where gm,M1 is the transconductance of the input transistor M1, and vi and io are the input
voltage and output current respectively. The sign  is inserted to discriminate the positive
transconductor in Fig. 2-1(e) from the other negative ones. The transconductance in (2-1)
can be tuned through the control of the DC current of each transconductor above. The
more DC current an OTA consumes, the larger transconductance and tuning range it
usually has.
2.1.2 Differential OTAs
Fig. 2-2 depicts two typical CMOS implementations of the second-type OTA
with the differential-input single-output topology [16]. They both contain a
source-coupled differential-pair input stage, which can provide high input
impedance, high gain, and high common-mode rejection simultaneously without
much sacrifice. A scrutiny of their signal paths after the input stages reveals the
important role that current mirrors play in these two implementations.
In Fig. 2-2(a), the current mirror CMp transfers the left output current of the
input differential pair, id , to the right to combine with its right output current id ,
from which the transconductor output current is doubled, so does its
transconductance:
gm 
io
i d  i d
 2i d


 g m,M1 ,
vi  vi vi  vi
2vi
(2-2)
where vi and vi are the differential input voltages, and gm,M1 is the transconductance of
each transistor in the differential pair, twice of the transconductance of the differential
pair if only one output is concerned.
8
Chapter 2. OTA Review
Figure 2–2. Differential-input single-output CMOS OTAs from [16] with permission © 2000
IEEE: (a) a simple OTA, and (b) a balanced OTA.
The balanced implementation in Fig. 2-2(b) is different from the one in Fig. 2-2(a) in
that two PMOS current mirrors are added after the input differential pair in order to
improve the balance between its two differential input paths. Furthermore, these two
PMOS current mirrors can be set in such way that they have a size ratio of B between
their reference transistor and controlled transistor. This boosts their output currents by B
times [19]. The boosted currents are combined at the output using a NMOS current
mirror at the bottom, resulting in a transconductance as large as B times of the previous
one’s:
gm 
io
Bid  Bid 2 Bid


  Bg m, M 1 .
vi  vi
vi  vi
2vi
(2-3)
The transconductance in (2-2) and (2-3) can both be tuned by changing the DC tail
currents Itail in Fig. 2-2(a) and (b).
9
Chapter 2. OTA Review
Equations (2-2) and (2-3) manifest the significant improvements of the
transconductance by using the current mirrors compared to those in which only a single
output of the differential pair is taken. The two equations, however, assume the ideal
combination of the differential output currents at the final output, i.e., the two differential
output currents arrive there at the same time. It is not exactly the fact because the output
current from the left in each implementation in Fig. 2-2 requires an additional current
mirror to combine itself with the right one, which introduces a time-delay difference
between the two combined currents. Therefore, (2-2) and (2-3) are valid only when the
time delay of the current mirrors for the current combinations is negligible with respect to
the operating signal cycle. As the operating signal cycle decreases, the time delay will
become comparable and the improvement from using the current mirrors will be lessened.
The CMOS OTAs in Fig. 2-3 illustrate two OTA implementations for the third-type
fully-differential topology [16]. One can see that their structures are similar to that in Fig.
2-2(b), but their two output currents remain. The aforementioned size ratio of B can also
be applied in the current mirrors to increase their transconductance and therefore their
current efficiency. The two OTAs in Fig. 2-3 have the same transconductance, as can be
derived below,
gm 
Bid  Bi d 2 Bi d

 Bg m, M1 .
vi  vi
2vi
(2-4)
Again, the DC tail currents Itail in Fig. 2-3 can be used for the above transconductance
tuning. Compared to the OTA in Fig. 2-3(a), the one in Fig.2-3(b) has an additional
common-mode feedforward (CMFF) circuit comprising MC1, MC2 and MC3 to further
10
Chapter 2. OTA Review
enhance its common-mode rejection. The sizes of MC1, MC2, and MC3 should be properly
selected to achieve a common-mode transconductance gain of Bgm,M1, in order to
optimize its common-mode cancellation with the B-size PMOS transistors at the outputs,
which have a common-mode transconductance gain of -Bgm,M1. There are many more
differential OTAs with different variations for various purposes, which will be discussed
in the next section.
Figure 2–3. Differential-input/output CMOS OTAs from [16] with permission © 2000 IEEE.
2.2 OTA Trends
Currently, high frequency, high linearity, and low power are the three main concerns
of CMOS OTAs. With many efforts, researchers have made significant progress in these
three aspects of CMOS OTAs, especially the latter two. Meanwhile, there are still
challenges in each aspect as well as in combining these three aspects. Tradeoffs have to
be made among these aspects in designing practical OTAs. The current trends on these
aspects are reviewed below.
11
Chapter 2. OTA Review
2.2.1 High Frequency
As mentioned previously, OTAs are regarded as a good candidate to replace
OPAMPs for high-frequency applications. OTAs that can operate up to several
hundred MHz have been reported [3]~[13]. For higher frequencies, such as those
above 1 GHz, new technologies and techniques are required.
CMOS scaling technology is one driving force behind the high-frequency
OTAs. OTAs are built using transistors which mainly determine the OTA
frequencies. Transistors with high cutoff frequency (f T ) and high maximum
oscillation frequency (f MAX ) are desired. Most OTAs developed using long-channel
CMOS technologies (>0.5 m) had frequencies limited to 100 MHz or less
according to [16] and its references. As the characteristic lengths of CMOS
devices are scaled down, both their channel delays and capacitive parasitics are
reduced, which increases the cutoff frequencies of the transistors. Current CMOS
0.18-m technology with f MAX up to 40 GHz has been well commercialized [20],
and 0.13-m, 90-nm, 65-nm, and even 45-nm technologies are also available to
researchers, all with much higher f MAX than the 0.18-m technology [21], [22].
These submicron and deep-submicron advanced technologies offer significant
potential for various OTAs to be implemented at RF and even microwave
frequencies. However, the study of RF/microwave OTAs circuits using these
advanced technologies is still in its infancy.
Besides the scaling technology, OTA topologies are also very important for
high-frequency OTAs. For an OTA in a given CMOS technology, capacitive
12
Chapter 2. OTA Review
parasitics can be reduced by optimizing its topology in order to maximize its
frequency. To this end, simpler topologies are preferable. Those OTAs with
multiple stages [4], [6] have complicated structures and are not suited for this
high-frequency purpose. As previously discussed for the second-type OTAs, the
use of current mirrors to combine one differential output current with the other
results in different time delays for the two paths, which is also not suitable. The
simplest
topology
is
the
mentioned
single-transistor
common-source
transconductor that probably has the least parasitics in all possible topologies. It
has been used in some RF/microwave circuits that we will describe later.
Shortcomings accompany with this simplest topology yet, such as the low output
impedance, low linearity and small available transconductance. The described
cascode topologies are a good solution, which have an excellent balance between
complexity and performance. They have been widely used in low noise amplifier
designs at RF and microwave frequencies [23]. It will be shown in the rest of this
thesis that the cascode topologies are also very useful for high-frequency OTAs.
2.2.2 High Linearity
Linearity is a common issue of OTAs no matter what frequencies they work at.
This can partly explain why considerable attention was given to this linearity issue
in the past.
The output currents of a CMOS differential pair depend linearly on its input
gate voltages only when small input signals are applied. Otherwise, high-order
nonlinear terms must be included in the expression of the OTA output current [16],
13
Chapter 2. OTA Review


 
i 1
i 1
i 1 j 1
io   ai v1i   bi v 2i    cij v1i v 2i .
(2-5)
These nonlinear terms cause significant distortion of the transconductance, which
reduces the desired fundamental signal and presents harmful inter-modulation
products at the output of the OTA [24], [25].
To alleviate the nonlinear problem, several techniques have been proposed.
One simple way is to directly put a voltage divider before an OTA, such that the
input voltage of the OTA itself is kept small for its linear operation. However, it
also reduces the available transconductance as a tradeoff. Source degeneration
illustrated in Fig.2-4 is a common way to reduce the nonlinearity, which also
reduces transconductance usually by an order of the source degeneration factor N
[16]. The two topologies presented in Fig.2-4(a) and Fig.2-4(b) utilize
degeneration resistors at the sources which realize the same transconductance and
degeneration, and can be exchanged. Shown in Fig.2-4(c), (d) and (e) are three
active source-degeneration topologies based on the second topology in Fig. 2-4(b).
The degeneration resistor is simply replaced by a triode MOSFET in Fig.2-4(c).
The one in Fig.2-4(d) also uses triode-MOSFETs, but with an additional internal
mechanism that increases its transconductance for large signals, hence its linear
range is expanded [26]. The last topology in Fig.2-4(e) utilizes two saturated
transistors (M 2 ) with their drains connected to their gates for the degeneration. Its
third-harmonic distortion can be reduced by a factor of N 2 , compared to its
transconductance reduction of N due to the degeneration [26].
14
Chapter 2. OTA Review
Figure 2–4. Source-degeneration linear techniques from [16] with permission © 2000 IEEE.
Some intelligent ways were also developed by means of an algebraic sum of
nonlinear terms so that the nonlinear terms were automatically cancelled, yielding
only a linear fundamental term in the ideal case [16]. Fig.2-5 shows two crosscoupled topologies for the nonlinearity cancellation at the top and their practical
implementations using MOSFETs at the bottom. Both topologies come from the
15
Chapter 2. OTA Review
Figure 2–5. Linear techniques using nonlinear-term sum cancellation from [16] with permission
© 2000 IEEE: (a) multiplication-sum technique, and (b) squaring-sum technique (V1= -V2).
high-order nonlinearity cancellation techniques for multipliers [16], [27]. Fig.25(a) presents a multiplication-sum technique and Fig.2-5(b) a squaring-sum
technique.
They
cancel
out
the
generated
high-order
nonlinearities
in
multiplication-sum and squaring-sum operations,
(V AV1  V AV2 )  (V AV2  V AV1 )  2V A (V1  V2 ) ,
(2-6a)
[(V1  V A ) 2  (V2  V A ) 2 ]  [(V1  V A ) 2  (V2  V A ) 2 ]  4V A (V1  V2 ) ,
(2-6b)
where VA is a constant voltage for both topologies. The floating constant voltage VA in
Fig.2-5(b) can be implemented using a simple source follower [28].
16
Chapter 2. OTA Review
Techniques combining the above source-degeneration topologies and cross-coupled
topologies also exist to further enhance the nonlinearity reduction [25], [26]. Fig. 2-6
presents one technique combining the topologies of Fig. 2-4(d), Fig. 2-4(e), and Fig. 2-5,
a complex combination technique. A byproduct of the linear techniques in Fig. 2-4(d) and
Fig. 2-6 is a reduction in power consumption. The issue of power consumption is
discussed below.
Figure 2–6. A complex combined linear technique from [26] with permission © 1999 IEEE.
2.2.3 Low power
Power performance plays an important role in mobile communications. Portable
devices in mobile systems always require low power consumption in order to extend
battery life. Non-portable devices also require low-power feature in order to save their
17
Chapter 2. OTA Review
energy costs as well as to ease their thermal considerations. To use OTA circuits that
contain several OTAs in such devices, low power operation of each OTA is required.
The power consumption of an OTA is determined by two factors: its DC
voltage supply and its DC current. This indicates two primary ways to obtain low
power performance. The aforementioned CMOS scaling technology can enable
low-voltage operations of the transistors, which allows the OTAs to operate at low
voltage supplies, and thus is regarded as one primary way to reduce the power
consumption.
The other primary way is related to current-reduction techniques, which can
reduce the DC currents flowing through the OTAs without significantly affecting
their transconductance, i.e., their power efficiencies can increase. Class-AB OTAs
can accomplish this task. A class-AB OTA differs from a common OTA in that the
class-AB has an adaptive bias circuit [19], [29]-[32]. A simplified class-AB OTA
is shown in Fig. 2-7(a). The adaptive bias circuit can make the quiescent currents
very low in order to dramatically reduce static power dissipation. When a large
input signal is applied, it can automatically boost dynamic currents well above the
quiescent currents, yielding an intelligent way to make full use of the DC currents.
Accordingly, the above linear topologies in Fig. 2-4(d) and Fig. 2-6 are also classAB OTAs. The adaptive bias circuit in Fig. 2-7(a) is actually a local commonmode feedback (LCMFB) network, which can be realized using the level-shifter in
Fig. 2-7(b). The OTAs in [29], [30] adopt two level-shifters with a cross-coupled
structure for their two input transistors, while the work in [19] utilizes two level18
Chapter 2. OTA Review
shifters to control the common-mode node of its input differential-pair. The latter
has an advantage over the former in that the latter’s lowest current in the
differential pair is never less than the DC current of its level-shifter IB , and none
of its input transistors is in cutoff [19]. Using a single level-shifter also exists [31],
[32], but with a lower output current and a requirement for an extra common-mode
sensing circuit.
Figure 2–7. (a) Simplified class-AB amplifier and (b) a level-shifter.
2.3 OTA Applications
Together with the developments of CMOS OTAs, OTA applications were also
explored in a variety of interesting analog circuits, from simple components such
as variable resistors and active inductors, to more complicated circuits, e.g. filters
and oscillators. Some of the applications either have been demonstrated or are
19
Chapter 2. OTA Review
potential at RF/microwave frequencies. These applications and their theories are
briefly reviewed below.
2.3.1 Variable Resistors
Variable resistors are the simplest applications of the OTAs. There are two
types of OTA variable resistors, positive and negative, depending on their
feedback polarities.
Fig. 2-8 presents two positive resistors realized using negative feedback on
the differential OTAs [2]. One is a single-ended version and the other is a floating
version. The input impedance of these two versions can be derived by assuming an
input voltage vi and an input current i i for each version:
Z i  v i / ii  1 / g m ,
(2-7)
where all OTAs are assumed to have a transconductance g m . At frequencies much
lower than the cutoff frequency of the OTAs, g m is real, thus Z i becomes a resistor.
Note from (2-7) that this resistor can be variable by changing g m . The control
Figure 2–8. OTA variable resistors (a) single-ended variable resistor (b) floating variable resistor
after [2].
20
Chapter 2. OTA Review
voltage of the OTA for this purpose is not shown in Fig. 2-8. OTA variable
resistors with capacitors can compose OTA-C filters, where the variable resistors
can be used to tune the filter frequencies. More details will be described in a later
section.
Because a negative feedback on an OTA in Fig. 2-8(a) creates a positive
resistor, it is easily understood that positive feedback on an OTA can result in a
negative resistor, as illustrated in Fig. 2-9(a). Its input impedance can be derived
using the same way:
Z i  vi /(ii )  1 / g m   R .
(2-8)
Note that the positive feedback inverts the input current’s direction, creating the
minus signs in (2-8), i.e., the negative resistor. A floating negative resistor can be
generated from Fig. 2-8(b) in the same manner. These negative resistors can also
be tuned by changing g m. A negative resistor can be used either to compensate a
filter’s loss or to provide gain for an oscillator. A simplified common application
Figure 2–9. (a) OTA negative variable resistor, and (b) its application in a loss
compensation for a LC tank circuit.
21
Chapter 2. OTA Review
is shown in Fig. 2-9(b) where an OTA negative resistor is used to compensate the
loss of an LC tank circuit. A filter implemented this way can achieve a Q-factor of
100 at 200MHz using older 2-m CMOS technology [12]. By using current
submicron or deep submicron technologies, much higher frequencies can be
expected.
2.3.2 Active Inductors
Silicon CMOS technologies are widely used for analog and RF/microwave designs
due to the previously-mentioned unique properties for their active devices. In contrast to
these active devices, their passive devices, especially on-chip inductors, suffer problems
from their lossy silicon substrate. The on-chip inductors are so close to the low-resistance
silicon substrate that they generate eddy currents in the substrate beneath them. These
eddy currents, in return, cause the loss and thereby reduce the Q factors of the inductors.
Low Q factors degrade circuit performance, such as phase noise and gain. On-chip
inductors also consume much larger IC areas compared to the active devices. Multiple
techniques were developed to reduce the loss with on-chip inductors by using some
substrate modifications, such as silicon-on-insulator (SOI) [33], [34], [35] and
micromachining [36], [37], [38]. Although these techniques can significantly reduce the
substrate loss of the on-chip inductors, they require special processes which are complex
and expensive. Some other techniques were also developed using the existing processes
including patterned ground shields [39], [40] and active inductors. The latter will be
addressed below.
Compared to the on-chip spiral inductors, an active inductor has a higher Q factor
22
Chapter 2. OTA Review
and occupies a smaller IC area due to its composition of only active devices and
capacitors, and thus is attractive to researchers. An active inductor contains an impedance
inverter that “inverts” a real capacitor into a virtual inductor. Its input emulates a real
inductor’s voltage and current. Fig. 2-10 illustrates diagrams for a single-ended active
inductor and a floating active inductor using OTAs [2]. In Fig. 2-10(a), the two OTAs in
a negative feedback loop construct the impedance inverter. The voltage and the current
Figure 2–10. (a) single-ended active inductor, and (b) floating active inductor after [2].
on its right are related to each other through the capacitor C:
io  vo / Z L  vo sC ,
(2-9)
where io = gm1 vi and vo=ii /gm2 according to the two OTAs. Substituting them into (2-9)
yields
Zi 
vi
sC

.
ii
g m1 g m 2
It is clear that (2-10) is an expression of an inductor, with an inductance value of
23
(2-10)
Chapter 2. OTA Review
L
C
.
g m1 g m 2
(2-11)
The derivation for the floating active inductor in Fig. 2-10(b) results in the same
expression [2]. The virtual inductor can be electronically tuned by changing the two
OTAs’ transconductances, gm1 and gm2. This tunable characteristic offers designers
another choice to tune circuit frequencies besides varactors.
Some active-inductor implementations using two transistors are presented in Fig. 211, where each transistor works as an OTA in order to achieve high frequency operations
[41]. The transistors are in common-source (CS), common-drain (CD) and common-gate
(CG) respectively, and the intrinsic capacitance of the transistors is exploited for the
capacitor C of each active inductor. Taking the implementation in Fig. 2-11(a) for
Figure 2–11. Two-transistor active inductors using CS-CD and CG-CS topologies after [41].
24
Chapter 2. OTA Review
example, its capacitor C comes from the gate capacitance of T2 (Cg) and the drain
capacitance of T1 (Cd):
C  C g  Cd .
(2-12)
Note that each implementation necessarily contains a common-source amplifier for its
negative feedback loop. Various implementations with more transistors are also available
for better performance [41].
2.3.3 Filters
2.3.3.1 OTA-C Filters
Filters that are constructed using OTAs and capacitors are called OTA-C filters or
Gm-C filters. OTA-C filters were probably the most popular applications of OTAs in the
past at low frequencies [1], [2], [16]. Their design processes and theories were well
developed. It will be seen that all the filter functions including low-pass, band-pass, highpass and band-stop, can be conveniently realized using OTA-C filters. The inherent
flexible frequency-tuning and Q-tuning of these OTA-C filters make them superior to
passive filters. As the OTA’s frequency is being extended, operations of such filters at RF
and microwave frequencies could be possible. The following descriptions will depend on
the ideal OTA model.
An OTA integrator is the simplest OTA-C filter, which can be regarded as a firstorder lowpass filter, as shown in Fig. 2-12. It consists of only an OTA and a capacitor,
simpler than an OPAMP integrator [1]. The transfer function for this integrator can be
derived as
25
Chapter 2. OTA Review
vo
g
 m
vi1  vi 2 sC
(2-13)
which is an integration function in the Laplace domain and has a lowpass property.
Figure 2–12. OTA integrator.
Fig. 2-13 gives four structures of second-order OTA-C filters based on the
OTA integrators and resistors [2]. Their output expressions are shown on the right.
Note that each structure contains a global negative feedback. The low-pass, bandpass, high-pass, and band-stop functions can be flexibly realized using these four
structures by selecting the proper input from V A, V B , and VC. For example, a secondorder lowpass function can be obtained by choosing V A as the input and grounding VB
and VC in Fig. 2-13(a). Its transfer function becomes:
H ( s ) lowpass 
g m1 g m 2
,
s C1C 2  sC1 g m 2  g m1 g m 2
2
(2-14)
which has a second-order lowpass property. The other input configurations of Fig. 2-13(a)
to realize bandpass, highpass and bandstop functions and their transfer functions are
listed below respectively [2]:
VB=input, VA=VC=0,
H ( s ) bandpass 
sC1 g m 2
,
s C1C 2  sC1 g m 2  g m1 g m 2
2
26
(2-15)
Chapter 2. OTA Review
VC=input, VA=VB=0,
VA=VC=input, VB=0,
H ( s ) highpass
s 2 C1C 2
 2
,
s C1C 2  sC1 g m 2  g m1 g m 2
H ( s ) bandstop 
s 2 C1C 2  g m1 g m 2
.
s 2 C1C 2  sC1 g m 2  g m1 g m 2
Figure 2–13. Four second-order OTA-C filter structures after [2].
27
(2-16)
(2-17)
Chapter 2. OTA Review
Similarly, the structures shown in Fig. 2-13(b), (c) and (d) can be also configured to
implement all the filter functions the same way.
Among the four filter functions, the band-pass function is the most relevant to
RF and microwave applications, therefore it is chosen for further discussion here.
For this purpose, V B is chosen as the input with VA and VC grounded for all of the
structures in Fig. 2-13. Derivation of their centre frequencies from their output
expressions in Fig. 2-13 results in a unified expression [2]:
0 
g m1 g m 2
.
C1C 2
(2-18)
It is obvious from (2-18) that their centre frequencies can be electronically tuned by
changing gm1 and gm2. Their Q factors are given in different expressions [2]:
Structure (a):
Q
Structure (b):
Q
Structure (c):
Q
Structure (d):
Q
C 2 g m1
,
C1 g m 2
(2-19)
C 2 g m1
,
g m3 R C1 g m 2
1
g m1 g m 2
g m3
1
g m3
C2
,
C1
g m1 g m 2 C 2
.
C1
(2-20)
(2-21)
(2-22)
One can see that the four structures have tunable Q factors by tuning their OTA
transconductances. Further scrutiny of (2-18), (2-20), (2-21), and (2-22) reveals more
characteristics of the lower three structures. First, frequency-independent Q-factor tuning
28
Chapter 2. OTA Review
can be achieved by varying gm3 while keeping gm1 and gm2 fixed. Secondly, considering
the filter bandwidth  =o/Q, the tuning of gm1 or gm2 has the same contribution to the
centre frequencies o and the Q factors of the lower two structures because their
expressions both include a term
g m1 g m 2 , yielding a constant-bandwidth tuning property
for both structures. Furthermore, the last one has a constant gain in the tuning of gm1 and
gm2 because its output expression has the same coefficient of the s term in its numerator
and denominator. More tuning freedom can be expected with more OTAs in these filters,
but at the expense of achieving high-frequency and low-power performance.
2.3.3.2 High-Frequency Filters
Direct use of active inductors in place of their passive counterparts in RF/microwave
LC filters is straightforward, because the theories for these LC filters, such as ladder
filters and composite filters, have been well developed [42], [43]. There are design tables
and appropriate computer software to generate the filters’ component values, resulting in
the other convenient way to design filters using OTAs. Among these filters, LC secondorder band-pass filters are the simplest and they have been demonstrated up to
RF/microwave frequencies using different active inductor topologies [41], [44], [45]
derived from the previous two-transistor topologies. The capacitors for the active
inductors were made of the device parasitic capacitance in these filters to maximize their
frequencies. Q factors up to several hundreds were reported with loss compensations [44],
[45]. Because a second-order bandpass filter only offers limited filtering characteristics
on its pass band and stop bands, it is desired to develop higher-order active LC filters for
RF/microwave applications. These filters are under development now.
29
Chapter 2. OTA Review
2.3.4 Oscillators
Similar to the OTA-C filters, there are also OTA-C oscillators. An active inductor is
the main component of these oscillators. Fig. 2-14 illustrates two oscillator structures [46].
By comparing to the single-ended active inductor in Fig. 2-10(a), one can see that Fig. 2-
Figure 2–14. OTA-C oscillators after [46]: (a) 2OTA3C, (b) 3OTA3C, and (c) their unified
equivalent circuit model.
30
Chapter 2. OTA Review
14(a) contains a shunt resonator with a single-ended active inductor (C1/gm1/gm2) and a
capacitor C2. The gain to start and sustain its oscillation comes from the active inductors.
In order for the oscillation to start more easily, an OTA negative resistor can be added in,
just as the one in Fig. 2-10(b). There are more different oscillator structures based on Fig.
2-14(a) and Fig. 2-14(b) according to [46], however, all these oscillators can be
simplified to a unified equivalent circuit model in Fig. 2-14(c), which has an LC
resonator with a negative resistor. It was reported that a 69-MHz oscillation was achieved
by one of these oscillator structures using 2-m CMOS technology [46].
RF/microwave oscillators using active inductors are also possible [47], [48]. They
were constructed using similar topologies as the OTA-C filters above, but exploited
current advanced deep submicron technologies and also replaced the capacitors with the
device capacitive parasitics in their active inductors in order to maximize their
frequencies. The oscillator in [47] can work up to 3 GHz and the one in [48] can even
operate up to 5.1 GHz. However, both oscillators have very low output swings, less than 14 dBm and -21 dBm respectively, resulting in extremely low power efficiencies.
2.4 Summary
This chapter provided a general review of CMOS OTAs. Three types of CMOS
OTAs with different input/output configurations were described first, followed by a
summary of the current trends on high frequency, high linearity, and low power CMOS
OTAs, including their techniques and challenges. Thereafter, some popular OTA
applications including filters and oscillators were presented and discussed.
31
Chapter 3 High-Frequency OTAs
3.1 Introduction
While numerous CMOS OTAs with bandwidths exceeding several hundred MHz
have been reported [3]-[13], there are comparatively few OTA designs that have broken
into the GHz range. The previous high-transconductance OTA topologies [16] that used
current mirrors to combine their output currents suffered from different time delays
between their signal paths. Some other recent OTA topologies developed for high
linearity [3], [10], [11] had large parasitics from their complicated structures and could
only work below 100 MHz.
A single-transistor common-source amplifier is the simplest OTA with the least
parasitics, which has potential for high-frequency applications [41], [44], [45]. However,
multiple drawbacks come with this single-transistor OTA. One drawback is its relatively
low drain-source output impedance, which reduces its available transconductance to the
output load. The existence of the gate-drain capacitance Cgd, typically about 30%-50% of
the main gate capacitance [23], is the second drawback. It induces coupling between the
input and the output (Miller effect), which can further reduce the available
transconductance and the bandwidth. When this single-transistor transconductor was used
to build active inductors [44], [45], its small transconductance caused a loss. The lossy
active inductors then had to depend on extra gain blocks to compensate their loss, which
increased the circuit complexity. The third drawback is its nonlinearity. The nonlinearity
reduces OTA output swing (i.e., the output power) and degrades the large-signal
32
Chapter 3. High Frequency OTAs
performance of OTA circuits, such as their 1-dB compression point (P1dB) and thirdorder intercept point (IP3). The recently-reported microwave oscillators [47], [48] are
two examples having very low output power characteristics due to their nonlinearity.
To alleviate the problems above, cascoding is a very promising solution. As
described in Chapter 2, the cascode topologies have relatively simple structures that are
preferable for high-frequency operations. Furthermore, the additional transistors not only
reduce their Miller effect and increase their output impedance, but also help to stabilize
the drain voltages of their input transistors, which increases their linearity [49], [50].
The cascoding techniques are studied in more detail below as a background review.
Thereafter, a very high-frequency fully-differential OTA using a novel feedforwardregulated cascode topology is proposed in this thesis [51], [52]. The OTA has a large
transconductance over a frequency span of 10 GHz. Right after the proposal, an in-depth
theoretical treatment of the OTA’s gain and frequency response is carried out, which has
very good agreement with its simulation and measurement results. Studies on its other
vital properties such as the noise performance and the effects of process variations,
device mismatch, and power supply noise are conducted as well. Given that microwave
circuits are predominantly characterized using s-parameter test sets and spectral domain
techniques, a set of purpose-built microwave circuits using the OTA are designed to
demonstrate its microwave performance including its high-frequency transconductance,
P1dB, and IP3. The latter two are of particular interest of microwave applications. These
demonstrations are detailed at the end of this chapter.
33
Chapter 3. High Frequency OTAs
3.2 Cascoding Techniques
Fig. 3-1 redraws the two typical cascode transconductors from Chapter 2. Their
analyses follow, which will reveal their superior performance for high frequency OTAs.
Figure 3-1. Cascode OTAs from [16] with permission © 2000 IEEE: (a) basic cascode
transconductor, and (b) regulated cascode transconductor.
In the basic cascode transconductor in Fig. 3-1(a), the bottom common-source
transistor M1 usually works in its triode region for better linearity [16]. The additional
transistor M2 at the top is in a common-gate configuration with its gate biased by a
constant DC voltage Vb, so any change of its source voltage will cause the change of its
gate-source voltage and thus the change of its drain-source current, which in reverse
prevents the above source voltage change. Therefore, the transistor M2 sometimes is
treated as a DC voltage follower, which keeps its source voltage stable. The stability of
this voltage, i.e., the drain-source voltage of the transistor M1, can increase the linearity
of the cascode. This improvement can be explained by investigating the drain current
expressions of the triode transistor M1 in both long-channel and short-channel cases [53],
34
Chapter 3. High Frequency OTAs
Long channel: I DS  K '
W
1
2
 VGS  VT V DS  V DS  ,
L
2

(3-1a)
Short channel: I DS  K '
W
1
1
2
,
 VGS  VT VDS  V DS 
L
2
 1  (VDS / E sat L)
(3-1b)
where K’, W, L, VT, and Esat denote the process transconductance parameter, gate width,
gate length, threshold voltage and saturated electrical field respectively. They are all
constants related to device physics. If VDS remains constant too, it is clear that both
equations become linear functions for the output current IDS on the gate-source voltage
VGS, i.e., the input voltage. Since the output current of the whole cascode can be
approximated by the drain current of M1, the two linear functions above result in two
constant transconductances for the cascodes in both cases:
Long channel: g m 
dI DS
W
 K ' VDS ,
dVGS
L
(3-2a)
Short channel: g m 
dI DS
W
1
 K ' V DS 
.
dVGS
L
1  (V DS / E sat L)
(3-2b)
The introduced transistor M2 also increases the total output resistance of the cascode
by both creating isolation between the output and ground and providing a stable drainsource voltage to M1. The stable drain-source voltage helps to reduce M1’s channellength modulation and thus increases its output resistance [54]. The total output
resistance of the cascode can be mathematically derived from its output resistance model
shown in Fig. 3-2. The resistors r1 and r2 represent the drain-source resistances of the
transistors M1 and M2 respectively. Meanwhile, the transistor M2 has a drain current
35
Chapter 3. High Frequency OTAs
source equal to -gm2vgs=gm2vs, where vs is its source voltage. If it is assumed that a voltage
vx at the output node induces a current ix, we will have equations from Fig. 3-2:
v x  i 2 r2  v s ,
(3-3a)
v s  i1 r1 ,
(3-3b)
i x  i1  i2  ( g m 2 v s ) ,
(3.3c)
where i1 and i2 are marked in Fig. 3-2 and have the usual meaning. Solving the above
equations yields the output resistance:
ro 
vx
 ( g m 2 r2 )r1  r1  r2 .
ix
(3-4)
The second term and third term in (3-4) are usually small compared to the first term and
can be neglected. Note that cascoding the original transistor M1 with an extra transistor
M2 at least increases the output resistance from r1 to (gm2r2)r1, by a factor of gm2r2. This
factor is usually in a range of 20 to 100 [55]. Thus the increase of the output resistance as
a result of cascoding is significant.
Figure 3-2. Output resistance model of the basic cascode OTA.
36
Chapter 3. High Frequency OTAs
The additional transistor creates isolation between the output and input too, which
reduces the input-output capacitance Cgd. It significantly reduces the input equivalent
capacitance, which largely depends on Cgd:
C in  C gs  C gd (1  G )
(3-5)
Note that Cgd is multiplied by a factor including G, which is the voltage gain and is
usually large. This is the Miller effect. With the input equivalent capacitance reduced, the
cut-off frequency of the OTA is extended, thus its bandwidth.
The regulated cascode transconductor shown in Fig3-1(b) is an enhanced cascode
transconductor, although it has the same transconductance expressions as the single
cascode transconductor given in (3-2). A local negative feedback using an amplifier A is
applied on the transistor M2 to regulate its source voltage and further enhance its stability.
Any change of its source voltage is inversely amplified by a factor of A and applied to its
gate, thus the total change of its gate-source voltage will be (A+1) times that of the source
voltage. It will induce higher drain-source current to cancel the change with the source
voltage compared to the basic cascode transconductor, and thus further improve the
transconductor’s linearity. Its output resistance can be derived from its output resistance
model in Fig. 3-3 using the same way above:
ro 
vx
 [( A  1) g m 2 r2 ]r1  r1  r2
ix
(3-6)
Again, the second term and third term can be ignored compared to the first term in (3-6).
Note that the output resistance is approximately increased by a factor of (A+1) compared
37
Chapter 3. High Frequency OTAs
Figure 3-3. Equivalent circuit model of the regulated cascode transconductor.
Figure 3-4. Regulated cascode OTAs using different feedback regulation topologies: (a) a
common-source amplifier (T3) after [54] and (b) a common-source amplifier plus an additional
OTA (gm) after [50].
38
Chapter 3. High Frequency OTAs
to that of the basic cascode transconductor, or a factor of [(A+1)gm2r2] compared to that
of the single-transistor common-source transconductor.
Some implementations of the above feedback amplifier A including a commonsource amplifier and an additional OTA were suggested [50], [54], resulting in different
regulated cascode OTA topologies as illustrated in Fig. 3-4. Other than these two
topologies, an inverter was also suggested to be suitable for the amplifier A [16].
Comparing the two topologies in Fig. 3-4, the latter configuration provides higher
feedback regulation gain and thus more stable drain-source voltage of the bottom
transistor, but at the expense of more complicated feedback circuitry and thus slow
frequency response. The slow frequency response of the feedback can cancel the voltage
stability enhancement from the voltage regulating at high frequencies, and in the worst
case, deteriorate the cascoding performance.
3.3 Feedforward-Regulated Cascode OTA
The CMOS OTA proposed in this thesis is presented in Fig. 3-5(a) [51], [52]. It has
differential inputs and differential outputs, which facilitates both positive and negative
feedback in most OTA circuits [2]. The OTA contains two PMOS regulated cascodes
(T1/T2 and T5/T6) and two NMOS regulated cascodes (T3/T4 and T7/T8), where the PMOS
cascodes have the same configuration as the NMOS cascodes and their DC currents are
controlled by the two DC current sources at the bottom (T9 and T10). The CMOS
configuration of this OTA simplifies its DC bias and makes its output symmetric. Instead
of the previous local negative feedbacks, this OTA uses a negative feedforward method
39
Chapter 3. High Frequency OTAs
Figure 3-5. (a) Proposed CMOS fully-differential OTA using negative feedforward-regulated
cascodes, (b) one pair of cross-connected cascodes.
40
Chapter 3. High Frequency OTAs
for its four regulated-cascodes to speed up the regulating process. They are realized by
two pairs of cross connections between the PMOS cascodes and the NMOS cascodes,
which also work as the coupling between the two differential paths. To simplify the
explanation of the feedforward configuration, Fig. 3-5(b) shows only one pair of the
connections between the right PMOS cascode and the left NMOS cascode. Here we
assume that a large differential signal (vin+ and vin-) is fed to the OTA, e.g. vin+ is at its
high voltage with its signal polarity of (+) and vin- is at its low voltage with its signal
polarity of (-) in Fig. 3-5(b). If the cross connections did not exist, this large differential
signal would cause a decrease of the drain voltage vd4 of the transistor T4 and an increase
of the drain voltage vd5 of the transistor T5, which are marked with their signal polarities.
The changes of the drain voltages would decrease the transconductance’s linearity of the
transistors T4 and T5 [49], [50]. With the cross connections, however, these drain-voltage
changes can simultaneously cause an increase of the gate-source voltages of transistors T3
and T6, or an increase of their drain-source currents. The increase of their drain-source
currents reduces the above changes of the drain voltages vd4 and vd5. Therefore, the drain
voltages vd4 and vd5 are kept stable through this process even if there is a large input
signal. The other two cascode PMOS and NMOS transconductors not shown in Fig. 3-5(b)
work in the same way as the ones just described. Because the regulating voltage of each
cascode transconductor does not come from the output but instead from the other
differential input, these regulating voltages are called negative feedforward rather than
negative feedback.
In the previous OTAs using feedback-regulated cascodes in Fig. 3-4, their feedback
41
Chapter 3. High Frequency OTAs
networks always introduce a delay during the voltage regulation process. However, the
proposed feedforward topology can completely remove the regulating delay if vd4 and vd5
in Fig. 3-5(b) change at the same time, which can be attained by properly selecting the
width ratio between the PMOS and the NMOS transistors. The use of the complementary
FET configuration has additional benefits such as enabling a symmetric output voltage
swing and a high transconductance. It also eliminates the need for any DC block and
additional biasing circuitry when this OTA is cascaded with copies of itself, which greatly
simplifies overall system designs.
3.4 OTA Theoretical Analyses
High-frequency analysis of the proposed OTA is carried out below. The results will
be compared to the simulation and measurement results in next section. A noise analysis
with a noise model of the OTA is provided as well, which, to the best of our knowledge,
is the first time for regulated cascode OTAs. With minor changes, this noise analysis can
be applied to the other regulated cascode OTAs.
3.4.1 High-Frequency Analysis
Fig. 3-6(a) shows a high-frequency equivalent circuit of the left-half of the OTA in
Fig. 3-5(a), where the transistor parasitics are modeled with an input capacitance Cin and
impedances Z1~4 and Z9. The parasitics are determined using the generic MOSFET
transistor model shown in Fig. 3-6(b). The transistor’s body is isolated from the substrate
by an N well for a PMOS or a triple well for an NMOS, to allow for a source-body
connection. The equivalent circuit model in Fig. 3-6(a) can be simplified to the one
42
Chapter 3. High Frequency OTAs
Figure 3-6. (a) High-frequency equivalent circuit model of the left half of the OTA in Fig. 3-5, (b)
high-frequency MOSFET transistor model, (c) simplified circuit model of the proposed OTA.
43
Chapter 3. High Frequency OTAs
shown in Fig. 3-6(c) in order to obtain the OTA’s high-frequency transconductance and
input/output impedance.
In the circuit of Fig. 3-5(a), the top transistor T1 is modeled by a variable channel
resistance Rch1 in Fig. 3-6(a), because it operates in triode. Its RF current id1 is given by:
id 1   g m1vin  ,
(3-7)
where vin+ is one of the differential RF input signals and the transconductance gm1 can be
calculated using the following expression derived from the short-channel drain current in
the linear region [53],
gm 
dI d
V ds
W
 C ox
.
dV gs
L 1  V ds /( E sat L)
(3-8)
Transistor T2 in the PMOS cascode works in the saturation region and its RF current is
given by:
id 2   g m 2 v gs 2 ,
(3-9)
where vgs2 is the gate-source voltage, and the transconductance gm2 is calculated using
the equation,
gm 


dI d
E sat L
 v sat C oxW 1  (
)2  .

dV gs
V gs  Vt  E sat L 

(3-10)
As described in the previous section, the gate voltage of this PMOS device has an inverse
polarity relative to its source voltage vd1. If they are assumed to be exactly offset from
each other, its gate-source voltage vgs2 becomes –2vd1 and therefore (3-9) can be changed
to,
44
Chapter 3. High Frequency OTAs
id 2  2 g m2 vd1 ,
(3-11)
as illustrated in Fig. 3-6(a).
In a similar fashion, the RF currents in the NMOS cascode in Fig. 3-5(a) are given
by:
id 3  2 g m3 v d 4 ,
i d 4   g m 4 (vin   v d 9 ) ,
(3-12a)
(3-12b)
where vd4 and vd9 are the drain voltages of T4 and T9 respectively, as shown in Fig. 3-6(a).
gm3 can be calculated from (3-10) and gm4 from (3-8). Equation (3-12b) is different from
(3-7) because of the bottom transistor T9 used for DC biasing purposes, which is modeled
by the impedance Z9.
The four shunt impedances, Z1 to Z4, are used to model the high-frequency parasitics
of the cascode transistors. These impedances together with Z9 are given by:
Z 1  C ds1 //[ R dbs1  ( jC dbs1 ) 1 ] ,
(3-13a)
Z 2  Rch 2 // C ds 2 //[ R dbs 2  ( jC dbs 2 ) 1 ] ,
(3-13b)
Z 3  Rch3 // C ds 3 //[ Rdbs 3  ( jC dbs 3 ) 1 ] ,
(3-13c)
Z 4  C ds 4 //[ Rdbs 4  ( jC dbs 4 ) 1 ] ,
(3-13d)
Z 9  Rch9 // C ds 9 //[ Rdbs 9  ( jC dbs 9 ) 1 ] ,
(3-13e)
where Cds1~4 and Cds9 are the drain-source parasitic capacitances due to the interconnects
and the gate oxide. From the transistor generic model in Fig. 3-6(b), these capacitances
45
Chapter 3. High Frequency OTAs
can be calculated from:
C ds  C dsm //
1 / C gdm
1
1
//
,
 1 / C gsm 1 / C gdo  1 / C gso
(3-14)
where Cdsm, Cgdm, and Cgsm are parasitic capacitances due to the interconnects. Cgdo and
Cgso are the gate-drain and gate-source capacitances due to the gate oxide, and each is a
combination of the gate-channel capacitance (Cgc) and the gate-drain/gate-source overlap
capacitance (Cov) in Fig. 3-6(b) [56]. Rdbs1~4, Rdbs9, Cdbs1~4 and Cdbs9 in (3-13a)~(3-13e)
are the drain-source parasitics through the body as illustrated in Fig. 3-6(b). Rch1~4 and
Rch9 are the transistor channel resistances. In the case of Rch2 and Rch3, they are usually
large in the saturation region and can be ignored for the first-order approximation. The
channel resistances Rch1, Rch4, and Rch9 can be derived using,
 dI
Rch   d
 dVds



1

L
C oxW
1  Vds
( E sat L)
.
Vds2
(V gs  Vt )  Vds 
2 E sat L
2
(3-15)
Fig. 3-6(c) is a final simplified circuit model derived from Fig. 3-6(a). It has two RF
output currents from the PMOS/NMOS cascodes (ip and in), two output impedances (Zp
and Zn), and one input capacitance Cin.
The output currents can be derived from the equivalent circuit model in Fig. 3-6(a)
as (see Appendix A-1 for the derivation):
ip 
 g m1vin  ( Z1  2 g m 2 Z1 Z 2 )
,
Z 1  Z 2  2 g m 2 Z1 Z 2
46
(3-16a)
Chapter 3. High Frequency OTAs
in 
 g m 4 vin ( Z 4  2 g m3 Z 3 Z 4 )
.
Z 4  Z 3  2 g m3 Z 3 Z 4
(3-16b)
and from these current equations, the overall OTA transconductance is found to be,
g m,OTA 
iout   iout   (i p  in ) g m1 ( Z 1  2 g m 2 Z 1 Z 2 ) g m 4 ( Z 4  2 g m3 Z 3 Z 4 )



. (3-17)
vin   vin 
vin 
Z1  Z 2  2 g m 2 Z1 Z 2 Z 4  Z 3  2 g m3 Z 3 Z 4
Clearly, the OTA transconductance has an imaginary part due to the included complex
impedances and the significance of this will be discussed later. As a check, if all the
impedances in (3-17) are set to infinity, the transconductance becomes gm,OTA=gm1+gm4,
which is the expected result without parasitics.
As illustrated in Fig. 3-5(a), the OTA’s input vin+ is connected to the gates of the
transistors T1 and T4, so the input impedance Cin of the OTA seen at vin+ is mainly
capacitive (represented by Cin), and is given by:
C in  C g1  C g 4 ,
(3-18)
The capacitances Cg1 and Cg4 can be calculated using,
C g  (C gs  C gsm )  (C gd  C gdm )(1  G ) ,
(3-19)
where Cgs and Cgd are the gate-source and gate-drain MOS capacitances , and Cgsm and
Cgdm are the parasitic capacitances of the interconnects. G is the voltage gain between the
drain voltage and the gate voltage [55]:
 v
G  Re d
 v in 
47

 ,

(3-20)
Chapter 3. High Frequency OTAs
where vd refers to the drain voltage of T1 or T4, and can be computed using (A2)~(A6) in
the Appendix A-1. The second term in (3-19) is due to the Miller effect.
The total output admittance of the OTA using the equivalent circuit in Fig. 3-6(c) is:
Yout  1 / Z p  1 / Z n ,
(3-21)
where Zp and Zn are the output impedances of the PMOS and NMOS cascodes
respectively and they are given by (see Appendix A-2 for their derivations too),
Z p  2 g m 2 Z 2 ( Z 1 // Rch1 )  ( Z 1 // Rch1 )  Z 2 ,
(3-22a)
Z n  2 g m 3 Z 3 ( Z 4 // Rch 4  Z 9 )  ( Z 4 // Rch 4  Z 9 )  Z 3 .
(3-22b)
Equation (3-22a) suggests that the output impedance of the regulated cascode at high
frequencies is increased approximately by a factor of 2gm2Z2 compared to its commonsource stage. The linearity of the OTA is increased by a similar factor, which has positive
implications for large-signal operation. The 3-dB cutoff frequency of the OTA can be
estimated from the model in Fig. 3-6(c) using the open-circuit time-constants (OCs)
method [23]
h 
1
Rout (C out  C L )

1
1
Im(Yout ) /   C L 
Re(Yout )
.
(3-23)
where the OTA output is assumed to be connected to a capacitive load CL. If CL is the
input capacitance of the other identical OTA, this equation will give a cutoff frequency of
about fh=h /2=3.5GHz for the proposed OTA.
48
Chapter 3. High Frequency OTAs
3.4.2 Noise Analysis
The output noise of a basic cascode is mainly determined by its common-source
stage [57], [58], while a regulated cascode has different noise contributions due to the
feedback or feedforward mechanism. Little work has been devoted to the noise analysis
of the regulated cascodes, thus it is essential here to carry out an analysis of the proposed
feedforward-regulated OTA, which can be used to analyze the other regulated cascodes
with minor changes. Fig. 3-7 gives a thermal noise model of the OTA, where only the left
NMOS cascode and the right PMOS cascode are shown and each transistor is
accompanied with a channel thermal noise current, ignoring gate induced noise for
simplicity. The high-frequency parasitics (Z1~Z9) are also ignored. The channel thermal
noise current of each transistor is given by,
2
i n, x  4kT x g d 0, x f ,
(3-24)
where the subscript x denotes the specific transistor in question, and  and gd0 refer to its
bias-dependent factor and zero-bias drain conductance respectively. To determine the
noise current output from the left NMOS cascode, the two noise voltages at nodes vd4 and
vd5 are computed first:
2
2
2
(3-25a)
2
2
2
(3-25b)
v n, d 4  (i n ,3  i n , 4 ) / g m2 3 ,
v n, d 5  (i n,5  i n, 6 ) / g m2 6 .
In the above it is assumed that Rch4<<1/gm3 and Rch5<<1/gm6. The noise current output of
the left NMOS cascode is then,
49
Chapter 3. High Frequency OTAs
2
2
m3
2
2
2
in ,on  g (v n ,d 5  v n, d 4 )  in ,3  in , 4
2
g m2 3
2
2
 2 (i n,5  in , 6 )
g m6
(3-26)
where the noise current i n,3 2 is cancelled out due to its correlation with the current source
gm3(vd5-vd4) via vd4, which is denoted with a minus sign in (3-26). This is consistent with
the case of the basic cascode [57], [58]. Similarly the output noise current from the left
PMOS cascode (not shown in Fig. 3-7) is:
2
i n ,op  i n ,1
2
g m2 2
2
2
 2 (i n ,7  i n ,8 ) ,
g m7
resulting in a total output noise current on the left half of the circuit of,
Figure 3-7. Thermal noise model of the proposed OTA.
50
(3-27)
Chapter 3. High Frequency OTAs
2
2
2
2
2
in ,o  in ,on  i n,op
 i n,1  i n , 4 
g m2 2
g m2 3
2
2
2
2
(
i

i
)

(i n ,5  i n ,6 ) .
n,7
n ,8
2
2
g m7
g m6
(3-28)
Using (3-24), (3-28), and the simplified OTA transconductance without parasitics,
gm,OTA=gm1+gm4, the noise excess factor of the OTA can be determined,
NEF  i n,o
2
4kTg
m ,OTA
f     1 g d 0,1   4 g d 0, 4
g m2 3
 2 ( 5 g d 0,5   6 g d 0,6 )
g m6

g m2 2
 2 ( 7 g d 0,7   8 g d 0,8 )
g m7
( g m1  g m 4 ) .
(3-29)
which is a key parameter to determine the transconductor noise performance [59]. The
first two terms in the numerator of (3-29) are the noise contributions without regulation,
which is the case of the basic cascode, and the remaining two terms model the extra noise
contribution from the feedforward regulation. This extra noise contribution also exists in
other regulated cascodes.
3.5 Microwave Performance
Several circuits were fabricated in order to characterize the performance of the OTA
and to demonstrate its microwave capabilities. They were all implemented using a
standard 0.18-m CMOS process. The basic OTA cell measured 145 m x 67 m and
used a DC supply voltage of ±1.4 V.
3.5.1 Transconductance and Frequency Response
Because an OTA has a voltage input and a current output, it is not possible to do a
51
Chapter 3. High Frequency OTAs
direct microwave measurement of its transconductance (gm,OTA) using an S-parameter test
set. Therefore, the OTA was used to make the previously-described synthetic OTA
resistor [2] redrawn in Fig. 3-8(a) and by measuring the resistor’s reflection coefficient
(S11) with an S-parameter test set it is possible to find its input admittance using,
 1  S 11 

YR  Y0 
 1  S 11 
(3-30)
(a)
(b)
Figure 3-8. (a) Block diagram and (b) microphotograph of the fabricated OTA synthetic resistor
with pads (outlined by the black ring).
52
Chapter 3. High Frequency OTAs
and from this, the OTA transconductance can be approximated using |gm,OTA|Re(YR)
according to the previous description of this resistor. The justification for this approach to
find the transconductance is that a synthetic resistor is the simplest possible OTA circuit.
The imaginary part of YR can be used to determine the OTA input/output parasitic
capacitance. A microphotograph of the fabricated synthetic resistor under test is
illustrated in Fig. 3-8(b), where the input of this resistor was on the right with a G-S-G
port (coplanar-waveguide port) for its high-frequency measurement.
The OTA synthetic resistor was on-wafer tested using a probe station and an Agilent
8510C Network Analyzer with a 50-GHz Agilent 8517B S-parameter Test Set. At the
beginning of the S-parameter test, the network analyzer was calibrated down to the tip of
the coplanar-waveguide (CPW) RF probe using an SUSS MicroTec CSR-3 GSG100-250
calibration substrate, which has Open, Short, Load and Through terminals for the
calibration. The power of the network analyzer was set to -20 dBm. The obtained S
parameters from this test were then used to calculate the OTA’s transconductance and its
input/output capacitance. Fig. 3-9 and Fig. 3-10 show the calculated, simulated, and
experimental results for the transconductance and the input/output parasitic capacitance
of the OTA, and they match well with each other. The theoretical curves are calculated
using (3-17) in the previous section, the simulated results are using the Agilent ADS
package, and the measured curves are from the above synthetic resistor measurement. As
revealed in Fig. 3-9, the OTA can achieve a large transconductance of about 11 mS
throughout an ultra-wide band of 10 GHz. From Fig. 3-10, the input/output parasitic
capacitance CP of the fabricated OTA is about 0.13 pF.
53
Chapter 3. High Frequency OTAs
The effects of process variations and device mismatch on the OTA’s
transconductance and parasitic capacitance were also examined [60], [61], [62]. There are
two types of process variations, global and local. As per [62], global variations affect all
the devices on a single IC in the same manner, e.g., reducing the lengths of all MOSFETs
by the same amount, while local variations make the different performance of two or
more devices on the single IC, resulting in the device mismatch. Accordingly the device
mismatch is also called an intra-die variation sometimes. The device mismatch is more
harmful than the other process variations on the circuit performance and the process yield.
Therefore, it is often treated separately from the other variations in the previous studies.
A Monte Carlo simulation is specially designed to study the effects of process variations
and device mismatch in order to estimate the process yield in a statistic way [60], [61],
[62]. It is carried out here to examine their effects on the OTA’s transconductance and
parasitic capacitance. In the simulation, 1% deviation with a Gaussian distribution in the
transistor W/L ratio is applied to all devices. Both process-variation and device-mismatch
models were turned on in the simulation. Fig. 3-11 displays the simulated distributions of
the transconductance and parasitic capacitance concentrated on their most-expected
values. A comparison of the two distributions also reveals that the OTA’s
transconductance is less sensitive to the process variations and device mismatch than the
input/output parasitic capacitance.
Power-supply noise can also affect the performance of the OTA, especially at
microwave frequencies. Power-supply sensitivity was simulated on the OTA at different
frequencies and the results are listed in Table 3-1. In the simulation, a small signal is
54
Chapter 3. High Frequency OTAs
Figure 3-9. Proposed OTA’s transconductance (VC=-0.55V).
Figure 3-10. Input/output parasitic capacitance of the proposed OTA (VC=-0.55V).
55
Chapter 3. High Frequency OTAs
Figure 3-11. Distributions of the transconductance and the input/output parasitic capacitance with
1% deviations of W/L for all transistors in the Monte Carlo simulation (@2GHz).
added to a DC supply node which is then coupled to the circuit output. The coupling loss
is defined as a power-supply-rejection-ratio (PSRR). This coupling loss was obtained
using an S-parameter simulation. A higher PSRR suggests better circuit immunity against
the power-supply noise. As indicated in Table 3-1, at low frequencies this OTA has a
high PSRR of over 86 dB while at microwave frequencies the PSRR drops to 30-40 dB.
56
Chapter 3. High Frequency OTAs
This degradation is due to the increased power-supply noise coupling to the OTA’s
output at microwave frequencies by means of the parasitic reactance. To alleviate the
impact of the high-frequency PSRR degradation, on-chip shunt capacitors are usually
introduced at the DC power supply nodes on microwave ICs to create virtual RF grounds
at those points. This approach was used in the circuits that follow.
Table 3-1. Power supply rejection ratios (PSRR) from the simulation.
PSRR (dB)
@10MHz
@4GHz
PSRR+ (for
90.4
41.5
V ) PSRR- (for
86.2
36.9
V )
3.5.2 Power and Intermodulation Distortion
A single-stage fully-differential microwave amplifier shown in Fig. 3-12(a) was
specially designed to test the power and intermodulation distortion behavior of the OTA.
Fig. 3-12(b) shows a microphotograph of the fabricated amplifier equipped with two GS-G-S-G differential CPW ports for its input (top) and output (bottom). The IC measures
0.14 mm2 and dissipates 56 mW of DC power. In the schematic, a resistor feedback
network consisting of R2 and R3 is used to convert the current output of the OTA to a
voltage output, va. Two identical resistors, R1, were used for wideband input impedance
matching to the external 50-ohm measurement system and a pair of voltage followers was
used at the output also for impedance matching. The gain of this test amplifier can be
easily obtained by exploiting the symmetry of the circuit,
G
1  g m,OTA R3
vo 
v
 a 
.
vi  vi  1  g m,OTA R2
57
(3-31)
Chapter 3. High Frequency OTAs
(a)
(b)
Figure 3-12. (a) Schematic and (b) microphotograph of the single-stage differential amplifier.
Note that the voltage followers are assumed to be ideal in the derivation of (3-31), i.e.,
vo+=va. In the physical implementation, R2 = 300 Ω, R3 = 1500 Ω, and |gm,OTA|=11mS,
which give a gain of |G|=3.6V/V in theory. Now taking into account the actual voltage
loss through the followers, the total gain of the test amplifier is about 4.25 dB (see Fig. 313 below).
58
Chapter 3. High Frequency OTAs
An output power (Pout) versus input power (Pin) measurement was performed on the
test amplifier at 2.0 GHz in order to determine the output 1-dB compression point (P1dB)
of the OTA, which is a key linearity metric in microwave circuits along with the third
order intercept point (IP3). A 44-GHz Agilent E4446A PSA-Series Spectrum Analyzer
with a probe station and two differential Cascade Microtech GSGSG-100 probes was
used for the on-wafer P1dB test. A single-ended microwave signal from a 40-GHz
Anritsu MG3694A Signal Generator was divided using an external 180º hybrid for the
amplifier’s differential inputs and its differential output was combined using the other
external 180º hybrid. The hybrid, cable and probe losses were estimated by directly
connecting the input probe to the output probe with a differential Through line on a SUSS
MicroTec GSGSG100 calibration substrate before the test. These losses were thereafter
de-embedded in the P1dB test. The measured Pout versus Pin curve is shown in Fig. 3-13
and it reveals an input P1dB of -5.4 dBm with an output power of -2.5 dBm.
A two-tone test was also done to measure the intermodulation distortion of the OTA
and to determine its IP3, which is plotted in Fig. 3-14. The required two-tone input
signals were f1 = 1.99GHz and f2 = 2.01GHz from two 40-GHz Anritsu MG3694A Signal
Generators and an external power combiner was used to combine them and produce the
input for the same test setup as for the above P1dB test. All losses with the external
power combiner, the 180º hybrids and the cables were also estimated and de-embedded in
the IP3 test. The graph in Fig. 3-14 shows a high input IP3 (IIP3) of 6 dBm and a high
output IP3 (OIP3) of 8 dBm. In fact, the OIP3 of the OTA itself can be even better than
this because the single-transistor voltage followers in the test amplifier limit the output
59
Chapter 3. High Frequency OTAs
Figure 3-13. Measured P1dB compression point of the test amplifier in Fig. 3-12(a).
Figure 3-14. Measured IP3 intermodulation of the test amplifier in Fig. 3-12(a) with two-tone
signal inputs.
60
Chapter 3. High Frequency OTAs
IP3. The measured input P1dB and IIP3 above are well predicted by the simulations of
this amplifier, where they are -6.3 dBm and 6.2 dBm respectively.
3.5.3 Demonstration Circuits
Two larger circuits, each containing two OTAs, were designed and fabricated to
further demonstrate the superior microwave capabilities of the developed OTA: an active
inductor and a microwave oscillator. The latter was constructed using the former.
3.5.3.1 Active Inductor
The active inductor is created using the well-known topology illustrated in Fig. 315(a), where the proposed OTA is engaged. The ideal input impedance looking into this
active inductor according to the previous chapter is,
Z ind 
j C P
 j L ' .
g m,OTA1  g m,OTA 2
(3-32)
It is clear that the OTAs transform the parasitic capacitance, Cp, into an inductance
L=Cp/(gm,OTA1gm,OTA2). According to the previous section, the transconductances gm,OTA1
and gm,OTA2 have an imaginary part though due to the circuit parasitics at high frequencies.
Writing them in exponential forms with 1 and 2 as their phase angles respectively, (332) can be rewritten as,
Z ind 

jC P
g m,OTA1  e
 g m,OTA 2  e  j2
 j1
 C P sin(1  2 )  jC P cos(1  2 )
g m ,OTA1  g m,OTA 2
 R ' jL' .
(3-33)
61
Chapter 3. High Frequency OTAs
(a)
(b)
Figure 3-15. (a) Schematic and (b) microphotograph of the fabricated active inductor with pads
(outlined by the black ring).
The real part in (3-33) represents a negative resistance if 1 and 2 are small. This
negative resistance can be used to compensate the loss in the active inductor to achieve a
high Q factor and if the negative resistance is large enough then it can also be used to
implement an oscillator as described later. The imaginary part in (3-33) represents the
modified reactance of the active inductance L. Taking the other parasitic capacitance CP
on the right side of the impedance inverter into account, not shown in Fig. 3-15(a), the
active inductance becomes
62
Chapter 3. High Frequency OTAs
  2 L' C P
L  L'
2
 1   L' C P

  L' .


(3-34)
where L is obtained from (3-33).
The fabricated active inductor under test is illustrated in Fig. 3-15(b) with a CPW
port connected to its input on the right. The same on-wafer S-parameter test setup as for
the previous OTA synthetic resistor was used. The active inductance and its series
resistance were calculated from the measured S-parameters in this test. Fig. 3-16 and Fig.
3-17 show the inductance and series resistance from both the simulation and
measurement, where the simulations well predict the measurement results. The active
inductor can achieve a relatively constant inductance of about 4.7 nH up to 2.5 GHz at a
control voltage of Vc=-0.55V both from the simulation and measurement results. The
Figure 3-16. Inductance of the active inductor (Vc=-0.55V).
63
Chapter 3. High Frequency OTAs
Figure 3-17. Series resistance of the active inductor (Vc=-0.55V).
active inductance varies with the OTA control voltage Vc. A maximum inductance of 17
nH was measured at a control voltage of Vc=-0.66V, resulting in an inductance tuning
ratio of 1:3.6. The self-resonant frequency of the active inductor is about 3.1 GHz as seen
in Fig. 3-16. As predicted by (3-33), this active inductor can achieve zero series a or even
negative series resistance (shown in Fig. 3-17). Therefore, high-Q circuits can be realized
using this active inductor without any extra gain block. Extra gain blocks like the
negative-impedance circuit in [44] are usually used to compensate for the loss in circuits
such as oscillator and active filters, which however could reduce their operational
frequencies and increase their power consumptions. According to (3-33), the negative
series resistance is proportional to the frequency , which is verified in Fig. 3-17. At low
frequencies, the negative series resistance is not large enough to cancel out the
connection resistance, resulting in a positive resistance at those frequencies in the
64
Chapter 3. High Frequency OTAs
measurement. Compared to their passive counterparts, active inductors have relatively
high noise and low linearity, which are their drawbacks.
A Monte Carlo simulation was also carried out on the active inductance of the
fabricated OTA active inductor at 2 GHz with Vc=-0.55V. The result is shown in Fig. 318. It indicates that the active inductance has a better immunity against the process
variations and device mismatch compared to the OTA’s transconductance and
input/output parasitic capacitance in Fig. 3-11.
Figure 3-18. Distribution of the active inductance in Fig. 3-16 with 1% deviations of W/L for all
transistors in the Monte Carlo simulation (@2GHz).
3.5.3.2 Microwave Oscillator
Fig. 3-19(a) shows the implemented microwave oscillator using the above active
inductor and a small capacitor C0 to create its LC-tank. A voltage follower is placed right
65
Chapter 3. High Frequency OTAs
after the LC-tank to drive the external 50-Ohm load RL. The follower is a common-drain
transistor (T10) with a current mirror (T11 and T12) to bias T10. The required gain to start
and sustain the oscillation stems directly from the negative resistance of the active
inductor. This eliminates the need of any additional gain block and makes the design of
the oscillator simple and compact. The oscillation frequency is determined by the LCtank:
f VCO 
1
2 LC eq
,
(3-35)
where Ceq includes C0 and the parasitic capacitance from the following follower.
A microphotograph of the fabricated oscillator is presented in Fig. 3-19(b), and it has
a core size of only 400m x 260 m (excluding the bonding pads). The oscillator
consumes 95 mW of DC power from a battery power supply, which helps to stabilize its
oscillation frequency in its phase noise measurement. The Agilent E4446A PSA-Series
Spectrum Analyzer was used for the test. Fig. 3-20 shows the measured oscillation
spectral output at the fundamental tone with a resolution bandwidth (RBW) and a video
bandwidth (VBW) both of 1.8 MHz and Fig. 3-21 displays the measured wideband
spectral graph that includes the harmonic outputs with RBW=VBW=3MHz. As
illustrated, the fabricated oscillator operates at 2.89 GHz and delivers -8 dBm of
microwave power at this frequency. Due to the high linearity of the OTAs, the oscillator
exhibits 20 dB and 37 dB suppression of the second and third-harmonic outputs
respectively, as revealed in Fig. 3-21.
66
Chapter 3. High Frequency OTAs
(a)
(b)
Figure 3-19. (a) Schematic and (b) microphotograph of the fabricated active-inductor-based
oscillator.
67
Chapter 3. High Frequency OTAs
Figure 3-20. Measured output fundamental spectrum of the oscillator at VC=-0.55V.
Figure 3-21. Measured output harmonic spectra of the oscillator at VC=-0.55V.
68
Chapter 3. High Frequency OTAs
Fig. 3-22 depicts the oscillator frequency versus the OTA control voltage (Vc). The
oscillator fundamental output frequency can be tuned by almost 200 MHz from 2.7 GHz
to 2.89 GHz. This control voltage tunes the value of the active inductor and thereby
changes the LC tank’s resonant frequency. Fig. 3-22 also shows the output powers of the
fundamental, 2nd and 3rd harmonics (P1, P2, and P3) versus the control voltage. The
fundamental output power only varies between -7 dBm and -8 dBm, while the 2nd and 3rd
harmonics are lower than -27 dBm and -44 dBm respectively in this tuning.
Figure 3-22. Measured harmonic output powers and frequency versus the OTA control voltage.
The measured phase noise of the oscillator at 2.89 GHz is presented in Fig. 3-23. In
this measurement, the Signal-Track function of the spectrum analyzer in its phase noise
mode was turned on with Smoothing=4% and Filtering=VBW/RBW=0.1. Due to the high
Q factor of the active inductor, a very low phase noise (in the inductorless oscillator
69
Chapter 3. High Frequency OTAs
category) of –109 dBc/Hz, -116 dBc/Hz and –126 dBc/Hz is achieved at frequency
offsets of 100 KHz, 1 MHz, and 10 MHz respectively. This phase noise result is
approaching the minimum achievable phase noise for inductor-less oscillators [63].
A comparison between this oscillator and recent works reporting inductorless
oscillators in the similar microwave range [47], [48] is shown in Table 3-2, and it is clear
Figure 3-23. Measured phase noise of the oscillator at 2.89 GHz.
Table 3-2. Comparisons between this work and the recent works.
Oscillators using active inductors
CMOS Technology
Output Power (dBm)
DC to RF Power Efficiency (%)
100 KHz offset
Phase noise
(dBc/Hz)
1 MHz offset
10 MHz offset
This work
0.18 m
-7 to -8
0.21%
-109 @ 2.89
GHz
-116 @ 2.89
GHz
-126 @ 2.89
GHz
70
[47]
0.18 m
-14 to -22
0.14%
-78 @ 2.9
GHz
-102 @ 2.9
GHz
-122 @ 2.9
GHz
[48]
0.18 m
-21 to -29
0.03%
-60 @ 1.67
GHz
-90 @ 1.67
GHz
-90 @ 1.67
GHz
Chapter 3. High Frequency OTAs
that this oscillator outperforms the others regarding their output powers, power
efficiencies, and phase noises. Especially this work has much higher output power than
the others, suggesting its significant linearity improvement from using the developed
linear OTA. Except for the high Q factor of the active inductor, a high and stable voltage
supply is also considered as the reason for the better phase noise of this work.
3.6 Summary
A feedforward-regulated cascode OTA has been proposed, analyzed, and
experimentally demonstrated in this paper that can operate at very high frequencies. The
OTA has a large transconductance and it also has high linearity and low intermodulation
distortion, which makes it very suitable for implementing numerous types of microwave
integrated circuits. An active inductor and a microwave active-inductor-based oscillator
were designed for demonstration purposes using the OTA in this work, and the latter can
achieve a relatively large output voltage swing with a very low phase noise. More
complicated microwave applications using the developed OTA are explored in next
chapters.
71
Chapter 4 Wide Tuning-Range Bandpass Filter
— OTA Application I
4.1 Introduction
The first microwave application of the developed high-frequency OTA is an active
bandpass filter, which will be described in this chapter [64]. It employs a novel coupledresonator topology with identical OTA active inductors to realize narrowband filtering.
Due to the tunability of the developed OTA, the fabricated active bandpass filter has a
wide tuning range from 1.56 GHz to 2.07 GHz with sharp cutoff stopbands and relatively
flat passbands in the experiment. It is the smallest MMIC filter reported to date and its
power consumption is only 41 mW, which compares very favorably with previous
coupled-resonator active filters. Whereas the previous works used various expensive IIIV technologies, this work, to the best of our knowledge, is the first in CMOS.
Bandpass filters are needed in wireless communication and broadcasting systems,
where they can be placed in the front-end of a receiver after its low-noise amplifier (LNA)
to remove interfering RF signals and noises. They are also found in many wired systems
for the same purpose, such as cable TV networks and internet. To reduce the weight and
cost of such systems, miniaturization of their devices including bandpass filters is
desirable. Monolithic-microwave-integrated-circuit (MMIC) is one promising technique
for this purpose.
RF/microwave bandpass filters are traditionally implemented using passive
components, such as surface-acoustic-wave (SAW) filters [65] and inductor-capacitor
72
Chapter 4. OTA Application I
(LC) filters [43], [66]. SAW filters are well-known to have low insertion-losses, flat
passbands and sharp cut-off stopbands, and are able to work up to 3 GHz. For instance, a
commercial 1.855-GHz SAW filter from [65] has a small insertion loss of about 2.2 dB in
its 60MHz passband and more than 45-dB stopband suppression at 45-MHz offset from
its 3-dB cutoff frequencies. However, SAW filters can not be integrated because they call
for electromechanical (piezoelectric) crystals which have to be single stand-alone devices.
For LC filters, although it is possible for them to be implemented using the MMIC
technique, they require prohibitively large chip areas for their inductors, especially at low
GHz frequencies where large-value inductors are usually used. Moreover, their
requirement for high-Q inductors prevents them from being implemented on silicon,
which excludes the favorable option of being integrated with digital circuits, i.e., the
system-on-chip (SoC) option. Therefore, currently most MMIC LC filters are
implemented using lossless technologies at much higher microwave frequencies, while
off-chip SAW filters still dominate applications at the low GHz frequencies.
In order to implement bandpass filters on silicon, active filters are an attractive
solution, which occupy much smaller chip areas and have high Q factors. Meanwhile,
they have frequency electronically-tuning properties which are very useful for
reconfigurable or software-defined radio systems [67], [68], [69]. Active filters are
usually noisy, but by putting them after the LNA in a receiver, their noise contribution to
the whole system can be minimized.
The developed active bandpass filter in this chapter employs a new topology derived
from a coupled-resonator filter topology, which originates from a ladder filter topology.
73
Chapter 4. OTA Application I
The previous ladder-filter and coupled-resonator-filter topologies are studied below in
order to develop a faster way to obtain the proposed filter topology. Meanwhile, the
problems in CMOS passive implementations of the two topologies are presented for a
better understanding of the advantages of the designed active bandpass filter, especially
in narrow-band filtering.
4.2 Topology Considerations
4.2.1 Ladder Filter Topology
The designed active bandpass filter is originally from an LC bandpass ladder filter.
LC Ladder filters are developed using an insertion loss method and are preferable over
other LC filters in that they have higher degree of control over their passband and
stopband amplitude and phase characteristics [43]. The bandpass ladder filter design
starts from a lowpass ladder filter prototype as shown in Fig. 4-1 [43], [66]. Its
component values gk (k=1 to N) are either inductances or capacitances. These component
values are normalized by the source impedance (Z0) and the lowpass filter cutoff
frequency (c).
According to the ladder filters’ passband and stopband characteristics, there are two
most popular ladder filters: Butterworth filters and Chebyshev filters, which have
different normalized component values gk. Butterworth filters have maximally flat
passbands but mild cut-off, while Chebyshev filters have sharper cut-off but rippled
passbands [43], [66]. A Butterworth filter is selected for the design in this thesis, so its
normalized component values with the filter order N=1 to 10 are listed in Table 4-1 for
74
Chapter 4. OTA Application I
the design convenience here. Similar tables for the Chebyshev filters with different
ripples can be obtained from [43], [66]. For higher-order ladder filters, Appendix A-3 can
be used to obtain their normalized component values.
Figure 4-1. Low-pass ladder filter prototype with normalized component values gk after [43], [66].
Table 4-1. Normalized component values for Butterworth lowpass filters (g0=1, c=1, N=1 to 10)
after [43], [66].
N
g1
g2
g3
g4
g5
g6
g7
g8
g9
g10
g11
1
2.000 1.000
2
1.414 1.414 1.000
3
1.000 2.000 1.000 1.000
4
0.7654 1.848 1.848 0.7654 1.000
5
0.6180 1.618 2.000 1.618 0.6180 1.000
6
0.5176 1.414 1.932 1.932 1.414 0.5176 1.000
7
0.4450 1.247 1.802 2.000 1.802 1.247 0.4450 1.000
8
0.3902 1.111 1.663 1.962 1.962 1.663 1.111 0.3902 1.000
9
0.3473 1.000 1.532 1.879 2.000 1.879 1.532 1.000 0.3473 1.000
10
0.3129 0.908 1.414 1.782 1.975 1.975 1.782 1.414 0.908 0.3129 1.000
75
Chapter 4. OTA Application I
Table 4-2. Direct transformation of a bandpass ladder filter from its low-pass ladder filter
prototypes in Fig. 4-1 after [43].
Figure 4-2. 2.1-GHz 3rd-order Butterworth bandpass filter with a 30-MHz bandwidth.
Fig. 4-1 and Table 4-1 are then used to design the bandpass ladder filter. A bandpass
filter direct transformation from the low-pass filter prototype in Fig. 4-1 is given in Table
4-2, revised from [43] with Z0 added. As indicated, the series inductors are transformed
into series LC resonators, while the shunt capacitors are transformed into shunt LC
resonators. Fig. 4-2 gives a design example for a 3rd-order 2.1-GHz bandpass filter with
76
Chapter 4. OTA Application I
a 30-MHz bandwidth to study the ladder filter performance. The higher order a ladder
filter has, the sharper cut-off it possesses, but at the expense of more components.
Therefore, the 3rd-order is selected here as a compromise.
The designed ladder filter is simulated at different inductor Q factors, since its LCresonator loss mainly comes from its inductors if it is implemented in CMOS technology.
The inductor Q factor is obtained by changing the series resistance RS in a simplified
inductor model shown in Fig. 4-3(a) for all the inductors. This filter can ideally realize a
low insertion-loss and a flat passband with an infinite inductor Q factor, as visible from
its simulated transmissions in Fig. 4-3(b). However, as the inductor Q factor decreases,
the passband is rounded and the insertion loss increases dramatically. For instance, the
insertion loss is over 30 dB at inductor Q=20 in Fig. 4-3(b). This Q factor is even not
possible for CMOS implementation because a spiral inductor on a lossy silicon substrate
usually does not have a Q factor over 12. This critical situation explains why most MMIC
LC ladder filters had to be implemented using more expensive technologies, such as
GaAs before.
One more problem with this filter is that the series components have quite different
values from the shunt components of the same type, either inductors or capacitors. This
results in some prohibitively large component values for IC implementations such as
L2 =530.5nH and C 1 =C 3 =106.1pF, and some too-small component values such as
L1=L3=54.13pH. According to the transformation in Table 4-2, the difference between
the series and shunt components of the same types is 1/Δ2 times if the difference of the
normalized values (gk) is ignored. This means a 4900x difference between the series and
77
Chapter 4. OTA Application I
shunt component values in the filter in Fig. 4-2 because its Δ is 1/70. This is the major
cause of the impractical component values above. The component values are also
affected by the center frequency 0 and Z0 indicated in Table 4-2. The center frequency
0 as well as the bandwidth (0Δ) cannot be changed to solve the problem above,
because these two parameters are usually set before. A system impedance higher than
(a)
(b)
Figure 4-3. Simulation results of the designed bandpass ladder filter: (a) simplified inductor
model to obtain the inductor Q factors in the simulations and (b) simulated transmissions at
different inductor Q factors.
78
Chapter 4. OTA Application I
Z0=50Ω with additional input/output matching networks can be used to compensate the
small Δ, but only solves part of the problem, because according to Table 4-2, this
compensation can only be applied in the shunt resonators to make their inductances and
capacitances realizable (e.g. L1C1 and L3C3 in Fig. 4-2). In the series resonators (e.g. L2C2
in Fig. 4-2), the higher system impedance makes the inductances and capacitances more
impractical according to the same table. An LC coupled-resonator filter topology will be
described next, which is derived from this ladder filter topology and can solve the
implementation problem.
4.2.2 Coupled-Resonator Filter Topology
To obtain a coupled-resonator filter, all series LC resonators in a ladder filter are
transformed to shunt LC resonators that are identical or almost identical to other shunt
LC resonators, so that it can eliminate the impractically different component values
between the series and shunt resonators in the ladder filter [66]. Together with the
mentioned higher inner system impedance, a coupled-resonator filter can offer the most
freedom in the selection of its component values.
Before the series-to-shunt resonator transformation from a ladder filter, a proper high
inner system impedance Z0i has to be selected to make its shunt resonators realizable
according to [66]. It requires a recalculation of its all component values. After the
component recalculation, -section capacitive impedance inverters are used to
accomplish the transformation. Fig. 4-4(a) shows the transformed coupled-resonator filter
example from the previous ladder filter in Fig. 4-2 using two identical impedance
inverters at both sides of a new shunt resonator L2'C2', the transformed shunt resonator.
79
Chapter 4. OTA Application I
Figure 4-4
80
Chapter 4. OTA Application I
The capacitors Cc in the impedance inverters should meet a requirement [66]:
1
 Z 0i ,
 0 CC
(4-1)
where Z0i is the inner system impedance. The two impedance inverters “invert” the shunt
resonator L2'C2' to emulate the impractical series resonator L2C2 in the previous ladder
filter, realizing the series-to-shunt resonator transformation. The negative capacitors (-CC)
in the impedance inverters do not exist in reality and have to be absorbed by their
adjacent positive capacitors, as indicated by the arrows in Fig. 4-4(a). The new shunt
resonator L2'C2' can be obtained using the following equations [66]:
2
(4-2a)
Lshunt  Z 0i C series ,
(4-2b)
C shunt  Lseries / Z 0i ,
2
which give the transformation between the series resonators in a ladder filter and the
shunt resonators in a coupled-resonator filter. Alternatively, a direct transformation of a
coupled-resonator filter from the original lowpass ladder filter prototype (gk) can be used
to save design time. This can be obtained by combining (4-2) and Table 4-2 with all Z0
replaced by Z0i, resulting in a new table, Table 4-3 for the direction transformation. This
table will be used in the following active filter design.
The new table also facilitates the examination of the transformed resonator here.
Note that the transformed shunt resonator has exactly the same transformation
expressions as the other shunt resonators, suggesting that all the shunt resonators
in clu din g L 1 C 1 , L 2 'C 2 ', and L 3 C 3 in Fi g. 4 -4 (a) can b e co mput ed usi n g
81
Chapter 4. OTA Application I
Table 4-3. Transformation of a bandpass coupled-resonator filter (before adjacent-component
absorption) directly from its low-pass ladder filter prototype in Fig. 4-1.
the same expressions below:
L
C
Z 0i 
,
0 g k
(4-3a)
gk
,
Z 0i  0 
(4-3b)
where gk refers to the normalized component values in Table 4-1. This means that the
previous impractical series resonator L2C2 is impedance-inverted to the practical shunt
resonator (L2'C2') that is almost identical to the other realizable shunt resonators L1C1 and
L3C3 in the coupled-resonator filter in Fig. 4-4(a), except for their different gk. This
series-to-shunt resonator transformation together with the inner-system-impedance
method completely solves the impractical component problem with the ladder filter.
Due to the higher inner system impedance Z0i, two identical input/output matching
82
Chapter 4. OTA Application I
networks (LmCm) are required to match Z0i to the outer one Z0=50Ω, as shown in Fig. 44(a). The required Lm and Cm can be determined by:
Lm 
Cm 
Z 0i
0
Z0
,
Z 0i  Z 0
1
 0 Z 0 ( Z 0i  Z 0 )
(4-4a)
,
(4-4b)
where Lm will be absorbed by the adjacent inductors as well.
After the transformation and adjacent component absorption above, the final filter in
Fig. 4-4(b) only contains shunt resonators coupled by capacitors, so named a coupledresonator filter. It is a reciprocal filter due to its structure symmetry, a property of a
Butterworth-type filter. The shunt resonators are slightly different because of their
different gk and the adjacent-component absorptions. This is illustrated by a design
example with its real component values shown in Fig. 4-4(b), which are obtained with an
inner system impedance Z0i=1980Ω and the same design parameters (0, Δ, and gk) as the
previous ladder filter design example. The component values in Fig. 4-4(b) now are more
practical for IC implementations.
Fig. 4-5 displays the simulated transmissions of this filter example at the same
inductor Q factors as the previous one for a comparison. The same inductor model is used
in this simulation. One can see that this coupled-resonator filter can realize almost
identical passband performance as the previous ladder filter in Fig. 4-3(b). The high
insertion-loss problem in respect of the inductor Q factor still exists though with this filter.
Besides the inductor Q factor, this high insertion-loss problem is also related to the
83
Chapter 4. OTA Application I
parameter Δ, or the bandwidth for a fixed center frequency. The insertion-loss can be
reduced as the parameter Δ or the bandwidth increases. However, it is found that the
insertion-loss is still over 10 dB for a 3rd-order coupled-resonator filter with a design
bandwidth of 200 MHz at 2.1GHz at its inductor Q=20. This makes it impossible for
CMOS passive implementations of narrow-band filtering.
Figure 4-5. Coupled-resonator bandpass filter transmissions at different inductor Q factors from
simulations.
4.3 Active Bandpass Filter Design
Active filters are an attractive solution for the realization of CMOS MMIC bandpass
filters because they have very high-Q active inductors and thus do not have the high
insertion-loss problem with the passive ladder or coupled-resonator filters talked above.
84
Chapter 4. OTA Application I
Moreover, they have attractive tuning properties for reconfigurable or software-defined
radio systems [67], [68], [69]. The selected coupled-resonator topology not only
eliminates the impractical component values and provides the most freedom in their
component selections as previously discussed, but also eases the active inductor design
because only single-ended active inductors are required in it. Previous research [71]~[75]
on MMIC filters have validated the coupled-resonator topology as a viable approach for
tunable active filters.
The proposed active filter topology in this thesis is similar to the coupled-resonator
filter topology above, but with better tuning and narrowband filtering properties. It
employs the previous 3rd-order coupled-resonator bandpass filter topology, but with
three identical active inductors, resulting in a new topology as illustrated in Fig. 4-6(a).
Each of the three shunt resonators consists of a virtual shunt inductor (LP1 or LP2) and a
shunt capacitor (CP1 or CP2), which can be calculated using Table 4-3 above. The
different shunt inductor values (LP1 and LP2) are realized by connecting two different
series capacitors (CS1 and CS2) of appropriate sizes to the identical active inductors (AI)
respectively, so that the reactance of each series capacitor subtracts a small amount from
the reactance of each active inductor, which leads to the effective shunt inductance of,
LP1, P 2  L AI 
1
 C S1, S 2
2
(4-5)
where LP1,P2 refers to the inductor LP1 or LP2, and CS1,S2 the series capacitor CS1 or CS2.
LAI is the inductance of the identical active inductors. The topology here differs from the
work in [73] which had different active inductors with large series capacitors connected
as their DC blocks and had a fixed operation frequency.
85
Chapter 4. OTA Application I
Figure 4-6. (a) Active MMIC bandpass filter using a coupled-resonator topology, and (b) tunable
active inductor using two high-speed OTAs.
86
Chapter 4. OTA Application I
The use of the identical active inductors here has three benefits: a) any variations in
the component values of the active inductors during fabrication will be consistent
throughout the filter and can be more easily mitigated, b) it makes the frequency tuning
of the filter much more effortless because the resonant frequencies of all the resonators
can be simultaneously varied using a single control voltage of their three identical active
inductors, and c) the inductance-subtraction method using CS1 and CS2 above makes the
available LP1 and LP2 more frequency-dependent, which narrows down the filter’s
bandwidth, indicating that an initial bandwidth wider than the designed bandwidth can be
applied in the derivation of its original coupled-resonator filter topology. This reduces the
parameter Δ and alleviates both the impractical-component problem and the high
insertion-loss problem related to this parameter. It makes it easier to design a narrowband
filter, which will be demonstrated below.
The active bandpass filter design starts from the active inductor design in Fig. 4-6(b).
The developed OTAs are used in this active inductor topology. The transistor sizes of the
OTAs are adjusted to get the proper tuning range of active inductance for the designed
filter. After the available values of active inductors and on-chip capacitors are roughly
known, the direct transformation developed in the previous section for the coupledresonator filter is used to calculate the exactly required shunt-resonator values from gk in
Table 4-1. The same filter parameters (0 and gk) as in the previous design examples are
chosen in the calculation, except for an initial wider bandwidth and a different inner
system impedance. The active filter will be designed to have the same final bandwidth
though. Once the required shunt inductors (LP1 and LP2) are determined, Appropriate-size
87
Chapter 4. OTA Application I
series capacitors CS1 and CS2 are designed to gear the available inductance to the required
values according to (4-5). The design process above has to be run back and forth in order
to optimize the filter performance including passband/stopband performance, frequency
tuning, and power consumption. A 200-MHz initial bandwidth and a 1120-Ω inner
system impedance are finalized to obtain the final component values given in Fig. 4-6(a).
Fig. 4-7 and Fig. 4-8 show the simulation results of the designed filter with three
ideal inductors LAI and three active inductors replacing LAI respectively. Fig. 4-7 clearly
shows the bandwidth shrinkage from its initial bandwidth of 200 MHz to a new
bandwidth of 60 MHz because of the mentioned inductance-subtraction method. The
bandwidth further shrinks to the designed 30 MHz in Fig. 4-8 with the three designed
Figure 4-7. Simulation result with three ideal inductors for LAI in the filter: filter transmission
(S21) and return loss (S11).
88
Chapter 4. OTA Application I
Figure 4-8. Post-layout simulation result with the three designed active inductors for LAI in the
filter: filter transmission (S21) and return loss (S11).
active inductors. The frequency-dependent active inductance of the active inductors
accounts for this further shrinkage. The simulation result in Fig. 4-8 represents the
superior performance of the designed active filter for narrowband filtering. Compared the
insertion-loss in Fig. 4-8 (about 1 dB) to those of the previous design examples, the
designed active inductor has a Q factor much more than 100 in its simulation. Active
implementation of the filter usually results in high noise and low linearity. A noise figure
of 30.5 dB and an input P1dB below -20 dBm was observed for the designed active filter
in the simulation.
4.4 Experimental Demonstration
The active bandpass filter was designed and fabricated using 0.18-m CMOS
technology. A microphotograph of the fabricated filter is presented in Fig. 4-9. The filter
89
Chapter 4. OTA Application I
measures 520x540 m2 or 0.28 mm2 including bonding pads, resulting in an ultracompact size compared to the previous works (see Table 4-4 at the end). The coupling
capacitors (CC) and the series capacitors (CS1/CS2) were implemented using MOS
varactors to give an extra degree of freedom for tuning and process variation
compensation. Metal-insulator-metal (MIM) capacitors were used for the other capacitors.
The filter consumes 41 mW of DC power on average in the test.
Figure 4-9. Microphotograph of the fabricated bandpass filter.
The active inductor’s control voltage VC was selected to tune the filter’s center
frequency during the following S-parameter test, which has the same setup for the
network analyzer as described in the previous chapter. As shown in Fig. 4-10, a very
wide tuning range of the center frequency from 1.56 GHz to 2.07 GHz was achieved
from the S-parameter test, i.e., a 0.51-GHz or 28% frequency tuning range. The upper
limit, 2.07 GHz is very close to the simulated frequency. The insertion loss at the centre
90
Chapter 4. OTA Application I
frequency varies from 3.5 dB to 6.6 dB over the tuning range. Comparing this insertion
loss to those of the previous design examples, the active inductor Q factor is still beyond
100 in this measurement. Furthermore, a highly symmetric frequency response about the
center frequencies and sharp cutoff in the stopbands are achieved, which agree very well
with the simulation results. The achieved narrow bands (20 ~ 30 MHz) in this test
confirm the novelty of the proposed filter topology for narrowband filtering.
Figure 4-10. Measured transmissions at different control voltages VC.
Fig. 4-11 presents the center frequency versus the frequency tuning voltage V C also
from the S-parameter test. The tuning is quite linear from 1.56 GHz to 2 GHz, about 86%
of the total tuning range, and it starts to saturate beyond 2 GHz. Fig. 4-12 displays a more
clear view of its transmission and input reflection coefficient at a center frequency
91
Chapter 4. OTA Application I
fc=1.96GHz for further study. It shows stopband suppression over 30 dB at 60-MHz
offset from its center frequency. The input reflection coefficient is less than -6 dB and the
output reflection coefficient is close to this input one because of the reciprocal filter
structure. The deviation of the input/output matching capacitors (C m) is considered as the
cause of the moderate input/output reflection coefficients.
Figure 4-11. Measured center frequency versus the frequency tuning voltage VC.
A performance summary of this filter and the previous active filters using coupledresonators are shown in Table 4-4 for comparison. The filter in this work is the smallest
of all by at least a factor of 5, and it has the second largest tuning range. The power
consumption of this filter (41 mW) compares very favorably with the other coupledresonator active filters in Table 4-4. Furthermore, this filter is the first of its type in a
digital CMOS technology, with a capability of integration with digital circuits.
92
Chapter 4. OTA Application I
Figure 4-12. Measured transmission and input reflection coefficient at fc=1.96GHz.
Table 4-4. Active bandpass filter performance summary and comparison.
Ref.
Center
Freq
(GHz)
Tuning
Range
(GHz)
Size
(mm2)
DC
Power
(mW)
Coupled
Resonators
Technology
[71]
1.8
0.20
2.4
704
2
GaAs FET
[72]
2.27
0.86
4.96
300
3
[73]
2.0
0
5.5
--
3
[74]
4.7
0
--
150
2
[75]
2.32
0.22
1.44
25
3
This
Work
1.82
0.51
0.28
41
3
93
1-m GaAs
MESFET
GaAs
MESFET
0.5-m GaAs
MESFET
GaAs/AlGaAs
HBT
0.18-m
CMOS
Chapter 4. OTA Application I
4.5 Summary
Active filters are a good solution in solving the high insertion-loss problem with
high-order bandpass filters in their CMOS MMIC implementations. A very wide tuningrange MMIC active bandpass filter with a novel topology for narrowband filtering has
been experimentally demonstrated using CMOS technology for the first time, which
outperforms the previous active filters regarding their tuning range, size and DC power
consumption together, despite expensive lossless technologies used for the previous
active filters. The designed filter is a good candidate for applications in current wireless
reconfigurable multi-band systems.
94
Chapter 5 ISM-Band Variable Phase Shifter
— OTA Application II
5.1 Introduction
There are many microwave LC circuits other than the described bandpass filter that
can be implemented using the developed OTA. An ultra-compact MMIC active variable
phase shifter in the 2.4-GHz ISM band is one example, which will be described here and
is the second application of the developed OTA after the bandpass filter [76].
With more and more multimedia services integrated in portable devices, the demand
for high data rates in current wireless communications is increased rapidly. The limited
radio-frequency bandwidth, however, presents a bottleneck for the data rates to be further
increased in such communication systems. Recently multiple-input multiple-output
(MIMO) technology [77]–[80] has attracted much attention because it can offer
significant increases in data rates without any additional bandwidth. A wireless-localarea-network (WLAN) standard, IEEE802.11n, is currently under development to engage
this MIMO technology in 2.4-GHz ISM-band applications for very high data rates [81],
[82]. A typical WLAN MIMO system with its transmitter and receiver architectures is
shown in Fig. 5-1. It relies on a Spatial-Division Multiplex Access (SDMA) technique to
provide more channels without additional bandwidth. A key component in its transmitter
or receiver is a phased array, in which several variable phase shifters adjust the phases
(time delays) of the multiple antennas, in order to generate the spatial beams for
multiplexing. Since a MIMO system usually has high circuit complexity, MMIC
95
Chapter 5. OTA Application II
implementations of the required variable phase shifters becomes beneficial and essential
to such a system [83].
The developed MMIC variable phase shifter is a reflective-type phase shifter
consisting of a compact three-transistor active circulator and a second-order LC network.
The use of an active inductor in the second-order LC network makes this phase shifter
Figure 5-1. Typical MIMO system with its transmitter and receiver architectures.
all-active and ultra-compact, with a size of only 0.357 mm2 including bonding pads. The
phase shifter was designed and demonstrated at 2.4 GHz and has a linear and
continuously tunable range across the 2.4-GHz ISM band.
96
Chapter 5. OTA Application II
5.2 Overview of MMIC Phase Shifting Techniques
A few MMIC phase shifting techniques are reviewed here to study their suitability
for implementing 2.4-GHz ISM-band CMOS MMIC variable phase shifters. These
techniques can be categorized into four types as detailed below with some examples.
The first technique is the distributed-type (DT) phase shifter using transmission lines
[84], [85] or metamaterial transmission lines [86] with distributed loads, like the one
illustrated in Fig. 5-2. By switching/tuning the distributed loads along the transmission
lines, digital or analog variable phase shifters can be realized. This technique requires a
transmission line with its length proportional to the signal wavelength though, which
would result in prohibitively large die sizes for applications in the 2.4-GHz ISM band. A
slow-wave structure can be applied to reduce its size. Another alternative, as shown in
Fig. 5-3, is to cascade LC lumped elements to emulate the transmission line in Fig. 5-2 in
order to further reduce its size. However, given the large number of inductors, the
insertion loss might be prohibitive due to their low Q factors on silicon.
Figure 5-2. Typical distributed-type (DT) variable phase shifter.
97
Chapter 5. OTA Application II
Figure 5-3. Typical varactor-loaded LC variable phase shifter.
The second technique utilizes vector sum of two or more RF signals with orthogonal
phases. Depending on their signal directions, this technique can be further divided into
two sub-techniques: the forward-type phase shifter (FTPS) [88], [89] and reflective-type
phase shifter (RTPS) [90]–[92]. FTPS is also known as the vector-modulator phase
shifter. Traditionally these two sub-t ypes depend on couplers and power
dividers/combiners to split the input signal into multiple orthogonal-phase signals and
combine these signals at the output, as illustrated in Fig. 5-4 and Fig. 5-5 respectively.
The forward-type variable phase shift is realized by tuning the amplitudes of the
orthogonal signals before their combination at the output, while the reflective-type
operates by tuning the phases of the reflected orthogonal signals simultaneously before
their summation. The reflective-type is generally more compact since it uses the same
coupler for signal splitting and combining (the split signals in the coupler are reflected by
two identical tunable elements at the second and third ports, and combined into the forth
port in Fig. 5-5) while the forward-type has to depend on another coupler or combiner to
98
Chapter 5. OTA Application II
combine its split signals. In either sub-type of this technique, however, the use of
wavelength-proportional passive couplers or power dividers/combiners would also result
in a large die size at 2.4 GHz and limits its applications in this ISM band. Similar to the
first technique, these wavelength-proportional components can be replaced by lumpedelement couplers implemented by LC networks to reduce the phase-shifter sizes [93]–
[96]. Other nontraditional digital techniques also exist to implement these phase shifters
without using couplers and power dividers/combiners [97], [98].
Figure 5-4. Typical forward-type (FT) variable phase shifter using a coupler and a power
combiner.
Figure 5-5. Type reflective-type (RT) variable phase shifter using a single coupler.
99
Chapter 5. OTA Application II
Phase shifters that use an all-pass network (APN) fall into the third technique [99][101]. An ideal all-pass network has 0-dB transmission for all frequencies (i.e., the allpass property), so it is inherently suited for a phase shifter. Its phase-shift range depends
on the order of the LC network that it uses. A second-order all-pass network is the most
commonly used, from which a compact phase shifter can be expected because only one
LC resonator is involved [99]. Ideally, it has an all-pass transfer function,
0
2
s  0
Q
H ( s) 
,
0
2
2
s 
s  0
Q
s2 
(5-1)
where 0 and Q refer to the center frequency and Q factor of the LC resonator. This
transfer function gives the 0-dB constant magnitude and frequency-dependent phase shift:
H ( s )  1  0dB ,


 0
.
 ( s )  H ( s )  2 tan 1 
2
2 
Q
(



)
0


(5-2a)
(5-2b)
According to (5-2b), variable phase shift can be realized by changing the resonator
frequency 0. Practical designs of all-pass networks usually deviate from the above ideal
transfer function, and call for gain elements to compensate the loss due to the non-ideal
all-pass networks. Moreover, the non-ideal all-pass networks could also result in a gain
ripple, which presents a finite bandwidth for the phase shifters and could vary the
insertion loss in their phase shift tuning.
Variable phase shifters using active inductors were also developed and can be
100
Chapter 5. OTA Application II
categorized as the fourth technique. They have the same topologies as the previous three
techniques but with their inductors replaced by the active inductors. As mentioned in the
above techniques, lumped LC networks can be used instead of passive wavelengthproportional components to reduce the sizes of integrated variable phase shifters. These
networks, however, would still occupy a large chip area if they are implemented at 2.4
GHz because of the required relatively large-value inductors. The low Q factor with these
large-value inductors is the other problem when they are implemented on a lossy silicon
substrate. Active inductors in this case become a favorable solution because they can
provide high-Q inductance while keeping their sizes small compared to their passive
counterparts, which make the designed phase shifters more compact. Previous phase
shifters using active inductors can be found in [102], [103].
5.3 OTA-based Active Variable Phase Shifter
An ultra-compact reflective-type variable phase shifter using an active inductor and
an active circulator will be described here. Whereas another active-circulator phase
shifter was proposed in [104], only simulation results were given there without
experimental verification. Here we use the active circulator to isolate the input and output
signals, and a tunable second-order series LC network is then connected to the
intermediate port of the circulator to reflect the RF signal, resulting in the variable phase
shift.
5.3.1 Phase Shifter Design
Fig. 5-6 shows a block diagram of the proposed variable phase shifter. It is a
101
Chapter 5. OTA Application II
reflective-type phase shifter based on an active circulator, but does not use the previously
described vector-sum technique. The input RF signal is fed into Port 1 of the active
circulator from the left and transmitted to Port 2. An active-inductor-based LC secondorder network is then placed at Port 2 to reflect the RF signal to Port 3 on the right for the
output. The phase of the reflected RF signal can be varied by tuning the LC network, as
explained below. To simplify the derivation, we assume that the active circulator and the
LC network are both lossless. Furthermore, we neglect the fixed time delay and the effect
of the finite isolation among the three ports of the circulator. Thus, the transmission from
ports 1 to port 3 of the circulator equals to the input reflection of the LC network, which
is given by,
S 31 
Z LC  Z 0
,
Z LC  Z 0
(5-3)
where ZLC and Z0 refer to the LC-network impedance and the system impedance
respectively. ZLC is given by
Z LC  j (L  1 / C ) ,
(5-4)
which makes the transmission magnitude |S31| constant. Substituting (5-4) into (5-3) and
simplifying leads to an expression for the phase shift of the transmission,
 L  1 / C 
 .
  S 31    2 tan 1 
Z0


(5-5)
Equation (5-5) clarifies that tuning either L or C in the LC network can change the phase
shift.
102
Chapter 5. OTA Application II
Figure 5-6. Block diagram of the proposed variable phase shifter.
The active circulator used in this work is a full 3-port circulator, as illustrated in Fig.
5-7(a). It consists of three NMOS transistors connected end to end in a ring using three
capacitors CF. Each transistor is equipped with a negative feedback using a resistor RF
and is source-coupled to the other two transistors through a shared source resistor R S. The
three transistors are biased using the same DC voltage from the ports. Compared to the
other active circulators [105], [106], this three-transistor topology is the most compact.
The circulator topology in Fig. 5-7(a) was initially proposed and demonstrated using
bipolar transistors at a few MHz [107], and was later implemented at microwave
frequencies using GaAs FETs with high voltage supplies over 10 V [108], [109]. This
circulator was re-designed using CMOS technology with its voltage supply minimized to
VDD1=3.5 V in this work. Fig. 5-7(b) shows the simulated S parameters of the designed
active circulator. The transmissions between the three ports are flat across a wide band of
about 3 GHz centered at 2.4GHz. Within this band, the isolations and reflections of the
three ports are all less than –10 dB, resulting in a wideband circulator.
103
Chapter 5. OTA Application II
(a)
Figure 5-7. (a) 3-transistor active circulator using CMOS technology, and (b) it simulated S
parameters.
The LC network was designed using a varactor network (C) and an active inductor
(L), as illustrated in Fig. 5-8. The active inductor topology came from the active inductor
104
Chapter 5. OTA Application II
using the developed OTA in the previous chapters. The benefit of using the active
inductor here is obvious that it can make the phase shifter circuit all-active and thus ultracompact. The varactor network in Fig. 5-8 comprises a pair of varactors in a series
symmetric configuration. Their bias is completed through three high-value resistors and
the bias voltage VVAR. This bias voltage VVAR is used for the phase-shift tuning, i.e., the
varactors in the LC network are selected to tune the phase shift.
Figure 5-8. LC network with an active inductor.
5.3.2 Simulation and Experimental Demonstrations
A microphotograph of the fabricated variable phase shifter is presented in Fig. 5-9. It
was fabricated using 0.18-m CMOS technology, with an ultra-compact core circuit size
of 0.186 mm2 or 0.357 mm2 including pads. The active inductor is designed to have an
inductance of about L=8.5nH with a DC supply of 1.4V, and the varactor network has a
total capacitance of about C=0.5 pF. This results in a resonant frequency in the 2.4-GHz
105
Chapter 5. OTA Application II
ISM band for the designed LC network shown in Fig. 5-8. In the measurements, the
active inductor and the active circulator were first biased to achieve a transmission close
to 0 dB in the 2.4-GHz ISM band, and then the varactor network was used to tune the
phase shift. The active inductor and the active circulator consumed about 51 mW and 60
mW respectively.
Figure 5-9. Microphotograph of the fabricated variable phase shifter.
Fig. 5-10 presents both the simulated and measured phase shift versus its tuning
voltage (the varactor control voltage) at 2.4 GHz. The measured curve shows that a
smooth phase-shift tuning range of about 120º is achieved by changing the varactor
control voltage. This result is reasonably predicted by the simulation for the most part.
The simulated and measured transmission (insertion loss) and input reflection versus the
tuning voltage are presented in Fig. 5-11, where both the measured curves are close to the
simulated ones. The transmission varies from –5 dB to 0 dB from the measurement. The
change of the transmission versus the varactor control voltage reflects the contribution of
the varactor capacitance to the Q factor of the LC network, which depends on its inductor,
106
Chapter 5. OTA Application II
Figure 5-10. Simulated and measured phase shift versus the varactor control voltage at 2.4 GHz.
Figure 5-11. Simulated and measured transmission and input reflection versus the varactor
control voltage at 2.4 GHz.
107
Chapter 5. OTA Application II
capacitor, and parasitic resistor. This change can be reduced if a finer tuning of the
OTA’s control voltage VOTA is combined. The input reflection during phase-shift tuning
is lower than –10 dB, which is also predicted by its simulated curve.
A stability study of the variable phase shifter was carried out. According to [43], the
necessary and sufficient conditions for an unconditionally stable network are:
2
K
2
1  S11  S 22  
2 S12 S 21
2
 1,
  1,
(5-6a)
(5-6b)
where Δ=S11S22-S12S21. These two stability factors are plotted out in Fig. 5-12 for the
designed phase shifter. It shows an unconditionally stable region from 2.1 GHz to 2.5
GHz, which covers the 2.4-GHz ISM band.
Figure 5-12. Simulated stability factors K and || for the designed phase shifter.
108
Chapter 5. OTA Application II
To further investigate the performance of the variable phase shifter over the 2.4-GHz
ISM band, the phase shift versus frequency at different control voltages were measured
and the results are displayed in Fig. 5-13. As illustrated, the phase shift curve at each
control voltage is nearly parallel to the others across the band, with an average phaseshift tuning range of about 120. Moreover, the linear phase shift versus frequency in
each curve shown in Fig. 5-13 indicates a constant group delay of the designed phase
shifter in the 2.4-GHz ISM band. Fig. 5-14 and Fig. 5-15 present the measured
transmission and input reflection coefficients versus frequency with the same control
voltages. For all of these control voltages, the variation of the transmission coefficient is
less than ± 2.5 dB and the input reflection coefficient is lower than –10 dB over the 2.4GHz ISM band. The output reflection coefficient varies from -13 dB to -4 dB in the
above tuning over the same band.
The output power versus the input power at 2.4 GHz was measured and plotted in
Fig. 5-16 to characterize the linearity of this phase shifter, which shows an input P1dB of
about 6 dBm. The cable reconnection after the cable loss estimation accounted for the
higher insertion loss shown in this plot. At the same frequency, a noise figure
measurement was conducted with an Agilent 346C K01 Noise Source and the spectrum
analyzer in its noise figure measurement mode. The spectrum analyzer was calibrated
with the noise source directly connected to its input port. Thereafter, the phase shifter was
inserted between the noise source and the spectrum analyzer for the measurement. With
fixed input/output connection loss compensations at a room temperature of 24 ºC and a
bandwidth of 1 MHz set in the spectrum analyzer, a noise figure of 23.8 dB was
109
Chapter 5. OTA Application II
measured for the phase shifter, which is close to its simulated noise figure, 22 dB. This is
higher than that of those using passive networks/components, as seen in Table 5-1.
However, if this phase shifter is used in the output stage of a transmitter or after the LNA
of a receiver as shown in Fig. 5-1, then this noise figure is not very detrimental.
Simulations were performed to further understand the sources of this noise figure. The
source-coupled active circulator shows a noise figure of 11 dB (from its Port 1 to Port 3
with its Port 2 open). The noise analysis of this active circulator can be referred to [105].
This noise figure as well as the DC power consumption (Table 5-1) can be reduced if a
passive circulator is used, but in that case it would have to be off chip. The rest of the
noise contribution is from the active inductor.
Figure 5-13. Measured phase shift at different varactor control voltages (not in linear steps)
across the 2.4-GHz ISM band.
110
Chapter 5. OTA Application II
Figure 5-14. Measured transmission with the phase-shift tuning.
Figure 5-15. Measured input reflection with the phase-shift tuning.
111
Chapter 5. OTA Application II
Figure 5-16. Measured output power versus the input power.
Table 5-1. Performance summary and comparison of the previous works and this work.
Properties
Technology
Technique
Die size
(mm2)
Frequency
(GHz)
Phase shift
range
Max. Insertion
loss (dB)
Power
consumption
(mW)
Input P1dB
(dBm)
NF (dB)
This work
[87]
[94]
[95]
[99]
0.18μm
CMOS
all-active
RTPS
0.18μm
CMOS
0.18μm
CMOS
0.18μm
CMOS
0.3μm GaAs
DT
FTPS
RTPS
APN
0.357
2.76
---
1.08
1.0
2.4
2.4/3.5/5.8
2.4/5.5
2.4
2.4
120º
180º
360º (four
cascades)
105º
100º
5
6.6
-4
4.6
5
111
45
28.8
---
152
6
---
---
10
---
23.8
---
---
12
11.5
112
Chapter 5. OTA Application II
A performance summary and comparison of this work and the previous MMIC
variable phase shifters in the same band is shown in Table 5-1. Clearly this variable phase
shifter has much smaller die size than the other works. Its phase shift range, insertion loss
and input P1dB are all comparable to the others’.
5.4 Summary
In this chapter an MMIC reflective-type active variable phase shifter has been
presented which is the second application of the developed OTA. The variable phase
shifter is ultra-compact due to its all-active implementation using CMOS technology. It
employs an active circulator and an active LC network, where the circulator is very
compact, using only three transistors. The use of the OTA active inductor makes the
implemented phase shifter ultra-compact. The phase shifter described here is suited for
MIMO applications in the 2.4-GHz ISM band.
113
Chapter 6 Active MMIC Quasi-Circulator
— OTA Application III
6.1 Introduction
Thus far, the microwave OTA applications explored have involved active inductors.
In this chapter it will be demonstrated that OTAs are also suitable to make an active
MMIC quasi-circulator by means of their current summing function, which is very
different from the previous applications. The developed MMIC quasi-circulator
outperforms previous MMIC circulators regarding their signal directivities, chip sizes,
and DC power consumption.
Circulators are very common devices in microwave engineering and they are often
used to separate directional microwave signals, such as a diplexer. A circulator consists
of three ports, in which signals are propagating from port to port in one direction only. In
accordance with the signal propagation, there are two types of circulators, full circulators
and quasi-circulators. As shown in Fig. 6-1, a full circulator has a round signal circulation
from Port 1 to Port 2 to Port 3 back to Port 1 (P1→P2→P3→P1), while a quasi-circulator
has only part of the round circulation (P1→P2→P3). This difference can also be seen
from their ideal S-parameter matrices in Fig. 6-1, where S13 equals to 0 for the quasicirculator while it is 1 for the full circulator. Despites of the incomplete circulation of the
quasi-circulators, they are sufficient for the majority of applications requiring a
directional device.
Circulators are predominantly made using ferrite materials, in which directional
114
Chapter 6. OTA Application III
Figure 6-1. Full circulator and quasi-circulator with their ideal S-parameter matrices.
signal propagation occurs due to the nonlinear properties of the ferrite materials. Ferritebased circulators are unsurpassed in terms of power handling capability, which can range
from tens of Watts to over hundreds of Watts. Yet, there are various applications in
which high power operation is not required such as in the previous reflective-type phase
shifters and reflective amplifiers. Ferrite circulators are expensive items because they are
often individually tuned and tested before reaching the end users. Therefore, to increase
throughput and reduce manufacturing costs it is desirable to have solid-state, transistorbased, active circulators and quasi-circulators targeted at low power and small signal
applications, such as circulators using MMIC techniques. Previous MMIC circulators
demonstrated to date relied on GaAs FET or bipolar devices. They were either full
circulators [107]-[109] or quasi-circulators [110]-[113]. The MMIC full circulators in
[107]-[109] used three transistors in a feedback delta ring configuration and they required
voltage supplies of over 10 V, which limits their use in low DC power applications. The
MMIC quasi-circulators in [110]-[112] used a divider-combiner topology due to its
115
Chapter 6. OTA Application III
simple structure, while other quasi-circulators relied on passive transmission line
structures [113], which led to large chip sizes, thus making them less attractive from a
cost point of view.
In the rest of this chapter, the MMIC active quasi-circulator will be described. It
consists of an active balun and an in-phase current combiner using the developed OTA.
Due to the all-active implementation, the fabricated MMIC quasi-circulator has a
compact size of only 0.25 mm2, the smallest known to date. Experimental results show
that this circulator has transmissions close to 0 dB with directivities over 24 dB and all
input reflections lower than -10 dB, within a 3-dB bandwidth from 1.5 GHz to 2.7 GHz.
6.2 Quasi-Circulator Design
A block diagram of the proposed CMOS quasi-circulator is presented in Fig. 6-2. It
consists of an active balun and an in-phase current combiner. The latter comprises two of
the developed high-speed OTA, OTA1 and OTA2, which are identical in this quasicirculator design. The active balun converts any input signal at Port 1 (P 1) to two out-ofphase signals, 0o and 180o. One of these signals is taken as the output at Port 2 (P2) and
the other is connected to a broadband on-chip 50-Ohm resistor, R1, to balance out the
external 50-Ohm load at Port 2 and make the two out-of-phase signal paths symmetric to
each other. The broadband on-chip 50-ohm resistor is realized using a low-resistivity
polysilicon sheet in the CMOS process. After Port 2 and the resistor R1, the two out-ofphase signals are fed to the following in-phase current combiner, where the two identical
OTAs cancel out these out-of-phase signals at Port 3 (P3) so that the signal from Port 1
does not appear at Port 3, as desired. Practically the isolation from Port 1 to Port 3
116
Chapter 6. OTA Application III
depends on the amplitude and phase balances of the active balun and the symmetry of the
two out-of-phase signal paths including the two identical OTAs.
Figure 6-2. Block diagram of the CMOS MMIC quasi-circulator.
If there is an input signal at Port 2, the unilateral active devices in the active balun
will prevent this signal from flowing backward to Port 1. Instead, it will be fed to OTA 2
to generate a current at its output. Since OTAs have high output impedances, the effect of
the output impedance of OTA1 on the output current of OTA2 is negligible, and vice
versa. The input signal from Port 2 is also fed to the non-inverting input of the OTA1
through a resistor R3 as illustrated in Fig. 6-2, which produces a smaller current output at
OTA1 with its polarity inverted to that of OTA2, i.e., a negative feedforward current for
OTA2. This negative feedforward helps to flatten the gain of the OTA2. For balance
purposes, the other negative feedforward with R2 (R2=R3) and the non-inverting input of
OTA2 is added for OTA1. The resulting total current output of the OTA’s is converted to
117
Chapter 6. OTA Application III
a voltage signal at the gate of T1 through its gate capacitance and a gate-bias resistor R4.
A follower circuit composed of T1 and R5 is used to drive the external 50-Ohm load at
Port 3. This is the transmission from Port 2 to Port 3.
Lastly, any input signal to Port 3 will be dissipated in R 5 and the source of the
transistor T1, and will not travel backward to either Port 2 or Port 1 because of the low
reverse transmissions of the voltage follower, the OTAs, and the active balun, resulting in
high isolations from Port 3 to Port 2 and Port 1. A quasi-circulator is thus realized with
the transmissions and isolations described above.
The active balun in the quasi-circulator is designed using a common-gate commonsource (CG-CS) topology, as illustrated in Fig. 6-3. The CG transistor T2 and the CS
transistor T3 convert the single-ended input signal from Port 1 to the required out-ofphase signals. The use of the CG configuration at the input has an advantage of
broadband matching to the external 50-Ohm load at Port 1, which eliminates the need for
Figure 6-3. CG-CS active balun to generate the out-of-phase signals.
118
Chapter 6. OTA Application III
any input matching network. Two voltage followers T4 and T5 are also adopted at the
output of this active balun for the broadband matching to the external 50-Ohm load at
Port 2 and the 50-Ohm resistor R1 in Fig. 6-2. The input impedances of the following two
identical OTAs are high and can be ignored in the above broadband matching.
6.3 Experimental Demonstration
The designed MMIC quasi-circulator was implemented using 0.18-m CMOS
technology. Fig. 6-4 shows a microphotograph of the fabricated quasi-circulator. The
circulator chip measures a compact size of 686m x 366m or 0.25 mm2 due to its allactive implementation. Its total DC power consumption is 86 mW, which is much lower
than those of the other active circulators reported in [108], [112].
Figure 6-4. Microphotograph of the fabricated CMOS MMIC quasi-circulator.
Several two-port S-parameter measurements were conducted on the fabricated
circulator, with its unused port connected to an external 50-Ohm load every time. The
same S-parameter test setup was used as described in the previous chapters. The
measured transmissions from Port 1 to Port 2 and from Port 2 to Port 3 are plotted in Fig.
6-5. It can be seen that both transmissions are close to 0 dB, with S 21 varying from 1.5 dB
119
Chapter 6. OTA Application III
to 2.4 dB and S32 from 0 dB to -3 dB within a frequency range from 1.5 GHz to 2.7 GHz.
This results in a 1.2 GHz, or 57% bandwidth in the L-band and S-band. The difference
between S21 and S31 is caused by the different circuit implementations of these two
transmission paths. However, considering that an ideal quasi-circulator has unity gain (0
dB) in its forward transmission paths (S21 and S32), the transmissions achieved in this
work are closer to the desired 0 dB as compared with [108], [110], [112] (see Table 6-1 at
the end of this chapter). The isolation from Port 1 to Port 3 (S31) is also presented in Fig.
6-5 to characterize the power cancellation from Port 1 to Port 3. It shows a very high
isolation from 26 dB to 39 dB in the frequency range above, indicating the benefit of
using two out-of-phase signals and canceling them at the joined output of the two
identical OTAs. The measured input reflections of all the three ports are close to or lower
than -10 dB in the same frequency range, as illustrated in Fig. 6-6. Fig. 6-7 presents the
other measured isolations including S12, S13, and S23. They are all better than 21 dB
because of the high reverse isolation of the active devices. P1dB compression point was
also measured for the transmission from Port 1 to Port 2 at 2 GHz, which is the
transmitting path when the circulator is used as a diplexer. The same setup for the
previous P1dB test was used in this measurement. Fig. 6-8 presents the measured result,
with an input P1dB point f -6.4 dBm.
A performance summary and comparison of the previous works and this work are
listed in Table 6-1. Note that this work is the first circulator using CMOS technology
(except for the one designed in the previous chapter) while the previous works used GaAs
technology. The circulator in this work has the most compact size which is smaller than
120
Chapter 6. OTA Application III
the previous works by at least 3 times in the table. It also consumes the least DC power
among the works with their DC powers reported and has the best isolation (S 31) minimum
(Table 6-1). Furthermore, regarding the transmissions and directivities, this work also
shows favorable results compared to the previous works. The directivity is calculated by
S21/S12 and S32/S23 for the transmitting and receiving paths respectively.
Now compared to the three-transistor CMOS full circulator designed in the previous
chapter, this quasi-circulator has much better directivities and isolations since the
previous one has directivities and isolations close to 11 dB from its simulation. It
consumes slightly more DC power and chip area than the previous one though.
Considering the required circulation function, this quasi-circulator can replace the
circulator in the previous chapter for the variable phase shifter design.
Figure 6-5. Measured transmissions S21 and S32, and isolation S31.
121
Chapter 6. OTA Application III
Figure 6-6. Measured input reflections of the three ports.
Figure 6-7. Measured other isolations of the three ports.
122
Chapter 6. OTA Application III
Figure 6-8. P1dB compression point of the transmission from P1 to P2.
Table 6-1. Performance summary and comparison.
This work
[108]
[109]
[110]
[112]
Technology
CMOS
GaAs
GaAs
GaAs
GaAs
Circulator type
quasi-
full
full
quasi-
quasi-
Chip size (mm2)
0.25
1.1
2.25
0.9
5
DC power (mW)
86
294
--
--
650
Frequency range (GHz)
1.5 to 2.7
0.2 to 2
9.1 to 10.7
0.1 to 10
3.8 to 4.2
Transmissions
(dB)
S21
2.4 to 1.5
-6
0 to -3
-2.5 to -7
7.6
S32
0 to -3
-6
0 to -3
0 to -6
4
Minimum
Directivities
P1->2
27
18
12.5
31
32.6
(dB)
P2->3
24
18
12.5
26
17
Minimum Isolation S31
(dB)
26
24
15
10
22
P1dB for P1->2 (dBm)
-6.4@2GHz
--
--
123
-2 @3GHz 10.5@4GHz
Chapter 6. OTA Application III
6.4 Summary
An MMIC quasi-circulator was implemented using the developed OTA, which
together with the designed full circulator in the previous chapter, is the first time using
CMOS technology. This allows them to be easily integrated with other digital circuits to
miniaturize wireless communication systems. The designed quasi-circulator’s compact
size, small power consumption, high transmissions, and high directivities here make it
very suitable for microwave applications from L band to S band.
124
Chapter 7 Conclusions
7.1 Thesis Summary and Contributions
Previous OTAs seldom worked over 200 MHz. Therefore, pursuing new OTA
techniques that can break the previous frequency limit was a key objective of this thesis.
With a study of the previous feedback regulated-cascoding topologies, a feedforwardregulated cascode OTA that can operate up to microwave frequencies was proposed,
analyzed, and experimentally demonstrated in this thesis. The developed OTA has a large
transconductance with high linearity and low intermodulation distortion, which makes it
very suitable for implementing numerous types of microwave integrated circuits. The
OTA’s high-frequency and noise behaviors were studied with the derivations of their
circuit models. To the best of our knowledge, the noise analysis here is the first of its
kind on regulated cascode circuits and can be applied to the other regulated cascodes with
minor changes. The effects of process variations, device mismatch, and power supply
noise on the developed OTA were also analyzed. A microwave amplifier, an active
inductor and a microwave active-inductor-based oscillator were designed using the
proposed OTA to experimentally characterize its basic performance. The demonstrated
microwave oscillator has a larger output voltage swing and better power efficiency than
the previous oscillators of the same type. It also has a very low phase noise among the
inductor-less oscillators. The proposal, analysis, and demonstration of the developed
OTA are the first contribution of this thesis.
The thesis contributions also come from the three successfully-demonstrated
125
Chapter 7. Conclusions
microwave applications of the developed OTA. These applications include an active wide
tuning-range bandpass filter, a 2.4-GHz ISM-band variable phase shifter, and a
microwave active quasi-circulator, which are all in CMOS MMIC forms. All three
MMICs occupy much smaller chip areas than related previous work due to their active
implementations using the OTA.
The developed MMIC active bandpass filter has a 28% wide tuning-range around
1.8 GHz with sharp cutoff stopbands and relatively flat passbands. The proposed novel
coupled-resonator topology makes it superior for narrowband filtering. This filter is the
first CMOS high-order bandpass filter, which outperforms the previous active filters
regarding their tuning range, size, and DC power consumption together. Its size, in
particular, is 5 times smaller than the next smallest MMIC bandpass filter. The designed
filter is very suited for applications in current reconfigurable multi-band wireless systems.
The 2.4-GHz ISM-band active variable phase shifter developed here is ultra-compact
due to its all-active implementation, occupying only one-third of the chip area of those
using passive structures in the same band, while their variable phase shift ranges,
insertion losses, and P1dB are all comparable. This will greatly reduce the sizes of future
MIMO systems in the 2.4-GHz ISM band, as being developed under the IEEE802.11n
wireless standard.
The third application, active quasi-circulator is also the first one using CMOS
technology, together with the designed full circulator used in the variable phase shifter
above. Its size improvement is more than 3 times. This size advantage together with its
small power consumption, low insertion losses, and high directivities make it a good
126
Chapter 7. Conclusions
candidate for microwave applications in the L band and S band.
7.2 Future Work
The developed OTA is implemented using 0.18-m CMOS technology, which is a
well-commercialized and low-cost semiconductor process. This enables the low-cost
implementations of the developed OTA’s applications. To achieve higher frequency
operations in the future work, more advanced technologies can be applied to implement
the developed OTA, such as 65-nm CMOS technology. Today’s evolution of
semiconductor technologies is apt to make more advanced technologies cheaper through
mass production. Eventually, the costs of those advanced technologies will be reduced to
acceptable levels, just as the current 0.18-m CMOS technology.
In the three MMIC applications of the developed OTA, active implementations
usually make them noisy compared to those using passive structures. It is desirable to
further study their noise contributions and to search for noise reduction techniques for the
active implementations in the future work. Active implementations also result in more
DC power consumption and small signal operations compared to their passive
counterparts. More efforts can be made to reduce these disadvantages. Moreover, the
moderate input/output reflection coefficients of the active filter must be further
investigated and reduced.
In addition to the three applications described in this thesis, there are many other
microwave circuits that can be implemented using the developed OTA, such as widetuning-range VCOs and variable-gain amplifiers. Exploration of these microwave
127
Chapter 7. Conclusions
applications will be valuable directions for future work.
128
References
[1]
T. Deliyannis, Y. Sun and J. K. Fidler, Continuous-Time Active Filter Design.
Boca Raton, FL: CRC Press, 1999.
[2]
R. L. Geiger and E. Sanchez-Sinencio, “Active filter design using operational
transconductance amplifiers: A tutorial,” IEEE Circuit and Device Magazine, vol.
1, pp. 20-32, Mar. 1985.
[3]
T. Y. Lo and C. C. Hung, “A 40MHz double differential-pair CMOS OTA with
−60dB IM3,” IEEE Trans. Circuits and Systems I: Fundamental Theory and
Applications, to be published.
[4]
T. Lo and C. Hung, “A 1-V 50-MHz pseudodifferential OTA with compensation
of the mobility reduction,” IEEE Trans. Circuits and Systems II: Express Briefs,
vol. 54, no. 12, pp. 1047-1051, Dec. 2007.
[5]
L. H. C. Ferreira, T. C. Pimenta, and R. L. Moreno, “An ultra-low-voltage ultralow-power CMOS Miller OTA with rail-to-rail input/output swing,” IEEE Trans.
Circuits and Systems II: Express Briefs, vol. 54, no. 10, pp. 843-847, Oct. 2007.
[6]
X. Zhang and E. I. El-Masry, “A novel CMOS OTA based on body-driven
MOSFETs and its applications in OTA-C filters,” IEEE Trans. Circuits and
Systems I: Regular Papers, vol. 54, no. 6, pp. 1204-1212, Jun. 2007.
[7]
T. Lin, C. Wu, and M. Tsai, “A 0.8-V 0.25-mW current-mirror OTA with 160MHz GBW in 0.18-um CMOS,” IEEE Trans. Circuits and Systems II: Express
Briefs, vol. 54, no. 2, pp. 131-135, Feb. 2007.
[8]
D. Grasso, G. Palumbo, and S. Pennisi, “Three-stage CMOS OTA for large
capacitive loads with efficient frequency compensation scheme,” IEEE Trans.
Circuits and Systems II: Express Briefs, vol. 53, no.10, pp. 1044-1048, Oct. 2006.
[9]
F. A. P. Baruqui and A. Petraglia, “Linear tunable CMOS OTA with constant
dynamic range using source-degenerated current mirrors,” IEEE Trans. Circuits
and Systems II: Express Briefs, vol. 53, no. 9, pp. 797-801, Sep. 2006.
[10]
W. Huang and E. Sanchez-Sinencio, “Robust highly linear high-frequency CMOS
129
References
OTA with IM3 below -70 dB at 26 MHz,” IEEE Trans. Circuits and Systems I:
Fundamental Theory and Applications, vol. 53, no. 7, pp. 1433-1447, Jul. 2006.
[11]
A. Lewinski and J. Silva-Martinez, “OTA linearity enhancement technique for
high frequency applications with IM3 below -65 dB,” IEEE Trans. Circuits and
Systems II: Analog and Digital Signal Processing, vol. 51, no. 10, pp. 542-548,
Oct. 2004.
[12]
W. Kuhn, F. Stephenson, and A. E. Riad, “A 200 MHz CMOS Q-enhanced LC
bandpass filter,” IEEE Journal of Solid-State Circuits, vol. 31, no. 8, pp. 11121122, Aug. 1996.
[13]
W.M. Snelgrove and A. Shoval, “A balanced 0.9-m CMOS transconductance-C
filter tunable over the VHF range,” IEEE Journal of Solid-State Circuits, vol. 27,
no. 3, pp. 314-323, Mar. 1992.
[14]
G. Meyer-Brotz and A. Kley, “The Common-Mode Rejection of Transistor
Differential Amplifiers,” IEEE Trans. Circuit Theory, vol. 13, no. 2, pp. 171-175,
Jun. 1966.
[15]
A. N. Mohieldin, E. Sanchez-Sinencio, and J. Silva-Martinez, “A fully balanced
pseudo-differential OTA with common-mode feedforward and inherent commonmode feedback detector,” IEEE Journal of Solid-State Circuits, vol. 38, no. 4, pp.
663-668, Apr. 2003.
[16] E. Sanchez-Sinencio and J. Silva-Martinez, “CMOS transconductance amplifiers,
architectures and active filters: a tutorial,” IEE Proceedings - Circuits, Devices
and Systems, vol. 147, no. 1, pp. 3-12, Feb. 2000.
[17] A. Rofougaran, J. Y. Chang, M. Rofougaran, and A. A. Abidi, “A 1-GHz CMOS
RF front-end IC for a direct-conversion wireless receiver,” IEEE Journal of SolidState Circuits, vol. 31, no. 7, pp. 880-889, Jul. 1996.
[18]
L. Sungjae, B. Jagannathan, S. Narasimha, A. Chou, N. Zamdmer, J. Johnson, et
al., “Record RF performance of 45-nm SOI CMOS Technology,” in IEEE
International Electron Devices Meeting, Dec. 2007, pp. 255-258.
[19] A. J. Lopez-Martin, S. Baswa, J. Ramirez-Angulo, and R. G. Carvajal, “Lowvoltage super class-AB CMOS OTA cells with very high slew rate and power
130
References
efficiency,” IEEE Journal of Solid-State Circuits, vol. 40, no. 5, pp. 1068-1077,
May 2005.
[20]
J. N. Burghartz, M. Hargrove, C. S. Webster, R. A. Groves, M. Keene, K. A.
Jenkins, et al., “RF potential of a 0.18-m CMOS logic device technology,” IEEE
Trans. Electron Devices, vol. 47, no. 4, pp. 864-870, Apr. 2000.
[21]
Taiwan Semiconductor Manufacturing Company (TSMC) Limited (2008). TSMC
Platform Technology Portfolio [Online]. Available: http://www.tsmc.com/english
/b_technology/b01_platform/b01_platform.htm.
[22]
International Business Machines Corp. (IBM) (2008). IBM Semiconductor
solutions
[Online].
Available:
http://www-03.ibm.com/technology/ges
/semiconductor.
[23]
T. H. Lee, The Design of CMOS Radio-Frequency Integrated Circuits. Cambridge,
U.K.: Cambridge University Press, 1998.
[24]
D. L. Hiser and R. L. Geiger, “Impact of OTA nonlinearities on the performance
of continuous-time OTA-C bandpass filters,” in IEEE International Symposium on
Circuits and Systems, May 1990, vol. 2, pp. 1167-1170.
[25]
A. Lewinski and J. Silva-Martinez, “OTA linearity enhancement technique for
high frequency applications with IM3 below -65 dB,” IEEE Trans. Circuits and
Systems II: Express Briefs, vol. 51, no. 10, pp. 542-548, Oct. 2004.
[26]
E. Sanchez-Sinencio and A. G. Andreou, Low-voltage/Low-power Integrated
Circuit and Systems. New York: IEEE Press, 1999.
[27] G. Han and E. Sanchez-Sinencio, “CMOS transconductance multipliers: a tutorial”,
IEEE Trans. Circuits and Systems II: Analog and Digital Signal Processing, vol.
45, no. 12, pp. 1550-1563, Dec.1998.
[28]
Z. Wang and W. Guggenbuhl, “A voltage-controllable linear MOS transconductor
using bias offset technique,” IEEE Journal of Solid-State Circuits, vol. 25, no. 1,
pp. 315-317, Feb. 1990.
[29]
S. Baswa, A. J. Lopez-Martin, J. Ramirez-Angulo, and R. G. Carvajal, “Lowvoltage micropower super class AB CMOS OTA, “ Electronics Letters, vol. 40, no.
4, pp. 216-217, Feb. 2004.
131
References
[30]
V. Peluso, P. Vancorenland, M. Steyaert, and W. Sansen, “900mV differential
class AB OTA for switched OPAMP applications, “Electronics Letters, vol. 33, no.
17, pp. 1455-1456, Aug. 1997.
[31]
S. Baswa, A. J. Lopez-Martin, R. G. Carvajal, and J. Ramirez-Angulo, “Lowvoltage power-efficient adaptive biasing for CMOS amplifiers and buffers,”
Electronics Letters, vol. 40, no. 4, pp. 217-219, Feb. 2004.
[32]
J. Ramirez-Angulo, R. G. Carvajal, J. Tombs, A. Torralba and C. Nieva, “A new
class AB differential input stage for implementation of low voltage high slew rate
op-amps and linear transconductors,” in International Symposium on Circuits and
Systems, May 2001, vol. 1, pp. 671-674.
[33] A. E. Schmitz, R. H. Walden, L. E. Larson, S. E. Rosenbaum, R. A. Metzger, J. R.
Behnke, and P. A. Macdonald, “A deep-submicrometer microwave/digital
CMOS/SOS technology,” IEEE Electron Device Letters, vol. 12, no. 1, pp. 16-17,
Jan. 1991.
[34]
R. A. Johnson, C. E. Chang, P. M. Asbeck, M. E. Wood, G. A. Garcia, and I.
Lagnado, “Comparison of microwave inductors fabricated on silicon-on-sapphire
and bulk silicon,” IEEE Microwave Guided Wave Letters, vol. 6, no. 9, pp. 323–
325, Sep. 1996.
[35]
Y. Hokari, M. Mikami, K. Egami, H. Tsuya, and M. Kanamori, “Characteristics of
MOSFET Prepared on Si/MgO.Al2O3 SiO2/Si Structure,” IEEE Journal of SolidState Circuits, vol. 20, no. 1, pp. 173-177, Feb. 1985.
[36]
K. J. Chen, C. H. Wai, J. Zhang, and L. L. W. Leung, “CMOS-compatible
micromachined edge-suspended spiral inductors with high Q-factors and self-resonance
frequencies,” IEEE Electron Device Letters, vol. 25, no. 6, pp. 363-365, Jun. 2004.
[37]
X. Wang, X. Zhao, Y. Zhou, X. Dai, and B. Cai, “Fabrication and performance of a novel
suspended RF spiral inductor,” IEEE Trans. Electron Devices, vol. 51, no. 5, pp. 814 816, May 2004.
[38]
J. Yoon, Y. Choi, B. Kim, Y. Eo, and E. Yoon, “CMOS-compatible surfacemicromachined suspended-spiral inductors for multi-GHz silicon RF ICs,” IEEE Electron
Device Letters, vol. 23, no. 10, pp. 591 - 593, Oct. 2002.
132
References
[39]
C. P. Yue and S. S. Wong, “On-chip spiral inductors with patterned ground shields for Sibased RF ICs,” IEEE Journal of Solid-State Circuits, vol. 33, no. 5, pp. 743-752, May
1998.
[40]
Y. E. Chen, D. Bien, D. Heo, and J. Laskar, “Q-enhancement of spiral inductor with N+diffusion patterned ground shields,” in IEEE MTT-S International Microwave Symposium
Digest, May 2001, vol. 2, pp. 1289-1292.
[41]
A. Thanachayanont,
“CMOS
transistor-only active
inductor
for
IF/RF
applications,” in IEEE International Conference on Industrial Technology, Dec.
2002, vol. 2, pp. 1209-1212.
[42]
R. Ludwig and P. Bretchko, Radio Circuit Design: Theory and Applications.
Upper Saddle River, NJ: Prentice-Hall, 2000.
[43]
D. M. Pozar, Microwave Engineering. New York: John Wiley & Sons, 1997.
[44]
Y. Wu, X. Ding, M. Ismail, and H. Olsson, “RF bandpass filter design based on
CMOS active inductors,” IEEE Trans. Circuit and Systems – II: Analog and
Digital Signal Processing, vol. 50, no. 12, pp. 942-949, Dec. 2003.
[45]
H. Xiao, R. Schaumann, W. R. Daasch, P. K. Wong, and B. Pejcinovic, “A radiofrequency CMOS active inductor and its application in designing high-Q filters,”
in Proceedings of the 2004 International Symposium on Circuits and
Systems(ISCAS), May 2004, vol. 4, pp. IV-197-200.
[46]
B. Linares-Barranco, A. Rodriguez-Vazquez, E. Sanchez-Sinencio, and J. L.
Huertas, “CMOS OTA-C high-frequency sinusoidal oscillators,” IEEE Journal of
Solid State Circuits, vol. 26, no. 2, pp. 160-165, Feb. 1991.
[47]
L. H. Lu, H. H. Hsieh, and Y. T. Liao, “A wide tuning-range CMOS VCO with
differential tunable active inductor,” IEEE Trans. Microwave Theory and
Techniques, vol. 54, no. 9, pp. 3462-3468, Sep. 2006.
[48]
R. Mukhopadhyay, Y. Park, P. Sen, N. Srirattana, J. Lee, C. Lee, S. Nuttinck, A.
Joseph, J. D. Cressler, and J. Laskar, “Reconfigurable RFICs in Si-based
technologies for a compact intelligent RF frontend,” IEEE Trans. Microwave
Theory and Techniques, vol. 53, no. 1, pp. 81–93, Jan. 2005.
[49]
J. L. Pennock, “CMOS triode transconductor for continuous-time active integrated
133
References
filters,” Electronics Letters, vol. 21, no. 18, pp. 817-818, Aug. 1985.
[50] A. Wysynski, “Low-voltage CMOS and BiCMOS triode transconductors and
integrators with gain enhanced linearity and output impedance,” Electronics
Letters, vol. 30, no. 3, pp. 211-212, Feb.1994.
[51] Y. Zheng and C. E. Saavedra, “A Microwave OTA using a FeedforwardRegulated Cascade Topology,” in IEEE International Symposium on Circuits and
Systems (ISCAS), New Orleans, USA, May 2007, pp. 1887-1890.
[52]
Y. Zheng and C. E. Saavedra, “Feedforward-regulated cascode OTA for
microwave applications,” IEEE Trans. Circuits and Systems I: Fundamental
Theory and Applications, to be published.
[53]
J. M. Rabaey, A. Chandrakasan, and B. Nikolic, Digital Integrated Circuits-A
Design Perspective. Englewood Cliffs, NJ: Prentice-Hall, 2003.
[54]
E. Sackinger and W. Guggenbuhl, “A high-swing, high-impedance MOS cascode
circuit,” IEEE Journal of Solid-State Circuits, vol. 25, no. 1, pp. 289-298, Feb.
1990.
[55]
A. S. Sedra and K. C. Smith, Microelectronic Circuits. Oxford, U.K.: Oxford
University Press, 1998.
[56]
R. J. Baker, H. W. Li, and D. E. Boyce, CMOS Circuit Design, Layout, and
Simulation. New York: IEEE Press, 1998.
[57]
D. K. Shaeffer and T. H. Lee, “A 1.5-V, 1.5-GHz CMOS Low Noise Amplifier,”
IEEE Journal of Solid-State Circuits, vol. 32, no. 5, pp. 745-759, May 1997.
[58]
T. Nguyen, C. Kim, G. Ihm, M. Yang, and S. Lee, “CMOS low-noise amplifier
design optimization techniques,” IEEE Trans. Microwave Theory and Techniques,
vol. 52, no. 5, pp. 1433-1442, May 2004.
[59]
F. Bruccoleri, E. A. M. Klumperink, and B. Nauta, “Generating all two-MOStransistor amplifiers leads to new wide-band LNAs,” IEEE Journal of Solid-State
Circuits, vol. 36, no. 7, pp. 1032-1040, Jul. 2001.
[60]
M. D. Meehan and J. Purviance, Yield and Reliability Design for Microwave
Circuits and Systems. Norwood, MA: Artech House, 1993.
[61]
S. Koziel and S. Szczepanski, “design of highly linear tunable CMOS OTA for
134
References
continuous-time filters,” IEEE Trans. Circuits and Systems II: Analog and Digital
Signal Processing, vol. 49, no. 2, pp. 110-122, Feb. 2002.
[62]
P. G. Drennan and C. C. McAndrew, “Understanding MOSFET mismatch for
analog design,” IEEE Journal of Solid-State Circuits, vol. 38, no. 3, pp. 450-456,
Mar. 2003.
[63]
R. Navid, T. H. Lee, and R. W. Dutton, “Minimum achievable phase noise of RC
oscillators,” IEEE Journal of Solid-State Circuits, vol. 40, no. 3, pp. 630-637, Mar.
2005.
[64]
Y. Zheng and C. E. Saavedra, “Ultra-Compact MMIC Active Bandpass Filter with
a Wide Tuning Range,” Electronics Letters, vol. 44, no. 6, pp. 424-425, Mar. 2008.
[65]
Unlimited Saw Technology (2008), Introduce to Saw Filters [online], available:
http://www.itf.co.kr/tech/sub3.htm.
[66]
J. B. Hagen, Radio-Frequency Electronics-Circuits and Applications. New York:
Cambridge University Press, 1999.
[67] A. Dejonghe, B. Bougard, S. Pollin, J. Craninckx, A. Bourdoux, L. V. Perre, and F.
Catthoor, “Green Reconfigurable Radio Systems,” IEEE Signal Processing
Magazine, vol. 24, no. 3, pp. 90-101, May 2007.
[68]
S. Srikanteswara, J. H. Reed, P. Athanas, and R. Boyle, “A soft radio architecture
for reconfigurable platforms,” IEEE Communications Magazine, vol. 38, no. 2, pp.
140-147, Feb. 2000.
[69]
G. K. Rauwerda, P. M. Heysters, and G. J. M. Smit, “Towards Software Defined
Radios Using Coarse-Grained Reconfigurable Hardware,” IEEE Trans. Very
Large Scale Integration (VLSI) Systems, vol. 16, no. 1, pp. 3-13, Jan. 2008.
[70]
C. B. Rorabaugh, Digital Filter Designer’s Handbook. New York: McGraw-Hill,
1997.
[71]
B. Hopf, I. Wolff, and M. Guglielmi, “Coplanar MMIC active bandpass filters
using negative resistance circuits,” in IEEE MTT-S International Microwave
Symposium Digest, San Diego, CA, May 1994, pp. 1183-1185.
[72]
P. Katzin and V. Aparin, “Active, self-adjusting L-S band MMIC filters,” in GaAs
IC Symposium, Philadelphia, PA, Oct. 1994, pp. 41-44.
135
References
[73]
S. Lucyszyn and I. D. Robertson, “Monolithic narrow-band filter using ultrahighQ tunable active inductors,” IEEE Trans. Microwave Theory and Techniques, vol.
42, no. 12, pp. 2617-2622, Dec. 1994.
[74]
U. Karacaoglu and I. D. Robertson, “MMIC active bandpass filters using varactortuned negative resistance Elements,” IEEE Trans. Microwave Theory and
Techniques, vol. 43, no. 12, pp. 2926-2932, Dec. 1995.
[75]
R. Kaunisito, P. Alinikula, K. Stadius, and V. Porra, “A low-power HBT MMIC
filter based on tunable active inductors,” IEEE Microwave Guided Wave Letters,
vol. 7, no. 8, pp. 209-211, Aug. 1997.
[76]
Y. Zheng and C. E. Saavedra, “An ultra-compact CMOS variable phase shifter for
2.4-GHz ISM applications,” IEEE Trans. Microwave Theory and Techniques, vol.
56, no. 6, pp. 1349-1354, Jun. 2008.
[77]
A. Hajimiri, A. Komijani, A. Natarajan, R. Chunara, X. Guan, and H. Hashemi,
“Phased array systems in silicon,” IEEE Communications Magazine, vol. 42, no. 8,
pp. 122-130, Aug. 2004.
[78]
G. L. Stuber, J. R. Barry, S.W. Mclaughlin, Y. Li, M. A. Ingram, and T. G. Pratt,
“Broadband MIMO-OFDM wireless communications,” Proceedings of the IEEE,
vol. 92, no. 2, pp. 271-294, Feb. 2004.
[79]
M. A. Jensen and J. W. Wallace, “A review of antennas and propagation for
MIMO wireless communications,” IEEE Trans. Antennas and Propagation, vol.
52, no. 11, pp. 2810-2824, Nov. 2004.
[80]
D. G. Rahn, M. S. Cavin, F. F. Dai, N. H. W. Fong, R. Griffith, J. Macedo, A. D.
Moore, J. W. M. Rogers, and M. Toner, “A fully integrated multiband MIMO
WLAN transceiver RFIC,” IEEE Journal of Solid-State Circuits, vol. 40, no. 8, pp.
1629-1641, Aug. 2005.
[81]
M. K. A. Aziz, A. R. Nix, and P. N. Flectcher, “A study of performance and
complexity for IEEE 802.11n MIMO-OFDM GIS solutions,” in IEEE
International Conference on Communications, Paris, France, Jun. 2004, vol. 7, pp.
3822-3826.
[82]
The working group for IEEE 802.11 Wireless-Local-Area-Networks (WLAN)
136
References
Standards (2008), Status of Project IEEE 802.11n [Online]. Available:
http://grouper.ieee.org/groups/802/11/index.html.
[83]
A. Hajimiri, H. Hashemi, A. Natarajan, X. Guan, and A. Komijani, “Integrated
phased array systems in silicon,” Proceedings of the IEEE , vol. 93, no. 9, pp.
1637-1655, Sep. 2005.
[84]
B. Lakshminarayanan and T. M. Weller, “Design and modeling of 4-bit slow-wave
MEMS phase shifters,” IEEE Trans. Microwave Theory and Techniques, vol. 54,
no. 1, pp. 120-127, Jan. 2006.
[85]
D. W. Kang, H. D. Lee, C. H. Kim, and S. Hong, “Ku-band MMIC phase shifter
using a parallel resonator with 0.18-um CMOS technology,” IEEE Trans.
Microwave Theory and Techniques, vol. 54, no. 1, pp. 294-301, Jan. 2006.
[86]
J. Perruisseau-Carrier and A. K. Skrivervik,” Composite right/left-handed
transmission line metamaterial phase shifters (MPS) in MMIC technology,” IEEE
Trans. Microwave Theory and Techniques, vol. 54, no. 4, pp. 1582-1589, Apr.
2006.
[87]
C. Lu, A. V. Pham, and D. Livezey, “Development of multiband phase shifters in
180-nm RF CMOS technology with active loss compensation,” IEEE Trans.
Microwave Theory and Techniques, vol. 54, no. 1, pp. 40-45, Jan. 2006.
[88]
P. Chen, T. Huang, H. Wang, Y. Wang, C. Chen, and P. Chao, “K-band HBT and
HEMT monolithic active phase shifters using vector sum method,” IEEE Trans.
Microwave Theory and Techniques, vol. 52, no. 5, pp. 1414-1424, May 2004.
[89]
P. Wu, H. Chang, M. Tsai, T. Huang, and H. Wang, “New miniature 15-20-GHz
continuous-phase/amplitude control MMICs using 0.18-m CMOS technology,”
IEEE Trans. Microwave Theory and Techniques, vol. 54, no. 1, pp. 10-19, Jan.
2006.
[90]
Z. Liu, J. C. Midkiff, H. Xu, T. W. Crowe, and R. M. Weikle II, “Broad-band 180º
phase shifters using integrated submillimeter-wave schottky diodes,” IEEE Trans.
Microwave Theory and Techniques, vol. 53, no. 9, pp. 2949-2955, Sep. 2005.
[91]
H. Kwon, H. Lim, and B. Kang, “Design of 6-18 GHz wideband phase shifters
using radial stubs,” IEEE Microwave and Wireless Components Letters, vol. 17,
137
References
no. 3, pp. 205-207, Mar. 2007.
[92]
S. Lee, J. H. Park, H. T. Kim, J. M. Kim, Y. K. Kim, and Y. Kwon, “Low-loss
analog and digital reflection-type MEMS phase shifters with 1:3 bandwidth,”
IEEE Trans. Microwave Theory and Techniques, vol. 52, no. 1, pp. 211-219, Jan.
2004.
[93]
K. J. Koh and G. M. Rebeiz, “A 0.13-m CMOS digital phase shifter for K-band
phased arrays,” in IEEE Radio Frequency Integrated Circuits Symposium,
Honolulu, USA, Jun. 2007, pp. 383-386.
[94]
D. R. Banbury, N. Fayyaz, S. Safavi-Naeini, and S. Nikneshan, “A CMOS 5.5/2.4
GHz dual-band smart-antenna transceiver with a novel RF dual-band phase shifter
for WLAN 802.11a/b/g,” in IEEE Radio Frequency Integrated Circuits
Symposium, Fort Worth, USA, Jun. 2004, pp. 157-160.
[95]
H. Zarei and D. J. Allstot., “A low-loss phase shifter in 180nm CMOS for
multiple-antenna
receivers,”
in
IEEE
International
Solid-State
Circuits
Conference, San Francisco, USA, Feb. 2004, pp. 392-534.
[96]
F. Ellinger, R. Vogt, and W. Bachtold, “Ultracompact reflective-type phase shifter
MMIC at C-band with 360º phase–control range for smart antenna combining,”
IEEE Journal of Solid-State Circuits, vol. 37, no. 4, pp. 481-486, Apr. 2002.
[97]
X. Yang and J. Lin, “A digitally controlled constant envelop phase-shift modulator
for low-power broad-band wireless applications,” IEEE Trans. Microwave Theory
and Techniques, vol. 54, no. 1, pp. 96-105, Jan. 2006.
[98]
J. Grajal, J. Gismero, M. Mahfoudi, and F. A. Petz, “A 1.4-2.7-GHz Analog
MMIC Vector Modulator for a Crossbar beam-forming network,” IEEE Trans.
Microwave theory and Techniques, vol. 45, no. 10, pp. 1705-1714, Oct. 1997.
[99]
H. Hayashi and M. Muraguchi, “An MMIC active phase shifter using a variable
resonant circuit,” IEEE Trans. Microwave Theory and Techniques, vol. 47, no. 10,
pp. 2021-2026, Oct. 1999.
[100] D. Viveiros, J. D. Consonni, and A. K. Jastrzebski, “A tunable all-pass MMIC
active phase shifter,” IEEE Trans. Microwave Theory and Techniques, vol. 50, no.
8, pp. 1885-1889, Aug. 2002.
138
References
[101] M. Chu, J. M. Huard, K. Y. Wong, and D. J. Allstot, “A 5GHz wide-range CMOS
active phase shifter for wireless beamforming applications,” in IEEE Radio and
Wireless Symposium, San Diego, USA, Jan. 2006, pp. 47-50.
[102] H. Hayashi, M. Muraguchi, Y. Umeda, and T. Enoki, “A high-Q broadband active
inductor and its application to a low-loss analog phase shifter,” IEEE Trans.
Microwave Theory and Techniques, vol. 44, no. 12, pp. 2369-2374, Dec. 1996.
[103] E. M. Bastida, G. P. Donzelli, and L. Scopelliti, “GaAs monolithic microwave
integrated circuits using broadband tunable active inductors,” in 19th European
Microwave Conference, London, UK, Sep. 1989, pp. 1282-1287.
[104] S. Lucyszyn and I. D. Robertson, “Decade bandwidth MMIC analogue phase
shifter,” in IEE Colloquium on Multi-Octave Microwave Circuits, Nov. 1991, pp.
2/1-2/6.
[105] G. Carchon and B. Nauwelaers, “Power and noise limitation of active circulators,”
IEEE Trans. Microwave Theory and Techniques, vol. 48, no. 2, pp. 316-319, Feb.
2000.
[106] C. Kalialakis, M. J. Cryan, P. S. Hall, and P. Gardner, “Analysis and design of
integrated active circulator antennas,” IEEE Trans. Microwave Theory and
Techniques, vol. 48, no. 6, pp. 1017-1023, Jun. 2000.
[107] S. Tanaka, N. Shimomura, and K. Ohtake, “Active circulators – The realization of
circulators using transistors,” Proceedings of the IEEE, vol. 53, no. 3, pp. 260-267,
Mar. 1965.
[108] M. A. Smith, “GaAs monolithic implementation of active circulators,” in IEEE
MTT-S International Microwave Symposium Digest, New York, USA, May 1988,
pp. 1015-1016.
[109] Y. Ayasli, “Field effect transistor circulators,” IEEE Trans. Magnetics, vol. 25, no.
5, pp. 3242-3247, Sep. 1989.
[110] S. Hara, T. Tokumitsu, and M. Aikawa, “Novel unilateral circuits for MMIC
circulators,” IEEE Trans. Microwave Theory and Techniques, vol. 38, no. 10, pp.
1399-1406, Oct. 1990.
[111] D. Kother, B. Hopf, T. Sporkmann, and I. Wolff, “Active CPW MMIC circulator
139
References
for the 40 GHz band, “ in European Microwave Conference, Cannes, France, Oct.
1994, vol. 1, pp. 542-547.
[112] A. Gasmi, B. Huyart, E. Bergeault, and L. Jallet, “Noise and power optimization
of a MMIC quasi-circulator,” IEEE Trans. Microwave Theory and Techniques, vol.
45, no. 9, pp. 1572-1577, Sep. 1997.
[113] D. Kother, B. Hopf, T. Sporkmann, I. Wolff, and S. Kosslowski, “New types of
MMIC circulators,” in IEEE MTT-S International Microwave Symposium Digest,
Orlando, USA, May 1995, vol. 2, pp. 877-880.
[114] G. L. Matthaei, L. Young, and E. M. T. Jones, Microwave Filters, ImpedanceMatching Networks, and Coupling Structures. Toronto: McGraw-Hill, 1964.
140
Appendix
A-1. Derivation of ip and in
A derivation of the output currents ip and in in Fig. 3-6(c) follows. In the equivalent
circuit of the PMOS cascode in Fig. 3-6(a), assuming the output node is grounded, an
equation can be obtained by applying Kirchhoff’s current law at the voltage node vd1:
vd1
,
( Z 1 // Z 2 )
(A1)
i d 1 ( Z 1 // Z 2 )
.
1  2 g m 2 ( Z 1 // Z 2 )
(A2)
id1  2 g m2 v d1 
which results in:
vd1 
Therefore, the RF current from the PMOS cascode to the output is given by:
i p  id1 

v d1 id1 (Z 1  2 g m2 Z 1 Z 2 )

Z1 Z1  Z 2  2 g m2 Z1 Z 2
 g m1v in  ( Z 1  2 g m 2 Z 1 Z 2 )
.
Z1  Z 2  2 g m2 Z1 Z 2
(A3)
By applying the same law at the voltage nodes of vd4 and vd9, two equations can be
obtained for the NMOS cascode:
i d 4  2 g m3 v d 4 
id 4 
vd 4 vd 4  vd 9

,
Z3
Z4
 vd 9 vd 4  vd 9

.
Z9
Z4
141
(A4)
(A5)
Appendix
Substituting id4 from (3-12b) in Chapter 3 to (A4) and (A5) and solving for vd9 yields:
vd 9 
g m 4 vin  Z 9 (2 g m3 Z 3 Z 4  Z 4 )
.
Z 4  Z 3  2 g m 3 Z 3 Z 4  Z 9 (1  g m 4 Z 4 )(2 g m3 Z 3  1)
(A6)
Thus, the RF current from the NMOS cascode to the output is given by:
in 
 vd 9
 g m 4 v in  ( Z 4  2 g m3 Z 3 Z 4 )

.
Z9
Z 4  Z 3  2 g m3 Z 3 Z 4  Z 9 (1  g m 4 Z 4 )(2 g m3 Z 3  1)
(A7)
In the design of the proposed OTA, two transistors with a relatively-large size are used
for the bottom DC current sources T9 and T10, so the impedance Z9 is small compared to
Z3 and Z4 and the term including it in the denominator in (A7) is negligible. Therefore
(A7) can be approximated by
in 
 g m 4 v in  ( Z 4  2 g m 3 Z 3 Z 4 )
,
Z 4  Z 3  2 g m3 Z 3 Z 4
(A8)
which has a similar format as (A3).
A-2. Derivation of Zp and Zn
The output impedances Zp and Zn in Fig. 3-6(c) can be derived from the equivalent
circuit model in Fig. 3-6(a) as follows. By applying an RF voltage vx at the OTA’s output
in Fig. 3-6(a) and assuming it induces an RF current ixp to the PMOS cascode, two
equations can be obtained:
i xp 
v x  vd1
 2 g m2 v d1 ,
Z2
142
(A9)
Appendix
i xp 
vd 1
,
Rch1 // Z 1
(A10)
The output impedance of the PMOS cascode can be derived from the above two
equations:
Zp 
vx
 2 g m 2 Z 2 ( Z 1 // Rch1 )  ( Z 1 // Rch1 )  Z 2 .
i xp
(A11)
Using the same way, the output impedance of the NMOS cascode can also be derived:
Z n  2 g m3 Z 3 ( Z 4 // Rch 4  Z 9 )  ( Z 4 // Rch 4  Z 9 )  Z 3 .
(A12)
A-3. Computation of Butterworth and Chebyshev Filters
The component values of the Butterworth lowpass filter prototype are normalized to
Z0=1Ω and c=1rad/sec, and they can be easily computed using the following equations
[114]:
g0  1,
g k  2 sin(
(A13a)
2k  1
 ) , k = 1, 2, 3 …, N,
2N
g N 1  1 ,
(A13b)
(A13c)
where N is the lowpass filter order. The equations to calculate the normalized component
values of the Chebyshev filters are a bit more complicated as follow according to [114]:
g0  1,
(A14a)
143
Appendix
g1 
 2 sin( / 2 N )
,
sinh(  / 2 N )
(A14b)
gk 
4a k 1 a k
, k = 2, 3, 4, …, N,
bk 1 g k 1
(A14c)
 1, if N is odd,
g N 1  
2
2 1
(2 K  1  2 K 1  K ) , if N is even,
(A14d)
where
a k  sin(
2k  1
 ) , k = 0, 1, 2, …, N,
2N
bk  sinh 2 (  / 2 N )  sin 2 (
  ln(
1 K 2 1
1 K 2 1
k
) , k = 0, 1, 2, …, N-1,
N
),
(A15a)
(A15b)
(A15c)
K 2  10 / 10  1 , = ripple in dB.
144
(A15d)