Download Evaluates: MAX3984 MAX3984 Evaluation Kit General Description Features

Survey
yes no Was this document useful for you?
   Thank you for your participation!

* Your assessment is very important for improving the workof artificial intelligence, which forms the content of this project

Document related concepts
no text concepts found
Transcript
19-1046; Rev 0; 10/07
MAX3984 Evaluation Kit
The MAX3984 evaluation kit (EV kit) is a fully assembled
and tested demonstration board that provides complete
evaluation of the MAX3984 1Gbps to 10Gbps preemphasis driver with receive equalizer.
Features
♦ Fully Assembled and Tested
♦ Allows Full Electrical Evaluation
Ordering Information
PART
TEMP RANGE
MAX3984EVKIT+
0°C to +85°C
IC PACKAGE
16 TQFN-EP
+Denotes a lead-free/RoHS-compliant package.
Component List
DESIGNATION QTY
DESCRIPTION
DESIGNATION QTY
DESCRIPTION
C1
1
33µF ±10% tantalum capacitor
(B case)
JU1, JU2
JU4–JU7
C2, C3, C8
3
0.1µF ±10% ceramic capacitors
(0402)
JU3
1
2-pin header (0.1in centers)
None
6
Shunts
C4–C7, C9,
C10
6
0.01µF ±5% ceramic capacitors
(0402)
L1
1
4.7µH ±10% inductor (1008)
4
SMA connectors (edge-mount,
tab-contact)
J1–J4
J6, J10, TP1,
TP2, TP3, TP5
6
Test points
Quick Start
See Figure 1 for quick reference.
1) Remove shunt from JU2.
6
3-pin headers (0.1in centers)
R1
1
4.7kΩ ±5% resistor (0402)
U1
1
MAX3984UTE+ 16-pin TQFN-EP
None
1
PCB: MAX3984 EV kit circuit board,
Rev A
6) Install shunt on OUT_LEV (JU7) between GND
(logic 0) and the center pin. This sets the output
swing to a reduced level.
2) Install shunt on JU3. This disables the squelch. To
enable squelch connect JU2 between VCC and
center pin and remove JU3.
7) Connect at +3.3V power supply to the +3.3V (J6)
and GND (J10) terminals. Set the current limit to
150mA. Monitor the supply voltage at VCC (TP2).
This is the supply that powers the chip.
3) Install shunt on TX_DISABLE (JU4) between GND
(logic 0) and the center pin. This enables the output
of the chip.
8) Apply a 500mVP-P differential signal to IN+ (J1) and
IN- (J2).
4) Install shunt on IN_LEV (JU1) between GND (logic
0) and center pin. This disables the equalization at
the input of the chip.
9) Using 50Ω cables, connect OUT+ (J3) and OUT(J4) to an oscilloscope with a 50Ω input terminations.
5) Install shunts on PE0 (JU5) and PE1 (JU6) between
GND (logic 0) and the center pin. This sets the output preemphasis to a minimum. See Table 1 for a
complete list of settings.
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
www.BDTIC.com/maxim
1
Evaluates: MAX3984
General Description
Evaluates: MAX3984
MAX3984 Evaluation Kit
Adjustment and Control Descriptions (see Quick Start first)
COMPONENT
NAME
J1, J2
IN+, IN-
FUNCTION
Data Input. CML input that is internally terminated with 50 to VCC - 1.5V.
J3, J4
OUT+, OUT-
Data Output. CML output that is internally terminated with 50 to VCC.
J6, J10
+3.3V, GND
Connection for a +3.3V or +3.6V Power Supply. Set the current limit to 150mA.
JU1
IN_LEV
JU2
—
LOS Pullup Termination. Connected to VCC terminates the LOS though a 4.7k resistor to
VCC. Connected to TP5 terminates the LOS through a 4.7k resistor to +5.5V.
JU3
—
LOS Disable. Intalling jumper disable the LOS. Remove jumper for normal LOS operation.
JU4
TX_DISABLE
JU5
PE0
Preemphasis Control Least Significant Bit. See Table 1 for controls.
JU6
PE1
Preemphasis Control Most Significant Bit. See Table 1 for controls.
JU7
OUT_LEV
TP1
LOS
TP2, TP3
VCC, GND
TP5
+5.5V
Receive Equalization Control Input. Set to VCC (logic 1) for higher LOS assert/deassert levels
and 10in FR-4 compensation. Set to GND (logic 0) for lower LOS assert/deassert levels and
to bypass the FR-4 equalization.
Tramsitter Disable. Set to GND (logic 0) for normal operation. Set to VCC (logic 1) or open to
reduce the differential output to less than 10mVP-P.
Output-Swing Control. Set to VCC (logic 1) or open for maximum output swing. Set to GND
(logic 0) for reduced swing.
Loss-of-Signal Output. Monitor with high-impedance probe.
Connection for Monitoring VCC and GND
Connection for Alternate Pullup Voltage for LOS
Table 1. Preemphasis Settings
2
PE1
PE0
PREEMPHASIS (dB)
0
0
3.5
0
1
6.5
1
0
9.5
1
1
13
_______________________________________________________________________________________
www.BDTIC.com/maxim
MAX3984 Evaluation Kit
Evaluates: MAX3984
SUPPLY VOLTAGE:
ATTACH +3.3V TO +3.6V SUPPLY.
SELECTS PULLUP VOLTAGE FOR
OPEN-COLLECTOR LOS OUTPUT.
INSTALL JUMPER TO
DISABLE SQUELCH.
TRANSMIT DISABLE:
SET TO LOGIC 0 NORMAL OPERATION.
LOGIC 1
LOGIC 0
LOGIC 1
LOGIC 0
OUTPUT LEVEL:
SET TO LOGIC 1 FOR HIGHER
OUTPUT SWING. SET TO LOGIC 0
FOR LOWER OUTPUT SWING.
PREEMPHASIS CONTROL:
PE1 IS THE MOST SIGNIFICANT BIT,
AND PE0 IS THE LEAST SIGNIFICANT
BIT. SET PE1 = PE0 = LOGIC 1 FOR
MAXIMUM PREEMPHASIS.
Figure 1. MAX3984 EV Kit Quick Reference
_______________________________________________________________________________________
www.BDTIC.com/maxim
3
Evaluates: MAX3984
MAX3984 Evaluation Kit
TP5
+5.5V
JU2
R1
4.7kΩ
VCC
VCC
TP1
LOS
JU1
IN_LEV
JU4
TX_DISABLE
JU3
VCC
VCC
16
C3
0.1μF
GND
1
C10
0.01μF
J1
C4
0.01μF
2
IN+
J2
C5
0.01μF
15
14
IN_LEV
LOS
13
C8
0.1μF
TX_DISABLE
VCC1
VCC2
IN+
OUT+
U1
12
C9
0.01μF
C6
0.01μF
11
OUT+
C7
0.01μF
MAX3984UTE+
3
IN-
4
IN-
OUT-
GND
GND
OUT_LEV
5
PE1
PE0
GND
6
7
8
J3
10
J4
OUT-
9
VCC
JU7
OUT_LEV
JU6
PE1
JU5
PE0
J6
L1
4.7μH
TP2
VCC
VCC
+3.3V
J10
C1
33μF
C2
0.1μF
GND
Figure 2. MAX3984 EV Kit Schematic
4
_______________________________________________________________________________________
www.BDTIC.com/maxim
TP3
MAX3984 Evaluation Kit
Evaluates: MAX3984
Figure 3. MAX3984 EV Kit Component Placement Guide—Component Side
_______________________________________________________________________________________
www.BDTIC.com/maxim
5
Evaluates: MAX3984
MAX3984 Evaluation Kit
Figure 4. MAX3984 EV Kit PCB Layout—Component Side, Layer 1
6
_______________________________________________________________________________________
www.BDTIC.com/maxim
MAX3984 Evaluation Kit
Evaluates: MAX3984
Figure 5. MAX3984 EV Kit PCB Layout—Ground Plane, Layer 2
_______________________________________________________________________________________
www.BDTIC.com/maxim
7
Evaluates: MAX3984
MAX3984 Evaluation Kit
Figure 6. MAX3984 EV Kit PCB Layout—Power Plane, Layer 3
8
_______________________________________________________________________________________
www.BDTIC.com/maxim
MAX3984 Evaluation Kit
Evaluates: MAX3984
Figure 7. MAX3984 EV Kit PCB Layout—Bottom Side, Layer 4
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 _____________________ 9
© 2007 Maxim Integrated Products
SPRINGER
is a registered trademark of Maxim Integrated Products, Inc.
www.BDTIC.com/maxim