Download TL082-Q1 JFET-INPUT OPERATIONAL AMPLIFIER FEATURES

TL082-Q1
JFET-INPUT OPERATIONAL AMPLIFIER
www.ti.com
SLOS548 – SEPTEMBER 2007
FEATURES
1
•
•
•
•
•
•
•
•
•
Qualified for Automotive Applications
Low Power Consumption
Wide Common-Mode and Differential
Voltage Ranges
Low Input Bias and Offset Currents
Low Total Harmonic Distortion: 0.003% Typ
High Input Impedance: JFET-Input Stage
Latchup-Free Operation
High Slew Rate: 13 V/μs Typ
Common-Mode Input Voltage Range
Includes VCC+
EGAKCAP D
)WEIV POT(
TUO1
–NI1
+NI1
–V
CC
1
2
3
4
8 +V
CC
T7UO2
6–NI2
+NI2
5
DESCRIPTION/ORDERING INFORMATION
The TL082 JFET-input operational amplifier incorporates well-matched, high-voltage JFET and bipolar transistors
in a monolithic integrated circuit. The device features high slew rates, low input bias and offset currents, and low
offset-voltage temperature coefficient.
The I-suffix device is characterized for operation from –40°C to 85°C. The Q-suffix device is characterized for
operation from –40°C to 125°C.
ORDERING INFORMATION (1)
PACKAGE (2)
TJ
(1)
(2)
ORDERABLE PART NUMBER
TOP-SIDE MARKING
–40°C to 85°C
SOIC – D
Reel of 2500
TL082IDRQ1
TL082I
–40°C to 125°C
SOIC – D
Reel of 2500
TL082QDRQ1
TL082Q
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2007, Texas Instruments Incorporated
TL082-Q1
JFET-INPUT OPERATIONAL AMPLIFIER
www.ti.com
SLOS548 – SEPTEMBER 2007
SYMBOL (EACH AMPLIFIER)
IN+
+
IN–
-
OUT
SCHEMATIC (EACH AMPLIFIER)
VCC+
IN+
64W
IN–
OUT
128 W
64 W
C1
1080 W
1080 W
VCC–
A.
2
Component values shown are nominal.
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TL082-Q1
JFET-INPUT OPERATIONAL AMPLIFIER
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SLOS548 – SEPTEMBER 2007
ABSOLUTE MAXIMUM RATINGS (1)
over operating free-air temperature range (unless otherwise noted)
VALUE
VCC+
Supply voltage, positive (2)
18 V
VCC–
Supply voltage, negative (2)
–18 V
VID
Differential input voltage (3)
±30 V
VI
Input voltage (2) (4)
±15 V
Duration of output short circuit (5)
Unlimited
(6)
Continuous total power dissipation
TA
Operating free-air temperature range
θJA
Package thermal impedance, junction to free air (7)
TL082I
–40°C to 85°C
TL082Q
–40°C to 125°C
97°C/W
Human-Body Model
ESD rating (8)
1.5 kV (H1C)
Charged-Device Model
1.5 kV (C5)
Machine Model
200 V (M3)
Operating virtual junction temperature
Tstg
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
150°C
Storage temperature range
–65°C to 150°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values, except differential voltages, are with respect to the midpoint between VCC+ and VCC–.
Differential voltages are at IN+ with respect to IN–.
The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 V, whichever is less.
The output may be shorted to ground or to either supply. Temperature and/or supply voltages must be limited to ensure that the
dissipation rating is not exceeded.
Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient
temperature is PD = (TJ(max) – TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability.
The package thermal impedance is calculated in accordance with JESD 51-7.
ESD protection level per JEDEC classifications JESD22-A114 (HBM), JESD22-A115 (MM), and JESD22-C101 (CDM).
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TL082-Q1
JFET-INPUT OPERATIONAL AMPLIFIER
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SLOS548 – SEPTEMBER 2007
ELECTRICAL CHARACTERISTICS (1)
VCC± = ±15 V (unless otherwise noted)
PARAMETER
VIO
Input offset voltage
VO = 0, RS = 50 Ω
αVIO
Temperature coefficient of input
offset voltage
VO = 0, RS = 50 Ω
IIO
Input offset current (3)
VO = 0
IIB
Input bias current (3)
VICR
Common-mode input
voltage range
VOM
Maximum peak output
voltage swing
AVD
Large-signal differential voltage
amplification
B1
Unity-gain bandwidth
TA (2)
TEST CONDITIONS
MIN
TYP
MAX
3
6
25°C
Full range
18
25°C
5
100
pA
20
nA
30
200
pA
50
nA
Full range
RL = 10 kΩ
25°C
±11
–12
to 15
25°C
±12
±13.5
VO = ±10 V, RL ≥ 2 kΩ
V
±12
Full range
RL ≥ 2 kΩ
μV/°C
Full range
25°C
RL ≥ 10 kΩ
mV
9
Full range
VO = 0
UNIT
V
±10
±12
25°C
50
200
Full range
15
V/mV
25°C
3
25°C
12
MHz
Ω
ri
Input resistance
CMRR
Common-mode rejection ratio
VIC = VICR(min), VO = 0, RS = 50 Ω
25°C
75
86
dB
kSVR
Supply-voltage rejection ratio
(ΔVCC±/ΔVIO)
VCC = ±15 V to ±9 V,
VO = 0, RS = 50 Ω
25°C
80
86
dB
ICC
Supply current (per amplifier)
VO = 0, No load
25°C
1.4
VO1/VO2
Crosstalk attenuation
AVD = 100
25°C
120
(1)
(2)
(3)
10
2.8
mA
dB
All characteristics are measured under open-loop conditions with zero common-mode voltage, unless otherwise specified.
Full range for TA is –40°C to 85°C for I-suffix devices and –40°C to 125°C for Q-suffix devices.
Input bias currents of an FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive, as
shown in Figure 14. Pulse techniques must be used that maintain the junction temperature as close to the ambient temperature as
possible.
OPERATING CHARACTERISTICS
VCC± = ±15 V, TA = 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
13
UNIT
SR
Slew rate at unity gain
VI = 10 V, RL = 2 kΩ, CL = 100 pF, See Figure 1
tr
Rise time
VI = 20 mV, RL = 2 kΩ, CL = 100 pF, See Figure 1
0.05
μs
Overshoot factor
VI = 20 mV, RL = 2 kΩ, CL = 100 pF, See Figure 1
20
%
Vn
Equivalent input noise voltage
RS = 20 Ω
18
nV/√Hz
In
Equivalent input noise current
RS = 20 Ω, f = 1 kHz
THD
Total harmonic distortion
VIrms = 6 V, f = 1 kHz, AVD = 1, RS ≤ 1 kΩ, RL ≥ 2 kΩ
4
8
MAX
f = 1 kHz
f = 10 Hz to 10 kHz
4
μV
0.01
pA/√Hz
0.003
%
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V/μs
Copyright © 2007, Texas Instruments Incorporated
TL082-Q1
JFET-INPUT OPERATIONAL AMPLIFIER
www.ti.com
SLOS548 – SEPTEMBER 2007
PARAMETER MEASUREMENT INFORMATION
TUO
+
V I
Fp 0C01L =
R 2L =
k
W
Figure 1.
k 01
W
k1 W
-
V I
TUO
+
RL
Fp 0C01L =
Figure 2.
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TL082-Q1
JFET-INPUT OPERATIONAL AMPLIFIER
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SLOS548 – SEPTEMBER 2007
TYPICAL CHARACTERISTICS
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the devices.
Table of Graphs
FIGURE
vs Frequency
VOM
Maximum peak output voltage
6
vs Load resistance
7
vs Supply voltage
8
vs Free-air temperature
9
vs Frequency
10
vs Free-air temperature
11
vs Free-air temperature
12
vs Supply voltage
13
AVD
Large-signal differential voltage amplification
PD
Total power dissipation
ICC
Supply current
IIB
Input bias current
vs Free-air temperature
14
Large-signal pulse response
vs Time
15
VO
Output voltage
vs Elapsed time
16
CMRR
Common-mode rejection ratio
vs Free-air temperature
17
Vn
Equivalent input noise voltage
vs Frequency
18
THD
Total harmonic distortion
vs Frequency
19
MAXIMUM PEAK OUTPUT VOLTAGE
vs
FREQUENCY
(See Figure 2)
MAXIMUM PEAK OUTPUT VOLTAGE
vs
FREQUENCY
(See Figure 2)
±51
±51
k R01L =
T
5A
2=
VCC ± =V ±51
Ω
°C
k001
V - egatlo
±01
VCC ± =V ±01
5±.7
±5
VCC ± = V± 5
5±.2
0
k001
M1
k1
zH - y cneuqerF - f
k1
Ω
°C
±01
V ±01
V
CC ± =
5±.7
±5
V
±5
CC ± = V
5±.2
0
001
k001
M01
zH - y cneuqerF - f
Figure 3.
6
k01
R 2L =
k
T
5A
2=
V
V ±51
CC ± =
5.±21
m
xaM - V tu
tuuO kae
Ppm
MViO
m
xaM - V tu
tuuO kae
Ppm
MViO
V - egatlo
5.±21
M1
3, 4, 5
vs Free-air temperature
Figure 4.
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TL082-Q1
JFET-INPUT OPERATIONAL AMPLIFIER
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SLOS548 – SEPTEMBER 2007
MAXIMUM PEAK OUTPUT VOLTAGE
vs
FREQUENCY
(See Figure 2)
MAXIMUM PEAK OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
(See Figure 2)
± 15
± 12.5
VCC ± = ± 15 V
RL = 2 kΩ
TA = 25°C
VOM - Maxim um Peak Output Voltage - V
VOM - Maxim um Peak Output Voltage - V
± 15
± 10
TA = - 55°C
± 7.5
±5
TA = 125°C
± 2.5
0
10k
40k
100k
400k
1M
4M
RL = 10 kW
± 12.5
RL = 2 kW
± 10
± 7.5
±5
± 2.5
VCC ± = ± 15 V
0
-75
10M
-50
f - Frequenc y - Hz
25
50
75
Figure 6.
MAXIMUM PEAK OUTPUT VOLTAGE
vs
LOAD RESISTANCE
(See Figure 2)
MAXIMUM PEAK OUTPUT VOLTAGE
vs
SUPPLY VOLTAGE
100
125
14
16
± 15
VCC ± = ± 15 V
TA = 25°C
VOM - Maxim um Peak Output Voltage - V
VOM - Maxim um Peak Output Voltage - V
0
Figure 5.
± 15
± 12.5
± 10
± 7.5
±5
± 2.5
0
0.1
-25
TA - Free-Air Temperature - °C
0.2
0.4
0.7
1
2
RL - Load Resistance - k Ω
Figure 7.
4
7
10
RL = 10 kΩ
TA = 25°C
± 12.5
± 10
± 7.5
±5
± 2.5
0
0
2
4
6
8
12
Figure 8.
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| VCC ± | - Suppl y Voltage - V
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JFET-INPUT OPERATIONAL AMPLIFIER
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SLOS548 – SEPTEMBER 2007
LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION
vs
FREE-AIR TEMPERATURE
1000
700
LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION
vs
FREQUENCY
106
200
100
70
40
20
10
7
4
2
1
- 75
VCC ± = ± 15 V
VO = ± 10 V
RL = 2 kΩ
- 50
- 25
104
103
25
50
75
100
45°
102
90°
Phase Shift
(right scale)
101
1
0
0°
Differential Voltage
Amplification
(left scale)
Phase Shift
105
AVD - Lar ge-Signal Differential
Voltage Amplification - V/mV
AVD - Lar ge-Signal Differential
Voltage Amplification - V/mV
400
VCC ± = ± 5 V to ± 15 V
RL = 10 kΩ
TA = 25°C
1
10
100
1k
135°
10k
100k
1M
180°
10M
f - Frequenc y - Hz
125
TA - Free-Air Temperature - °C
Figure 9.
Figure 10.
POWER DISSIPATION
vs
FREE-AIR TEMPERATURE
SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE
2.0
250
VCC ± = ± 15 V
No Signal
No Load
200
175
150
125
100
75
50
- 50
- 25
0
25
50
75
TA - Free-Air Temperature - °C
Figure 11.
8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
25
0
- 75
VCC ± = ±15 V
No Signal
No Load
1.8
I CC ± – Supply Current – mA
PD - Total Power Dissipation - mW
225
100
125
0
–75
–50
–25
0
25
75
100
125
Figure 12.
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TA – Free-Air Temperature – °C
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TL082-Q1
JFET-INPUT OPERATIONAL AMPLIFIER
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SLOS548 – SEPTEMBER 2007
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
INPUT BIAS CURRENT
vs
FREE-AIR TEMPERATURE
100
2.0
I IB - Input Bias Current - nA
1.6
I CC ± - Suppl y Current - mA
V CC ± = ± 15 V
TA = 25°C
No Signal
No Load
1.8
1.4
1.2
1.0
0.8
0.6
10
1
0.1
0.4
0.2
0.01
- 50
0
0
2
4
6
8
10
12
14
16
- 25
0
Figure 13.
50
75
100
125
Figure 14.
OUTPUT VOLTAGE
vs
ELAPSED TIME
(See Figure 1)
VOLTAGE-FOLLOWER LARGE-SIGNAL PULSE RESPONSE
6
VCC ± = ± 15 V
RL = 2 kΩ
CL = 100 pF
4
TA = 25°C
Output
28
24
VO - Output Voltage - mV
Input and Output Voltages - V
25
TA - Free-Air Temperature - °C
| VCC ± | - Suppl y Voltage - V
2
0
-2
Input
20
16
VCC ± = ± 15 V
RL = 2 kΩ
CL = 100 pF
TA = 25°C
12
8
4
-4
0
-4
-6
0
0.5
1
1.5
2
t - Time - µs
Figure 15.
2.5
3
3.5
0
0.2
0.4
0.8
1.0
1.2
Figure 16.
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0.6
t - Elapsed Time - µs
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JFET-INPUT OPERATIONAL AMPLIFIER
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SLOS548 – SEPTEMBER 2007
COMMON-MODE REJECTION RATIO
vs
FREE-AIR TEMPERATURE
EQUIVALENT INPUT NOISE VOLTAGE
vs
FREQUENCY
50
VCC ± = ±15 V
RL = 10 kΩ
Vn - Equilv alent Input Noise Voltage - nV/ Hz
CMRR – Common-Mode Rejection Ratio – dB
89
88
87
86
85
84
83
–75
–50
–25
0
25
50
75
100
VCC ± = ± 15 V
AVD = 10
RS = 20 Ω
TA = 25°C
40
30
20
10
0
125
10
40
100
TA – Free-Air Temperature – °C
400 1 k
4 k 10 k
40 k 100 k
f - Frequenc y - Hz
Figure 17.
Figure 18.
TOTAL HARMONIC DISTORTION
vs
FREQUENCY
1
VCC ± = ± 15 V
AVD = 1
VI(RMS) = 6 V
TA = 25°C
THD - Total Harmonic Distortion - %
0.4
0.1
0.04
0.01
0.004
0.001
10
400
1k
4k
10k
40k
100k
f - Frequenc y - Hz
Figure 19.
10
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TL082-Q1
JFET-INPUT OPERATIONAL AMPLIFIER
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SLOS548 – SEPTEMBER 2007
APPLICATION INFORMATION
k 0R01F =
W
V 51
2/1
280LT
C.3F =
Fµ 3
tuptuO
+
W
-
k 3.3
k1 W
V 51–
k 3.3
W
k 1.9
1
=f
C R 2pF
W
F
Figure 20.
+V
CC
3C
2C
2/1
280LT
+
2R
-
tupnI
1R
tuptuO
–V
CC
M 5.1 3
=R)3R(2 = 2R = 1R
1C
Fp 011 =
= 2C = 1C
W
fo =
1C 1R 2p
3C
2
1
zHk 1 =
Figure 21.
+V
CC
Ω
-
M1
280LT
+V
CC
A tuptuO
+
+
Fµ 1
280LT
+V
CC
-
tupnI
Ω
k 001
280LT
Ω
B tuptuO
+
k 001
+V
CC
k 001
k 001
Ω
+V
CC
-
Fµ 001
Ω
C tuptuO
280LT
+
Figure 22. Audio-Distribution Amplifier
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TL082-Q1
JFET-INPUT OPERATIONAL AMPLIFIER
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SLOS548 – SEPTEMBER 2007
1N4148
6 sin ωt
- 15 V
18 kΩ
(see Note A)
18 pF
18 pF
1 kΩ
VCC +
VCC+
-
88.4 kΩ
-
1/2
TL082
1/2
TL082
+
88.4 kΩ
VCC -
6 cos ωt
+
18 pF
1 kΩ
VCC -
15 V
1N4148
18 kΩ
(see Note A)
88.4 kΩ
A.
These resistor values may be adjusted for a symmetrical output.
Figure 23. 100-kHz Quadrature Oscillator
16 kΩ
16 kΩ
220 pF
220 pF
43 kΩ
43 kΩ
1/2
TL082
VCC +
VCC +
43 kΩ
1/2
TL082
1/2
TL082
+
+
+
1.5 kΩ
30 kΩ
1.5 kΩ
VCC -
+
-
1/2
TL082
220 pF
VCC +
-
Input
VCC +
220 pF
43 kΩ
-
43 kΩ
30 kΩ
-
43 kΩ
Output
B
VCC -
VCC -
VCC -
Output A
Output A
Output B
2 kHz/div
Second-Order Bandpass Filter
fo = 100 kHz, Q = 30, GAIN = 4
2 kHz/div
Cascaded Bandpass Filter
fo = 100 kHz, Q = 69, GAIN = 16
Figure 24. Positive-Feedback Bandpass Filter
12
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PACKAGE OPTION ADDENDUM
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18-Sep-2008
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
TL082IDRQ1
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL082QDRQ1
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TL082-Q1 :
TL082
• Catalog:
• Military: TL082M
NOTE: Qualified Version Definitions:
- TI's standard catalog product
• Catalog
• Military - QML certified for Military and Defense Applications
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