Download Lecture pn Junctions

Detectors
RIT Course Number 1051-465
Lecture N: Lecture Title
1
Section Title Slide
2
pn Junction Review
• PN junctions are fabricated from a monocrystalline piece of semiconductor
with both a P-type and N-type region in proximity at a junction.
• The transfer of electrons from the N side of the junction to holes
annihilated on the P side of the junction produces a barrier voltage. This is
0.6 to 0.7 V in silicon, and varies with other semiconductors.
• A forward biased PN junction conducts a current once the barrier voltage is
overcome. The external applied potential forces majority carriers toward
the junction where recombinetion takes place, allowing current flow.
• A reverse biased PN junction conducts almost no current. The applied
reverse bias attracts majority carriers away from the junction. This
increases the thickness of the nonconducting depletion region.
• Reverse biased PN junctions show a temperature dependent reverse leakage
current. This is less than a µA in small silicon diodes.
3
N-type
4
Band Diagram: Acceptor Dopant in Semiconductor
•
•
•
For Si, add a group III element to “accept” an electron and
make p-type Si (more positive “holes”).
“Missing” electron results in an extra “hole”, with an
acceptor energy level EA just above the valence band EV.
– Holes easily formed in valence band, greatly
increasing the electrical conductivity.
Fermi level EF moves down towards EV.
EC
EF
EV
EA
p-type Si
5
P-type
6
Conduction in p/n-type Semiconductors
7
8
PN Junction: Band Diagram
•
•
•
•
Due to diffusion, electrons move from n
to p-side and holes from p to n-side.
Causes depletion zone at junction where
immobile charged ion cores remain.
Results in a built-in electric field (103 to
105 V/cm), which opposes further
diffusion.
Note: EF levels are aligned across pn
junction under equilibrium.
EC
EF
EV
n-type electrons
EF
holes
p-type
pn regions in equilibrium
EC
EF
EV
––
–
+–– –
+
+ + –
––
+ ++–
+ ++––
++
Depletion Zone
9
PN Junction: Band Diagram under Bias
• Forward Bias: negative voltage on n-side promotes diffusion
of electrons by decreasing built-in junction potential  higher
current.
• Reverse Bias: positive voltage on n-side inhibits diffusion of
electrons by increasing built-in junction potential  lower
current.
Equilibrium
p-type
n-type
Forward Bias
p-type
Reverse Bias
p-type
n-type
n-type
–V
+V
e–
e–
e–
10
Majority Carriers
Minority Carriers
Forward & Reverse Biased
11
PN Junction: IV Characteristics
•
Current-Voltage Relationship
I  I o [e
•
•
•
eV / kT
 1]
Forward
Bias
Forward Bias: current exponentially increases.
Reverse Bias: low leakage current equal to ~Io.
Ability of pn junction to pass current in only one direction is known as “rectifying” behavior.
Reverse
Bias
12
PN Junction: IV Characteristics
•
Current-Voltage Relationship
I  I o [e
•
•
•
eV / kT
 1]
Forward Bias: current exponentially increases.
Reverse Bias: low leakage current equal to ~Io.
Ability of pn junction to pass current in only one direction is known as “rectifying” behavior.
13
Doped Silicon
14
Suitable doped silicon bandgaps for detectors
15
Generation & Recombination
• In intrinsic semiconductor
– n = p = ni
• ni is strongly temperature dependent
• This is because at a give temperature
– Recombination of electrons (ri)= thermal generation rate (gi)
• ri = Bnp = gi (= Bni**2 for intrinsic semiconductor)
16
Photon induced excess carriers
17
Photon induced excess carriers
18
Photon induced excess carriers
19
xx
20
xx
21
xx
22
xx
23
Rate of change of carrier concentration
24
25
26
Diffusion
27
28
29
30
31
PN Junction
32
PN Junction
33
34
35
36
Put it all together …
37
Steps
•
•
•
•
•
•
•
•
PN junction is reversed biased.
Shutter opened and photon enters semiconductor
Interacts with lattice generates minority carrier
Minority carrier diffuses till it reaches vicinity of junction
Junction field drives minority carrier across junction and discharges junction capacitance
At the end of some integration time measure voltage (V2)across junction.
Reset junction voltage to initial reverse bias value and measure its value (V1).
Difference in voltage is proportional to signal.
ΔQ = C1(V1-Vbi) * (V1-vbi) – C2(V2-Vbi) * (V2-Vbi)
38
Designing a junction
39
Dark Signal
40
Slide Title
• xxxxxx
41
Section Title Slide
42
Slide Title
• xxxxxx
43
Section Title Slide
44
Slide Title
• xxxxxx
45