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Compact, 1.5 A Linear Charger
for Single-Cell Li+ Battery
ADP2291
FEATURES
GENERAL DESCRIPTION
Simple, safe linear charger for single-cell lithium battery
4.5 V to 12 V input voltage range
Adjustable charging current up to 1.5 A
Low cost PNP external pass element
Automatic reverse isolation with no external blocking diode
Output overshoot protection
Deep discharge precharge mode
Thermal shutdown
Automatic recharge
Programmable termination timer
LED charging status indicator
4.2 V output voltage with ±1% accuracy over line and
temperature
1 µA shutdown supply current
Small, 8-lead MSOP and 3 × 3 mm LFCSP packages
The ADP2291 is a constant-current/constant-voltage linear
charger for a single-cell, lithium ion battery, requiring just a few
components to provide a simple and safe charging system that
operates from a wide 4.5 V to 12 V input voltage range. It
features an internally controlled, multistep charging cycle that
improves battery life.
An external, low cost PNP provides the charging current to the
battery, and an external resistor sets the maximum charge
current. A small, external capacitor programs the maximum
charge time. The controller includes an LED driver to indicate
the battery charging status.
Safety features include charging stop mode for battery faults,
output overshoot protection, and thermal shutdown. The
ADP2291 also features automatic reverse isolation, which does
not require an additional blocking diode.
APPLICATIONS
The multistep charge cycle optimizes the battery charging time
in a safe manner. It features a trickle charge mode for a deeply
discharged cell and a fast charging mode with a maximum
current of 1.5 A. The ADP2291 controls the end of charge with
a 4.2 V output voltage that is 1% accurate over line and temperature. It automatically recharges the battery if the cell voltage
drops. When the input supply is removed, the part enters a low
current state and reduces the current drawn from the battery to
below 1 µA.
Wireless handsets
Smart handhelds and PDAs
Digital cameras
Single-cell, lithium ion-powered systems
Cradle chargers
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The ADP2291 is available in both a small, 8-lead MSOP
package and a 3 × 3 mm LFCSP package that is ideally suited
for small, portable applications.
TYPICAL OPERATING CIRCUIT
RS
INPUT
4.6V–12V
Q1
+
COUT
CIN
CS
DRV
IN
BAT
ADP2291
CHG
GND
CTIMER
ADJ
SHUTDOWN
04873-001
TIMER
Figure 1.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
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Fax: 781.461.3113
© 2005 Analog Devices, Inc. All rights reserved.
ADP2291
TABLE OF CONTENTS
Features .............................................................................................. 1
Overshoot Protection................................................................. 10
Applications....................................................................................... 1
Power Supply Checks................................................................. 10
General Description ......................................................................... 1
Thermal Shutdown .................................................................... 11
Typical Operating Circuit................................................................ 1
Application Information................................................................ 12
Specifications..................................................................................... 3
Setting the Maximum Charge Current.................................... 12
Absolute Maximum Ratings............................................................ 5
Setting the Maximum Charge Time ........................................ 12
ESD Caution.................................................................................. 5
External Capacitors.................................................................... 12
Pin Configurations and Function Descriptions ........................... 6
Reverse Input Protection........................................................... 12
Typical Performance Characteristics ............................................. 7
External Pass Transistor ............................................................ 13
Theory of Operation ...................................................................... 10
Typical Application Circuit....................................................... 14
Precharge Mode.......................................................................... 10
Charge Termination................................................................... 14
End-of-Charge Mode................................................................. 10
Selectable Charge Current......................................................... 14
Shutdown Mode.......................................................................... 10
Thermal Protection.................................................................... 14
Charge Restart............................................................................. 10
Printed Circuit Board Layout Considerations ....................... 16
Programmable Timer................................................................. 10
LFSCP Layout Considerations.................................................. 16
Charge Status Indicator ............................................................. 10
Outline Dimensions ....................................................................... 17
Automatic Reverse Isolation ..................................................... 10
Ordering Guide .......................................................................... 17
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REVISION HISTORY
11/05—Rev. 0 to Rev. A
Changes to Equation 7 ................................................................... 13
Changes to Figure 26...................................................................... 15
Changes to Table 7.......................................................................... 16
Changes to Ordering Guide .......................................................... 17
Updated Outline Dimensions ....................................................... 17
10/04—Initial Version: Revision 0
Rev. A | Page 2 of 20
ADP2291
SPECIFICATIONS
VIN = 5.5 V, VBAT = 4.2 V, RADJ open, TA = –40°C to +85°C, typical values are at 25°C, unless otherwise noted.1
Table 1.
Parameter
POWER SUPPLY, IN
Input Voltage
Current Draw
Conditions
Min
Typ
Max
Unit
6
1.4
12
9
1.8
V
mA
mA
4.2
4.242
V
45
1
mV
µA
µA
µA
4.5
Fast charge/precharge/end-of-charge modes
Timeout/shutdown/battery fault
BATTERY VOLTAGE, BAT
Voltage Accuracy, End-of-Charge (VBAT, EOC)
Load Regulation, No Battery
Current Draw
Current Draw
Reverse Leakage Current
FAST CHARGE MODE
Sense Voltage Setpoint (VRS)
Sense Voltage Setpoint (VRS)
Current Regulation Adjustment
PRECHARGE MODE
Sense Voltage Setpoint (VRS)
TA = 0°C to +50°C
VIN = 4.5 V to 12 V
VIN – VCS = VRS/10
VIN – VCS = 0 to VRS
Timeout mode, VIN = 4.5 V to 12 V
Battery fault/shutdown mode, VIN = 4.5 V to 12 V
Power-down mode: VIN = float, VBAT = 4.2 V
4.158
VIN – VCS, RADJ = open
VIN = 4.5 V to 12 V
VBAT = 3.6 V
VIN – VCS, RADJ = 100 kΩ
VIN = 4.5 V to 12 V
VBAT = 3.6 V
Per V of (3 V – VADJ)
140
150
160
mV
40
50
60
mV
−80
0.1
0.1
67
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Sense Voltage Setpoint (VRS)
BAT Precharge Threshold
Hysteresis
SHUTDOWN MODE
ADJ Shutdown Threshold
Hysteresis
Pull-Up Current from ADJ
POWER-DOWN MODE
VIN Power-Down Threshold
Hysteresis
VIN_Good Comparator
Threshold (VIN > VBAT)
Hysteresis
EOC COMPARATOR
Current Threshold
Current Threshold
Hysteresis
RESTART COMPARATOR
BAT Restart Threshold
VIN – VCS, RADJ = open
VIN = 4.5 V to 12 V
VBAT = 2 V
VIN – VCS, RADJ = 100 kΩ
VIN = 4.5 V to 12 V
VBAT = 2 V
VBAT rising
mV/V
10
15
20
mV
5
10
15
mV
2.85
V
mV
0.45
V
mV
µA
4
V
mV
2.65
70
VADJ falling, VIN = 4.5 V
0.30
40
40
VADJ = 0
VIN rising
3.6
220
VIN rising
125
170
110
220
mV
mV
VIN – VCS falling, RADJ = open, relative to VRS
VIN – VCS falling, RADJ = 100 kΩ, relative to VRS
7
6
10
10
12
13
16
%
%
mV
VIN > 4.5 V, VBAT falling, relative to VBAT, EOC
−170
Rev. A | Page 3 of 20
mV
ADP2291
Parameter
BATTERY CHARGE TIMER
Charge/Discharge TIMER Current
Low Threshold
High Threshold
High-Low Threshold Delta2
OVERSHOOT PROTECTION
BAT Threshold
Current Sink
CHG OUTPUT
Output Voltage Low
Output Leakage Current
BASE DRIVE CAPABILITY
Maximum Base Drive Current
THERMAL SHUTDOWN
Shutdown Threshold
Hysteresis
1
2
Conditions
Min
Typ
Max
Unit
21.0
24.0
1.2
2.0
27.0
µA
V
V
mV
750
4.7
850
<2 ms duration
5
1.5
Current = 20 mA
VCHG = 5 V
0.1
40
TA rising
All limits at temperature extremes are guaranteed via correlation using standard statistical quality control (SQC). Typical values are at TA = 25°C.
Guaranteed by design; not tested in production.
Rev. A | Page 4 of 20
V
A
0.45
1
V
µA
mA
135
35
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5.3
°C
°C
ADP2291
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter
IN, DRV,1 CS, CHG to GND
BAT, ADJ, TIMER to GND
Operating Ambient Temperature
Operating Junction Temperature
θJA, 2-layer MSOP-8
θJA, 4-layer MSOP-8
θJA, 2-layer LFCSP-8
θJA, 4-layer LFCSP-8
Storage Temperature Range
Lead Temperature Soldering (10 sec)
1
Rating
−0.3 V to +13.5 V
−0.3 V to (VIN + 0.3 V)
−40°C to +85°C
−40°C to +125°C
220ºC/W
158ºC/W
62ºC/W
48ºC/W
−65°C to +150°C
300°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or
any other condition s above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Absolute maximum ratings apply individually only, not in
combination. Unless otherwise specified all other voltages
referenced to GND.
Pulling current from the DRV pin by driving it below ground while VIN is
applied can cause permanent damage to the device.
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ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. A | Page 5 of 20
ADP2291
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
CS 4
TOP VIEW
(Not to Scale)
8
CHG
7
TIMER
6
IN
5
ADJ
DRV 1
GND 2
BAT 3
CS 4
PIN 1
INDICATOR
ADP2291
TOP VIEW
(Not to Scale)
8 CHG
7 TIMER
6 IN
5 ADJ
Figure 3. 8-Lead LFCSP Pin Configuration
Figure 2. 8-Lead MSOP Pin Configuration
Table 3. Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
Mnemonic
DRV
GND
BAT
CS
ADJ
IN
TIMER
CHG
04873-003
BAT 3
ADP2291
04873-002
DRV 1
GND 2
Description
Base Driver Output. Controls the base of an external PNP pass transistor.
Ground.
Battery Voltage Sense Input.
Current Sense Resistor Negative Input.
Charging Current Adjust and Charger Shutdown Input.
Power Input and Current Sense Resistor Positive Input.
Timer Programming Input/Disable.
LED Charge Status Indicator. This is an open-collector output.
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Rev. A | Page 6 of 20
ADP2291
TYPICAL PERFORMANCE CHARACTERISTICS
800.0
4.21
700.0
600.0
4.205
ICHG (mA)
VBAT (V)
500.0
4.20
400.0
300.0
200.0
4.195
4.19
4
6
8
VIN (V)
0.0
2.50
12
10
04873-007
04873-004
100.0
Figure 4. Battery Voltage vs. Input Voltage
3.00
3.50
IBAT (V)
4.00
4.50
Figure 7. Charge Current vs. Battery Voltage
RS = 200 mΩ, VADJ = 3 V
4.21
250
200
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IREVERSE (nA)
VBAT (V)
4.205
4.20
150
100
4.195
–25
0
25
50
TEMPERATURE (°C)
75
100
0
–50
125
Figure 5. Battery Voltage vs. Temperature
–25
0
25
50
75
TEMPERATURE (°C)
100
125
Figure 8. Battery Reverse Current vs. Temperature
VIN = float, VBAT = 4.2 V
4.22
4.10
4.09
VRESTART (V)
4.21
4.20
4.08
4.07
4.19
4.06
4.18
0
200
400
ICHG (mA)
600
4.05
–40
800
Figure 6. Battery Voltage vs. Charge Current
RS = 200 mΩ, VADJ = 3 V
04873-009
04873-006
VBAT (V)
04873-008
4.19
–50
04873-005
50
–20
0
20
40
60
TEMPERATURE (°C)
Figure 9. Restart Threshold
Rev. A | Page 7 of 20
80
100
16.0
153
15.8
152
15.6
151
VRS (mV)
15.4
150
04873-010
15.0
4
6
8
VIN (V)
148
4
12
10
04873-013
149
15.2
15.5
152
15.4
151
15.3
10
12
150
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15.2
149
04873-011
15.1
–50
8
VIN (V)
Figure 13. Fast Charge VRS vs. Input Voltage
VRS (mV)
VRS (mV)
Figure 10. Precharge VRS vs. Input Voltage
6
–25
0
25
50
75
TEMPERATURE (°C)
100
148
–50
125
Figure 11. Precharge VRS vs. Temperature
04873-014
VRS (mV)
ADP2291
–25
0
25
50
75
TEMPERATURE (°C)
100
125
Figure 14. Fast Charge VRS vs. Temperature
160
16
140
14
VRS (mV)
12
100
80
10
8
100
1k
RADJ (kΩ)
40
100
10k
Figure 12. Precharge VRS vs. RADJ
04873-015
60
04873-012
VRS (mV)
120
1k
RADJ (kΩ)
Figure 15. Fast Charge VRS vs. RADJ
Rev. A | Page 8 of 20
10k
ADP2291
135
CH1 = VBAT
4.18V OFFSET
130
BASE DRIVE (mA)
1
125
CH2 = VIN
5V OFFSET
VIN = 5V TO 8V
04873-016
120
4
6
8
VIN (V)
10
2
04873-018
115
12
CH1 10.0mV BW CH2 1.00V
Figure 16. Base Drive vs. Input Voltage
BW M200µs
CH2
6.18V
Figure 18. Line Transient Response
IBAT = 350 mA
122
120
CH1 = VBAT
4.18V OFFSET
1
116
114
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112
110
108
106
104
–40
–20
0
20
40
60
TEMPERATURE (°C)
80
04873-019
CH3 = IBAT
200mA/DIV
IBAT = 70mA TO 700mA
04873-017
BASE DRIVE (mA)
118
3
CH1 20.0mV BW
CH3 10.0mVΩ
100
M100µs
CH3
Figure 19. Load Transient Response
VIN = 5 V
Figure 17. Base Drive vs. Temperature
VIN = 5 V
Rev. A | Page 9 of 20
10.0mV
ADP2291
THEORY OF OPERATION
The ADP2291 is intended to charge a single-cell, lithium battery
from a supply voltage or wall adapter providing 4.5 V to 12 V.
The charge controller adjusts the base current of an external
PNP transistor to optimize current and voltage applied to the
battery during charging. A low value resistor placed in series
with the battery charging current provides current measurement for the ADP2291.
CHARGE RESTART
To ensure safety and long battery lifetime, the ADP2291 charges
the battery using a simple step-by-step cycle, as shown in Figure 26.
The normal charge cycle begins by measuring the battery
voltage to determine charge level. If the battery is deeply discharged, then low current precharge is initiated. Once precharge
is complete, normal fast charge at the maximum current (denoted
as IMAX) begins. This maximum current can be adjusted by
varying the sense resistor value or by varying the voltage at the
adjust pin. As the battery approaches full capacity, the charging
current is reduced until the end-of-charge condition is reached.
Batteries that are not deeply discharged skip the precharge
mode and immediately begin fast charging. Each of these
modes and associated fault conditions is discussed in detail.
PROGRAMMABLE TIMER
PRECHARGE MODE
Once the charge is complete in the end-of-charge or timeout
mode, the ADP2291 continually monitors the cell voltage and
charge current. When the cell voltage falls by 100 mV or the
charge current increases beyond the EOC hysteresis, the ADP2291
initiates another charge cycle to keep the cell fully charged. See
Figure 26.
The on-chip timer, controlled by an external capacitor CTIMER,
determines the timeout intervals of the various charger modes.
For example, a CTIMER value of 0.1 µF results in a precharge
timeout interval of 30 minutes, a fast charge timeout of 3 hours,
and an end-of-charge timeout of 30 minutes. The ratio between
precharge and end-of-charge to fast charge timeout is always
1/6. All these time intervals are proportional to the CTIMER
capacitor value, allowing them to be adjusted over a wide range.
Connecting the TIMER pin to ground disables the timer.
CHARGE STATUS INDICATOR
The ADP2291 contains a charge status output, CHG, that sinks
current when the ADP2291 is charging the battery. This output
can be used as a visual signal by connecting it to an LED, or it
can be used to generate a logic-level charge status signal by
connecting a resistor between CHG and logic high.
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For deeply discharged cells, the ADP2291 charges at a reduced
rate when the battery voltage VBAT < 2.8 V. This reduced rate is
IMAX/10 when the ADJ pin voltage is 3 V and IMAX/5 when the
ADJ pin voltage is 1.5 V. For ADJ pin voltages in between 3 V
and 1.5 V, the charge current can be interpolated. If the battery
voltage does not increase past 2.8 V before the precharge timer
elapses (typically 30 minutes), a battery fault is assumed and the
ADP2291 shuts down and does not restart until the input voltage
is cycled off and then back on. Note that in this mode, shutdown
commands are ignored.
AUTOMATIC REVERSE ISOLATION
When the voltage on the BAT pin is higher than the voltage on
IN, the ADP2291 automatically connects the base of the pass
device to BAT. This removes the necessity of having an external
diode between the pass device and battery, further reducing the
charger’s footprint and component count.
END-OF-CHARGE MODE
OVERSHOOT PROTECTION
Once the voltage loop reduces the charge current to 1/10 of its
nominal value, IMAX (irrespective of the ADJ voltage), the ADP2291
detects the end-of-charge (EOC) state, and the charge status
indicator becomes high impedance.
In the event of a battery disconnect during charging, a voltage
overshoot condition on BAT could occur. The ADP2291
includes an overshoot protection circuit that activates when
VBAT rises to 5 V and sinks up to 1.5 A to protect the external
components.
Low level charging continues until the timer terminates the
charge (nominally 30 minutes).
POWER SUPPLY CHECKS
SHUTDOWN MODE
When the ADJ input is pulled below 0.4 V, the ADP2291 is put
into shutdown mode. When in this mode, the charger is disabled; the current drawn from the battery falls to less than
1 µA; and the current drawn from IN falls to 0.7 mA.
When the charger is re-enabled, the charger returns to the start
state but quickly sequences through the states until the proper
charge mode is reached.
To ensure proper operation, the ADP2291 checks the absolute
voltage level of the input supply and the supply voltage relative
to the battery. When the supply IN is below 3.8 V, the chip is
internally powered down and does not respond to external
control. In this power-down mode, the device draws less than
1 µA from the battery. The VIN good comparator halts operation
if the supply voltage is less than 165 mV above the battery
voltage, ensuring that charging occurs only if the supply voltage
is sufficient.
Rev. A | Page 10 of 20
ADP2291
THERMAL SHUTDOWN
A 35°C temperature hysteresis is included so that the ADP2291
does not return to operation during thermal shutdown until the
on-chip temperature drops below 100°C.
If the ADP2291 junction temperature rises above 135°C,
thermal shutdown occurs. Extreme junction temperatures can
be the result of excessive current operation and/or high ambient
temperatures.
IN
CS
DRV
BAT
3V
5V
GM
GM
GM
ADJ
1.2V
VOLTAGE
REFERENCE
TEMP
SHUTDOWN
RESTART
0.4V
IN
BAT
4.1V
VIN_GOOD
BAT
CONTROL
LOGIC
PRECHARGE
BAT
2.5V
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IN
POWER_DOWN
3.8V
C/10
END_OF_CHARGE
CHG
TIMER
TIMER
Figure 20. Functional Block Diagram
Rev. A | Page 11 of 20
04873-020
IPNP
ADP2291
APPLICATION INFORMATION
SETTING THE MAXIMUM CHARGE CURRENT
SETTING THE MAXIMUM CHARGE TIME
The maximum charge current is set by choosing the proper
current sense resistor, RS, and the voltage on the ADJ input.
The charger nominally regulates its output current at the point
where the voltage across the current sense resistor VIN – VCS
(defined as VRS) is 150 mV. This setpoint voltage can be adjusted
by pulling down on the ADJ input, which is internally attached
through a 100 kΩ pull-up resistor to 3 V. Each volt of pull-down
from 3 V reduces VRS by 67 mV during fast charge. A minimum
of 50 mV is reached when a 100 kΩ resistor is attached between
ADJ and ground. During slow charge, the voltage across the
current sense resistor is 15 mV with no connection to ADJ, and
it drops to 10 mV with a 100 kΩ resistor attached to ground.
Therefore, the maximum charge rate IMAX is calculated as
The maximum charge time is intended as a safety mechanism
to prevent the charger from trickle charging the cell indefinitely.
It does not terminate charging under normal charging conditions, but only when there is a failure to reach end-of-charge.
A typical cell charges at a 1 C rate in about 1.5 hours, depending
on the cell type, temperature, and manufacturer. Generally,
a three-hour time limit is sufficient to prevent a normal charge
cycle from being interrupted by the charge timer. It is recommended that the cell manufacturer be consulted for timing
details.
I MAX
CTIMER = tCHG(minutes) ×
V (mV)
= RS
RS (mΩ)
(1)
where 50 mV ≤ VRS ≤ 150 mV.
After determining suitable values for VRS and RS, the value of
VADJ and RADJ are calculated as
VADJ =
VRS (mV ) + 50 mV
V
66.7 mV
1 µF
1800 minutes
(4)
The precharge and end-of-charge periods are 1/6 the duration
of the fast charge time limit. The charge timers are completely
disabled by connecting the TIMER pin to ground. If the timers
are disabled, the FAULT and TIMEOUT states are never reached,
so the timers should only be disabled if charging is monitored
and controlled externally.
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(2)
⎛ VADJ ⎞
RADJ = 100 kΩ × ⎜
⎜ 3 V − VADJ ⎟⎟
⎠
⎝
(3)
Examples of resistor combinations are shown in Table 4.
Table 4. Examples of RS and RADJ Selection
IMAX
1.5 A
1A
750 mA
500 mA
750 mA
500 mA
375 mA
250 mA
500 mA
333 mA
250 mA
167 mA
The maximum charge time is set by selecting the value of the
CTIMER capacitor. Calculate the timer capacitance using
RS mΩ
100
100
100
100
200
200
200
200
300
300
300
300
VRS mV
150
100
75
50
150
100
75
50
150
100
75
50
VADJ V
3
2.25
1.87
1.5
3
2.25
1.87
1.5
3
2.25
1.87
1.5
RADJ
Open
300 K
167 K
100 K
Open
300 K
167 K
100 K
Open
300 K
167 K
100 K
EXTERNAL CAPACITORS
Use an input supply capacitor (CIN) with a value in the
1 µF to 10 µF range and place it close to the ADP2291. This
should provide adequate input bypassing, but the selected
capacitor should be checked in the actual application circuit.
Check that the input voltage does not droop or overshoot
excessively during the start-up transient.
Use a battery output capacitor (COUT) with a value of at least
10 µF. This capacitance provides compensation when no battery
load is present. In addition, the battery and interconnections
appear inductive at high frequencies and must be accounted for
when the charger is operated with a battery load. Therefore, a
small amount of output capacitance is necessary to compensate
for the inductive nature of the battery and connections. Use a
minimum output capacitance value of 1 µF for applications
where the battery cannot be removed.
REVERSE INPUT PROTECTION
The Diode D1, shown in Figure 22 through Figure 25, is
optional. It is required only if the input adapter voltage can
be applied with a reverse polarity.
If the adapter voltage is high enough, a Schottky diode is recommended to minimize the voltage difference from the adapter to
the charger input and the power dissipation. Choose a diode with
a continuous current rating high enough to handle battery charging
current at the maximum ambient temperature. Use a diode with a
voltage rating greater than the maximum adapter voltage.
Rev. A | Page 12 of 20
ADP2291
In cases where the voltage drop across the protection device
must be kept low, a P MOSFET is recommended. Connect the
MOSFET as shown in Figure 21.
The power handling capability of the PNP pass transistor is
another important parameter. The maximum power dissipation
of the pass transistor is estimated using
RS
INPUT
4.6V–12V
PDISS (W) = IMAX × (VADAPTER(MAX) − VPROTECT − VRS − VBAT) (7)
CIN
CS
where VRS = 50 mV to 150 mV at VADJ = 1.5 V to 3.0 V,
VBAT = 2.8 V, the lowest cell voltage where fast charge can occur.
DRV
IN
04873-021
ADP2291
CHG
Figure 21. Reverse Input Protection
EXTERNAL PASS TRANSISTOR
Choose the external PNP pass transistor based on the given
operating conditions and power handling capabilities. The pass
device is determined by the base drive available, the input and
output voltage, and the maximum charge current.
Select the pass transistor with a collector-emitter breakdown
voltage that exceeds the maximum adapter voltage. A VCEO
rating of at least 15 V is recommended.
Note that the adapter voltage can be either preregulated or
unregulated. In the preregulated case, the difference between
the maximum and minimum adapter voltage is small. In this
case, use the maximum regulated adapter voltage to determine
the maximum power dissipation. In the unregulated case, the
adapter voltage can have a wide range specified. However, the
maximum voltage specified is usually with no load applied.
Therefore, the worst-case power dissipation calculation often
leads to an over-specified pass device. In either case, it is best to
determine the load characteristics of the adapter to optimize the
charger design.
For example:
VADAPTER(MIN) = 5.0 V
VADAPTER(MAX) = 6.0 V
IMAX = 500 mA
VPROTECT = 0.2 V at 500 mA
VADJ = 3 V
VRS = 150 mV
Providing a charge current of IMAX with a minimum base drive
of 40 mA requires a PNP beta of at least
www.BDTIC.com/ADI
βMIN = IMAX = IMAX
40 mA
IΒ
(5)
Note that the beta of a transistor drops off with collector
current. Therefore, make sure the beta at IMAX meets the
minimum requirement.
βMIN = IMAX = 500 mA = 12.5
IΒ
40 mA
VCE(SAT) = VADAPTER(MIN) − VPROTECT − VRS − VBAT
= 5.0 V − 0.2 V − 0.15 V − 4.2 V
= 0.45 V
For cases where the adapter voltage is low (less than 5.5 V),
calculate the saturation voltage by
VCE(SAT) = VADAPTER(MIN) − VPROTECT − VRS − VBAT
(6)
PDISS (W) = IMAX × (VADAPTER(MAX) − VPROTECT − VRS − VBAT)
= 0.50 A × (6.0 V − 0.2 V − 0.15 V − 2.8 V)
= 1.4 W
where VPROTECT is the forward drop of the reverse input
protection.
A guide for selecting the PNP pass transistor is shown in Table 5.
Table 5. PNP Pass Transistor Selection Guide
Vendor
Fairchild
ON Semiconductor®
Philips
ZETEX
Part Number
FSB6726
NZT45H8
MTB35200
BCP53T1
MMJT9435
BCP51
ZXT10P20DE6
ZXT2M322
FZT549
FMMT549
Package
SuperSOT
SOT223
TSOP-6
SOT223
SOT223
SOT223
SOT23-6
2 mm × 2 mm MLP
SOT223
SOT23
Rev. A | Page 13 of 20
Max PD @ 25°C
0.5 W
1.5 W
0.625 W
1.5 W
1.6 W
1.3 W
1.1 W
1.5 W
2W
0.5 W
Beta @ 1 A
150
110
200
35
200
50
270
270
130
130
VCE (SAT)
0.5 V
0.1 V
0.175 V
0.3 V
0.18 V
0.5 V
0.17 V
0.17 V
0.25 V
0.25 V
ADP2291
TYPICAL APPLICATION CIRCUIT
INPUT
4.6V–12V
D1
BAT1000
RS
200mΩ
Q1
FZT549
+
CIN
2.2µF
CS
IN
RS
200mΩ
BAT
CHG
Q1
FZT549
GND
CS
COUT
10µF
DRV
IN
ADJ
R2
100kΩ
CTIMER
100nF
+
CIN
2.2µF
LI-ION
CELL
ADP2291
TIMER
D1
BAT1000
COUT
10µF
DRV
Q2
2N7002
LOW/HIGH
04873-024
A typical application circuit is shown in Figure 22. The circuit is
capable of a 750 mA charge current for an input voltage of 4.5 V
to 6 V. Higher input voltages can be used, but the increased power
dissipation of the pass device must be taken into account.
INPUT
4.6V–12V
BAT
ADP2291
CHG
Figure 24. Selectable Charge Current Circuit
GND
ADJ
CTIMER
100nF
Figure 22. Typical Application Circuit
CHARGE TERMINATION
In some applications, the charger is required to terminate charging when the EOC threshold is reached. Automatic charger
restart is not desired. Adding components R1, C1, and Q2
terminates charging when the CHG pin opens and prevents
further charging until the adapter is removed and reasserted.
INPUT
4.6V–12V
D1
BAT1000
RS
200mΩ
THERMAL PROTECTION
In applications where the overall size must be small or the input
voltage range is wide, adding thermal regulation is suggested.
This allows the charger to monitor the temperature of the pass
device and decrease the charge current as the temperature
increases. By adding an NTC thermistor to the ADJ pin, it is
possible to accomplish this; however, care is still required to
ensure that the power dissipation of the pass device is not
exceeded.
INPUT
4.6V–12V
CS
R1
500kΩ
RS
200mΩ
Q1
FZT549
www.BDTIC.com/ADI
Q1
FZT549
CIN
2.2µF
+
CIN
2.2µF
D1
BAT1000
COUT
10µF
DRV
IN
LI-ION
CELL
CS
GND
GND
CTIMER
100nF
ADJ
CTIMER
100nF
ADJ
R1
470k
NTC LOCATED
NEAR Q1
R2
100k
04873-023
C1
100nF
BAT
CHG
TIMER
Q2
2N7002
LI-ION
CELL
ADP2291
BAT
TIMER
DRV
IN
ADP2291
CHG
+
COUT
10µF
04873-025
04873-022
TIMER
Figure 25. Thermal Regulation Circuit
Figure 23. Self-Termination Circuit
Some suggested NTC thermistor suppliers are listed in Table 6.
SELECTABLE CHARGE CURRENT
Table 6. NTC Thermistor Manufacturers
In applications where the charge current needs to be selectable,
use the circuit shown in Figure 24. This circuit allows a processor to determine if the charge current needs to be reduced due
to an input source limitation or a different battery capacity
option or simply to reduce the stress on the pass transistor.
R2 and Q2 allow the charge current to be selected between
high, which results in a charge current of 750 mA; and low,
which results in a charge current of 250 mA.
Vendor
BetaTHERM
Murata
Panasonic
Vishay
Rev. A | Page 14 of 20
Part Number
SMD2500KJ435J
NCP18WM474J
ERTJ0EV474J
2322 615 1.474
Website
www.betatherm.com
www.murata .com
www.panasonic.com
www.vishay.com
ADP2291
VIN < 3.8V
FROM ANYWHERE
ASYNCHRONOUSLY
POWER-DOWN
VRS = 0mV
CHG = OPEN
VIN > 3.8V
START
VRS = 0mV
CHG = OPEN
START SEQUENCE ENDS
VBAT > 2.8V
PRECHARGE
VRS = 15mV
CHG = LOW
VBAT < 2.8V
FAST CHARGE
VRS = 150mV
CHG = LOW
IPNP < C/10 AND
VBAT > 4.1V
T = 30 MIN
VBAT < 4.1V OR
IPNP > C/10
VADJ < 0.4V
BATTERY
FAULT
VRS = 0mV
CHG = OPEN
END OF
CHARGE
VRS = 15mV
CHG = OPEN
T = 3 HOUR
T = 30 MIN
VADJ < 0.4V
SHUTDOWN
VRS = 0mV
CHG = OPEN
VADJ < 0.4V
TIME OUT
VRS = 0mV
CHG = OPEN
VBAT < 4.1V
www.BDTIC.com/ADI
TEMP > 135°C
FROM ANYWHERE
ASYNCHRONOUSLY
Figure 26. State Diagram for the ADP2291
CTIMER = 0.1 µF
Rev. A | Page 15 of 20
04873-026
VADJ > 0.4V AND TEMP < 100°C
ADP2291
PRINTED CIRCUIT BOARD LAYOUT
CONSIDERATIONS
Note that the via diameter is small to prevent the solder
from flowing through the via and leaving voids in the
thermal pad solder joint.
Use the following general guidelines when designing printed
circuit boards:
•
Keep the output capacitor as close to the BAT and GND
pins as possible.
•
Keep the input capacitor as close to the IN and GND pins
as possible.
•
PC board traces with larger cross-sectional areas remove
more heat from the pass transistor. For optimum heat
transfer, specify thick copper and use wide traces.
•
Use additional copper layers or planes to reduce thermal
resistance. When connecting to other layers, use multiple
vias if possible.
Note also that the thermal pad is attached to the die substrate; therefore, the thermal planes to which the vias
attach the package must be electrically isolated or
connected to GND.
•
The solder mask opening should be about 120 microns
(4.7 mils) larger than the pad size, resulting in a minimum
of 60 microns (2.4 mils) clearance between the pad and the
solder mask.
•
The paste mask opening is typically designed to match the
pad size used on the peripheral pads of the LFCSP package.
This should provide a reliable solder joint as long as the
stencil thickness is about 0.125 mm. The paste mask for the
thermal pad needs to be designed for the maximum coverage
to effectively remove the heat from the package. However,
due to the presence of thermal vias and the size of the thermal pad, eliminating voids may not be possible.
•
The recommended paste mask stencil thickness is
0.125 mm. Use a laser cut stainless steel stencil with
trapezoidal walls.
LFSCP LAYOUT CONSIDERATIONS
The LFCSP package has an exposed die paddle on the bottom
that efficiently conducts heat to the PCB. To achieve the
optimum performance from the LFCSP package, give special
consideration to the layout of the PCB. Use the following layout
guidelines for the LFCSP package:
www.BDTIC.com/ADI
•
The pad pattern is shown in Figure 27. Follow the pad
dimension closely for reliable solder joints, while
maintaining reasonable clearances to prevent solder
bridging.
•
The thermal pad of the LFCSP package provides a low
thermal impedance path (approximately 20°C/W) to the
PCB; therefore, a properly designed PCB effectively conducts the heat away from the package. This is achieved by
adding thermal vias to the PCB that provide a thermal path
to the inner or bottom layers.
•
Use a no-clean, Type 3 solder paste for mounting the
LFCSP package. A nitrogen purge during the reflow
process is recommended.
•
The package manufacturer recommends that the reflow
temperature not exceed 220°C and the time above liquidus
be less than 75 seconds. Make sure the preheat ramp is
3°C/second or lower. The actual temperature profile
depends on the board’s density and should be determined
by the assembly house.
Table 7. Variables Description
2× VIAS, 0.250∅
35µm PLATING
Variable
Name
VX
VRS
0.73
0.30
1.80
0.90
2.36
VBAT, EOC
0.50
IMAX
1.40
3.36
C rate
04873-027
1.90
Figure 27. 3 mm × 3 mm LFCSP Pad Pattern
(Dimensions in millimeters)
Rev. A | Page 16 of 20
Description
The voltage on Pin X.
The regulation setpoint for the voltage across the
sense resistor (RS).
The battery voltage at the point charging current is
1/10 the current setpoint.
The charge current corresponding to VRS,
including the effects of ADJ pin voltage.
The charge current (mA) expressed as a multiple of
the nominal battery capacity (mAh). A 900 mAh
capacity battery, charged at a 1/10 C rate, is
equivalent to a 90 mA charge current.
ADP2291
OUTLINE DIMENSIONS
3.00
BSC SQ
0.50
0.40
0.30
0.60 MAX
1
8
PIN 1
INDICATOR
0.90 MAX
0.85 NOM
2.75
BSC SQ
TOP
VIEW
0.50
BSC
1.50
REF
1.89
1.74
1.59
4
5
1.60
1.45
1.30
0.70 MAX
0.65 TYP
12° MAX
PIN 1
INDICATOR
0.05 MAX
0.01 NOM
SEATING
PLANE
0.30
0.23
0.18
0.20 REF
Figure 28. 8-Lead Lead Frame Chip Scale Package [LFCSP_VD]
3 mm x 3 mm Body, Very Thin, Dual Lead
(CP-8-2)
Dimensions shown in millimeters
3.20
3.00
2.80
www.BDTIC.com/ADI
8
3.20
3.00
2.80
5
1
5.15
4.90
4.65
4
PIN 1
0.65 BSC
0.95
0.85
0.75
1.10 MAX
0.15
0.00
0.38
0.22
0.23
0.08
COPLANARITY
0.10
0.80
0.60
0.40
8°
0°
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MO-187-AA
Figure 29. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
ORDERING GUIDE
Model
ADP2291ARMZ-R71
ADP2291ACPZ-R71
ADP2291-EVAL
1
Temperature Range
−40°C to +85°C
−40°C to +85°C
Package Description
8-Lead MSOP
8-Lead LFCSP_VD
Evaluation Board
Z = Pb-free part.
Rev. A | Page 17 of 20
Package Option
RM-8
CP-8-2
Branding
P08
P08
ADP2291
NOTES
www.BDTIC.com/ADI
Rev. A | Page 18 of 20
ADP2291
NOTES
www.BDTIC.com/ADI
Rev. A | Page 19 of 20
ADP2291
NOTES
www.BDTIC.com/ADI
© 2005 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D04873-0-11/05(A)
Rev. A | Page 20 of 20