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P.NAGA SOWJANYA, Abdul Ahad Shaik , P.Jyothi / International Journal of Engineering Research and
Applications (IJERA)
ISSN: 2248-9622
www.ijera.com
Vol. 1, Issue 4, pp.1421-1426
For Power Quality Improvement Three-leg VSC Based DSTATCOM
and A T-Connected Transformer
P.NAGA SOWJANYA,
Abdul Ahad Shaik ,
P.G. Student, E.E.E. Department,
Nimra College Of Engg. & Technology
Vijayawada, A.P, INDIA..
Associate Professor & Head,
E.E.E. Department,
N.C.E.T,Vijayawada,
A.P.,INDIA..
P.Jyothi,
Associate Professor,
E.E.E. Department,
N.C.E.T.,Vijayawada,
A.P., INDIA..
Abstract—
In this paper for power quality improvement, a three leg vsc,
and a new three phase four wire DSTATCOM based on a Tconnected transformer is proposed. The three leg VSC
compensates harmonic current, reactive current, and
balances the load. The T-connected transformer connection
mitigates the neutral current. Two single phase transformers
are connected in T-configuration for interfacing to a three
phase four wire power distribution system and the required
rating of the VSC is reduced. The DC bus voltage of the
VSC is regulated during load conditions. The insulated
GATE BIPOLAR TRANSISTOR based VSC is supported
by a capacitor is supported by a capacitor and is controlled
for the required compensation of the load current. The
DSTATCOM is validated using MATLAB software with its
simulink and power system block set toolboxes
energy buffer and establishes a dc voltage for the normal
operation of the DSTATCOM system. The DSTATCOM
can be operated for reactive power compensation for power
factor correction or voltage regulation.
Fig. 1(b) shows the phasor diagram for the unity power
Keywords
components:Distribution
Static
Compensator (DSTATCOM), neutral current compensation,
power quality improvement-connected transformer, voltage
source converter (VSC)
I. INTRODUCTION
Three Phase four wire distribution systems are facing severe
power quality problems such as poor voltage regulation, high
reactive power, harmonics current burden, load unbalancing,
excessive neutral current. Most of the loads in these locations
are non linear loads in the distribution system. The
synchronous reference theory is used for the control of the
proposed DSTATCOM. The DSTATCOM is validated using
MATLAB software with its simulink and power system
block set toolboxes for power factor correction, voltage
regulation along with neutral current compensation,
harmonic elimination, and load balancing with linear loads
as well as non linear loads.
II.
Fig. 1. (a) Single-line diagram of DSTATCOM system. (b)
Phasor diagram for UPF operation. (c) ZVR operation.
SYSTEM CONFIGURATION AND
DESIGN
Fig. 1(a) shows the single-line diagram of the shuntconnected DSTATCOM-based distribution system. The dc
capacitor connected at the dc bus of the converter acts as an
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P.NAGA SOWJANYA, Abdul Ahad Shaik , P.Jyothi / International Journal of Engineering Research and
Applications (IJERA)
ISSN: 2248-9622
www.ijera.com
Vol. 1, Issue 4, pp.1421-1426
Fig. 2. Schematics of the proposed three-leg VSC with Tconnected transformer-based DSTATCOM connected in
distribution system factor operation.
The proposed DSTATCOM consisting of a three-leg VSC
and a T-connected transformer is shown in Fig. 2, where the
T connected transformer is responsible for neutral current
compensation. The windings of the T-connected transformer
are designed such that the mmf is balanced properly in the
transformer. A three-leg VSC is used as an active shunt
compensator along with a T-connected transformer, as
shown in Fig. 2, and this topology has six IGBTs, three ac
inductors, and one dc capacitor. The required compensation
to be provided by the DSTATCOM decides the rating of the
VSC components.
A. DC Capacitor Voltage
The minimum dc bus voltage of VSC of DSTATCOM
should be greater than twice the peak of the phase voltage of
the system[17]. The dc bus voltage is calculated as
Vdc =2√2VLL
√3m
(1)
where m is the modulation index
B. DC Bus Capacitor
The value of dc capacitor (Cdc) of VSC of DSTATCOM
depends on the instantaneous energy available to the
DSTATCOM during transients .The principle of energy
conservation is
applied as
1
2Cdc[_V 2dc_ − _V 2dc1_] = 3V (aI) t
(2)
where Vdc is the reference dc voltage and Vdc1 is the
minimum voltage level of dc bus, a is the overloading
factor, V is the phase voltage, I is the phase current, and t is
the time by which the dc bus voltage is to be recovered.
C. AC Inductor
The selection of the ac inductance (Lf ) of VSC depends
on,the current ripple icr,p-p , switching frequency fs , dc
bus voltage (Vdc), and Lf is given as [17]
Lf =√3mVdc
12afs
icr(p-p)
(3)
D. Ripple Filter
A low-pass first-order filter tuned at half the switching
frequency is used to filter the high-frequency noise from the
voltage at the PCC.
E. Design of the T-connected Transformer
Fig. 3(a) shows the connection of two single-phase
transformers in T-configuration for interfacing with a threephase four-wire system. The T-connected windings of the
transformer not only provide a path for the zero-sequence
fundamental current and harmonic currents but also offer a
path for the neutral current when connected in shunt at point
of common coupling (PCC).
Fig. 3. (a) T-connected transformer and the three-leg VSC.
(b) Phasor diagram.
The phasor diagram shown in Fig. 3(b) gives the following
relations to find the turn’s ratio of windings. If Va1 and Vb1
are the voltages across each winding and Va is the resultant
voltage, then
Va1
=
K1Va
(4)
Vb1
=
K2Va
(5)
where K1 and K2 are the fractions of winding in the phases.
III.
CONTROL OF DSTATCOM
A block diagram of the control scheme is shown in Fig. 4.
The load currents (iLa, iLb, iLc), the PCC voltages (vSa,
vSb, vSc), and dc bus voltage (vdc) of DSTATCOM are
sensed as feedback signals.
where m is the modulation index and a is the overload
factor..
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P.NAGA SOWJANYA, Abdul Ahad Shaik , P.Jyothi / International Journal of Engineering Research and
Applications (IJERA)
ISSN: 2248-9622
www.ijera.com
Vol. 1, Issue 4, pp.1421-1426
i∗q
=
iq
dc
+
iqr
.
(16)
The reference source current is obtained by reverse Park’s
transformation using (13) with i∗d as in (12) and i∗q as in
(16) and i∗0 as zero.
C. Computation of Controller Gains
The gains of the controllers are obtained using the Ziegler–
Nichols step response technique. A step input of amplitude
(U) is applied and the output response of the dc bus voltage
is obtained for the open-loop system. The maximum
gradient (G) and the point at which the line of maximum
gradient crosses the time axis (T) are computed.
Fig. 4. Control algorithm for the three-leg-VSC-based
DSTATCOMin a three phase four-wire system.
The d-axis and q-axis currents consist of fundamental and
harmonic components as
iLd
=
id
dc
+
id
ac
(9)
iLq
=
iq
dc
+
iq
ac
.
(10)
A. UPF Operation of DSTATCOM
The output of the proportional-integral (PI) controller at the
dc bus voltage of DSTATCOM is considered as the current
(iloss ) for meeting its losses
iloss(n) = iloss(n−1) + Kpd(vde(n) − vde(n−1)) +
Kidvde(n) (11)
The reference source current is therefore
i∗d = id dc + iloss .
(12)
The reference source current must be in phasewith the
voltage at the PCC but with no zero-sequence component.
B.Zero-Voltage Regulation (ZVR) Operation of
DSTATCOM
The compensating strategy for ZVR operation considers that
the source must deliver the same direct-axis component i∗d,
as mentioned in (12) along with the sum of quadrature-axis
current (iq dc) and the component obtained from the PI
controller (iqr ) used for regulating the voltage at PCC. The
amplitude of ac voltage (VS ) at PCC is calculated from the
ac voltages (vsa, vsb, vsc) as
VS = (2/3)1/2 (v2sa + v2sb + v2sc )1/2 .
(14)
Then, a PI controller is used to regulate this voltage to a
reference value as
iqr(n) = iqr(n−1) + Kpq (vte(n) − vte(n−1)) + Kiq vte(n)
(15)
where vte(n) = V ∗ S − VS(n) denotes the error between
reference(V ∗ S ) and actual (VS(n) ) terminal voltage
amplitudes at the nth sampling instant. Kpq and Kiq are the
proportional and integral gains of the dc bus voltage PI
controller. The reference source quadrature-axis current is
Fig. 5. MATLAB model of the T-connected transformer
and the three-leg-VSC-based DSTATCOM-connected
system.
The gains of the controller are computed using the following
equations:
Kp =1.2U
GT
(17)
Ki =0.6U
GT2
(18)
The gain values for both the PI controllers are computed and
are given in the Appendix.
D. Current-Controlled Pulse widthModulation (PWM)
Generator
In a current controller, the sensed and reference source
currents are compared and a proportional controller is used
for amplifying current error in each phase before comparing
with a triangular carrier signal to generate the gating signals
for six IGBT switches of VSC of DSTATCOM.
IV.
MODELING AND SIMULATION
The three-leg VSC and the T-connected-transformer-based
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P.NAGA SOWJANYA, Abdul Ahad Shaik , P.Jyothi / International Journal of Engineering Research and
Applications (IJERA)
ISSN: 2248-9622
www.ijera.com
Vol. 1, Issue 4, pp.1421-1426
DSTATCOM connected to a three-phase four-wire system
is modeled and simulated using the MATLAB with its
Simulink.
Fig. 6. Performance of a three-phase three-leg VSC and Tconnected transformer-based DSTATCOM for neutral
current compensation, load balancing, and voltage
regulation
load at 0.9 s. The loads are applied again at 1.0 and 1.1 s,
respectively
Fig. 7. Performance of a three-phase three-leg VSC and Tconnected transformer-based DSTATCOM for neutral
current compensation, load balancing, harmonic
compensation, and voltage regulation.
1. RESULTS AND DISCUSSION
The performance of the T-connected transformer and
threeleg-VSC-based three-phase four-wire DSTATCOM is
demonstrated for power factor correction and voltage
regulation along with harmonic reduction, load balancing,
and neutral current compensation. The developed model is
analyzed under varying loads and the results are discussed
shortly.
A. Performance of DSTATCOM With Linear Load for
Neutral Current Compensation, Load Balancing, and ZVR
Operation
The dynamic performance of the DSTATCOM under linear
lagging power factor unbalanced load condition is shown in
Fig. 6. At 0.6 s, the load is changed to two-phase load and to
single-phase load at 0.7 s.
B. Performance of DSTATCOM With Nonlinear Load
forHarmonic Compensation, Load Balancing, and ZVR
Operation
The dynamic performance of the DSTATCOM with
nonlinear and unbalanced load is given in Fig. 7.At 0.8 s,
the load is changed to two-phase load and to single-phase
C. Performance of DSTATCOM With Linear Load for
Neutral Current Compensation, Load Balancing, and UPF
Operation
The dynamic performance of the DSTATCOM during
linear power-factor-unbalanced load condition is depicted in
Fig. 8. At 0.6 s, the load is changed to two-phase load and to
single-phase load at 0.7 s. The loads are applied again at 0.8
and 0.9 s, respectively. The PCC voltages (vS ), source
currents (iS ), load currents (iL ), compensator currents (iC ),
source-neutral current (iSn), load-neutral current (iLn),
compensator-neutral current (iCn), dc bus voltage (vdc), and
amplitude of voltage (VS ) at PCC are also depicted in Fig.
8. The reactive power is compensated for power factor
correction, and the source currents are balanced and
sinusoidal.
D. Performance of DSTATCOM With Nonlinear Load for
Harmonic Compensation, Load Balancing, and UPF
Operation
The dynamic performance of the DSTATCOM during
nonlinear unbalanced load condition is shown in Fig. 9.
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P.NAGA SOWJANYA, Abdul Ahad Shaik , P.Jyothi / International Journal of Engineering Research and
Applications (IJERA)
ISSN: 2248-9622
www.ijera.com
Vol. 1, Issue 4, pp.1421-1426
Fig. 8. Performance of a three-phase three-leg VSC and Tconnected transformer-based DSTATCOM for neutral
current compensation, load balancing, and power factor
correction.
The PCC voltages (vS ), source currents (iS ), load currents
(iLa, iLb, iLc), compensator currents (iC ), source-neutral
current (iSn), compensator-neutral current (iCn), loadneutral current (iLn), dc bus voltage (vdc), and amplitude of
voltage (VS ) at PCC are also depicted in Fig. 9.
Fig. 9. Performance of a three-phase three-leg VSC and Tconnected transformer-based DSTATCOM for neutral
current compensation, load balancing, harmonic
compensation, and power factor correction.
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P.NAGA SOWJANYA, Abdul Ahad Shaik , P.Jyothi / International Journal of Engineering Research and
Applications (IJERA)
ISSN: 2248-9622
www.ijera.com
Vol. 1, Issue 4, pp.1421-1426
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