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UIUC CS 497: Section EA Lecture #2 Reasoning in Artificial Intelligence Professor: Eyal Amir Spring Semester 2004 Last Time • Propositional logic as a language for representing knowledge • Did not touch on reasoning procedures • Defined language, signature, models • From homeworks: you should know – Soundness; Completeness theorem – Deduction theorem – De Morgan Laws Today • Reasoning procedures for propositional logic – Checking Satisfiability (SAT) using DPLL – Proving entailment using Resolution • Application du jour: Formal Verification • Applications we will not touch – AI planning, graph algorithms, cryptography, … SAT via Generate and Test • If we have a truth table of KB, then we can check that KB satisfiable by looking at it. • Problem: n propositional symbols 2n rows in truth table – Checking interpretation I takes time O(|KB|) – Generating table is expensive: O(2n |KB|) time • Observation: SAT requires us to look only for one model Clausal Form • Every formula can be reformulated into an equivalent CNF formula (conjunction of clauses). • Examples (using De Morgan Laws): ( a b ) ( a b ) (a a) (a b) (b a) (b b) Clausal Form • Every formula can be reformulated into an equivalent CNF formula (conjunction of clauses). • Examples: face _ door _ t1 turn _ cl _ 90 _ t1 face _ door _ t 2 face _ door _ t1 turn _ cl _ 90 _ t1 face _ door _ t 2 Clausal Form • Every formula can be reformulated into an equivalent CNF formula (conjunction of clauses). • Examples: face _ door _ t1 move _ fwd _ t1 at _ corridor _ t 2 face _ door _ t 2 face _ door _ t1 move _ fwd _ t1 at _ corridor _ t 2 face _ door _ t1 move _ fwd _ t1 face _ door _ t 2 Propagating a Truth-Value • KB in CNF, and we observe p=TRUE • Then, removing clauses with p positive from KB gives an equivalent theory. • Example: KB Observe abc a b d a Propagating a Truth-Value • KB in CNF, and we observe p=TRUE • Then, removing negative instances of p from KB gives an equivalent theory. • Example: KB Observe abc a b d a DPLL Search Procedure for CNF 1. If no clauses in KB, return T 2. If a clause in KB is empty (FALSE), return F 3. If KB has a unit clause C with prop. p, then return DPLL(KB,p←polarity(p,C)) 4. Choose an uninstantiated variable p 5. If DPLL(KB, p←TRUE) returns T, return T 6. If DPLL(KB, p←FALSE) returns T, return T 7. Return F DPLL in Action abc a c d a e f c e f c d f On board DPLL in Action abc a c d a e f c e f c a f On board Note: we could know without thorough checking that this KB is satisfiable DPLL in Action ac a c f a e f c e f a f c f On board Related: SAT Solving • • • • • • • • Order of selection of variables (lecture #5) Stochastic local search (paper #1) Binary Decision Diagrams (paper #2) Strategies other than unit (paper #23) 2-SAT is solvable in linear time Smart backtracking (paper #21) Clauses/Vars in Random SAT (paper #22) SAT via probabilistic models (paper #15) Take a Breath • Until now: SAT solving – Search in the space of models • From now: Resolution theorem proving – Search in the space of proofs • Later: Formal Verification Resolution Theorem Proving • Given: – KB – a set of propositional sentences – Query Q – a logical sentence • Calling procedure: 1. Add Q to KB 2. Convert KB into clausal form 3. Run theorem prover. If we prove contradiction, return T. Otherwise, return F. Resolution Theorem Proving 1. Add Q to KB 2. Convert KB into clausal form 3. Run theorem prover. If we prove contradiction, return T. Otherwise, return F. KB Q ╨ ╨ Deduction theorem: KB Q iff FALSE Resolution Theorem Proving 1. Add Q to KB 2. Convert KB into clausal form 3. Run theorem prover. If we prove contradiction, return T. Otherwise, return F. KB Q ╨ ╨ Deduction theorem: KB Q iff FALSE Propositional Resolution • Resolution inference rule: C1: p1 C1’ C1 p1 C1’ C2: p1 C2’ C2 p1 C2’ -------------------C3: C1’ C2’ Propositional Resolution • Resolution algorithm (saturation): 1. While there are unresolved C1,C2: (1) Select C1, C2 in KB (2) If C1, C2 are resolvable, resolve them into a new clause C3 (3) Add C3 to KB C1: p1 C1’ (4) If C3={ } (empty clause), C2: p1 C2’ we got a contradiction. -------------------- 2. STOP C3: C1’ C2’ Resolution in Action ac a c f a e f c e f a f c f On board KB C1: p1 C1’ C2: p1 C2’ -------------------C3: C1’ C2’ Negated Query Resolution in Action abc a c d a e f c e f c d f c On board KB C1: p1 C1’ C2: p1 C2’ -------------------C3: C1’ C2’ Negated Query Properties of Resolution • Running time for n variables, m clauses: – Resolving two clauses: O(n) – Finding two resolvable clauses: O(1) – Overall algorithm: O(3nn) Properties of Resolution • Theorem: Resolution is sound – Resolving clauses in KB generates valid consequences of KB • Theorem: Resolution is refutation complete ╨ – Resolution of KB with Q yields the empty clause iff KB Q Properties of Resolution • Resolution does not always generate Q KB = { {a,b}, {a,b}, {b,c} } Q = b c = {b,c} a ╨ • Theorem: Resolution always generates a clause that subsumes Q iff KB Q Example: Resolving KB generates b Simple Enhancements • Remove subsumed clauses – { p } subsumes { p , q } – { p , q } subsumes { p , q, r } – { p } does not subsume { p , q } • Contract same literals – { p , p , q } becomes { p , q } • Unit resolution: resolve unit clauses first Related to Prop. Resolution • Clause selection for resolution (lecture #5, paper #19) • Consequence finding (paper #3) • Prime implicates/implicants (paper #4) Resolution vs SAT • SAT solvers can find models • Resolution sometimes better at finding contradictions • With resolution it is easier to explain and provide a proof Summary So Far • Finding models using DPLL • Resolution theorem proving allows us to find contradictions and explanation. – The deduction theorem tells us how to ask queries from either SAT solvers or Resolution Application: Hardware Verification x1 x2 AND f1 f3 not f5 not x3 AND f2 OR f4 Question: Can we set this boolean cirtuit to TRUE? f5(x1,x2,x3) = a function of the input signal Application: Hardware Verification x1 x2 AND f1 f3 not f5 not x3 AND f2 OR f4 SAT(f5) ? Question: Can we set this boolean cirtuit to TRUE? f5(x1,x2,x3) = f3 f4 = f1 (f2 x3) = (x1 x2) (x2 x3) M[x1]=FALSE M[x2]=FALSE M[x3]=FALSE Hardware Verification • Questions in logical circuit verification – Equivalence of circuits – Arrival of the circuit to a state (required a temporal model, which gets propositionalized) – Achieving an output from the circuit Summary • SAT checking using DPLL (instantiate, propagate, backtrack) • Entailment/SAT checking using Resolution (create more and more clauses until KB is saturated) • Formal verification uses mainly SAT checking such as DPLL, but also sometimes resolution Next Time • • FOL Resolution Homework: 1. Read readings (incl. application reading) 2. Make sure you know: – Deduction theorem for FOL – Language of FOL – Soundness, completeness, and incompleteness theorems – Models of first-order logic