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金氧半穿隧光偵測器及 發光二極體的增進 Enhancement of Metal-OxideSemiconductor Tunneling Photodetectors and Light Emitting Diode •指導教授:劉致為 博士 •學生:梁啟源 •台灣大學光電工程學研究所 1 Outline Introduction ……………………………………..3 NMOS photodetector…………………………..4 SOI NMOS photodetector……………………..9 Metal-HfO2-Silicon LED …………….............32 Surface plasmon enhanced transmission..34 Summary………………………………………..40 2 Introduction • The electro-optical products may be one of the killer applications in the future Si market. • The worldwide revenue of the optical semiconductor is ~6% (~10 B) of the total semiconductor revenue. • The ITRS has predicted that the incorporation of electro-optical components into CMOS compatible process is needed in 2004 to achieve System-on-a-Chip (SOC). • Si-based optoelectronics - low cost, high reliability, VLSI compatible 3 NMOS detector I-V characteristic 1E-4 0.24 mW/cm Gate Current (A) 1E-5 0.71 mW/cm photo current 1E-6 1.77 mW/cm • Al gate • The dark and photocurrents are relatively constant in the log scale at large gate bias. 2 2 2 1E-7 1E-8 1E-9 1E-10 Al or ITO gate Ultrathin SiO2 1E-11 dark current 1E-12 1E-13 1E-14 -3 • p-type or n-type siliocn wafer -2 -1 0 1 2 3 Ilight intensity => Iph 4 Gate Voltage (V) 4 NMOS detector operation principle • Positive gate bias • Deep depletion • Soft-pinning of Vox 5 Vox pinning 5 Oxide voltage drop Si surface potential 4 Voltage ( V ) 3 • Simulation results • Vg falls on Si substrate. • Soft-pinning of Vox 2 1 0 -1 -2 -3 -4 -4 -3 -2 -1 0 1 2 3 4 Gate Voltage ( V ) 6 Minority carrier distribution Dn n p x 2 n p n p0 n G ( x) 0 x L , n p n p0 x W , np 0 n p ( x) n p 0 A exp( x) C1 exp( C1 x x ) C 2 exp( ) Ln Ln 1 1 exp 2(W L) Ln W 2L L (W 2 L) A exp( W ) exp( L ) nn 0 exp Ln Ln Ln Ln C2 1 1 exp 2(W L) Ln W L 2W W A exp( W ) exp( L ) n exp p0 L L L L n n n n 7 Minority carrier distribution Excess carriers generated before 46um could contribute to electron density distribution total current. J diff qDn ~46 um 8 1.5x10 n p x x W W J drift q G ( x)dx 8 1.0x10 0 q 0 1 exp( W ) 7 5.0x10 0.0 0 100 200 300 400 500 600 ( J dr J diff ) / q Pop / Ah dr diff 0.031 0.904 0.94 depth (um) 8 SOI MOS Photodetector • Responsivity and Bandwidth • Previously reported tunneling MOS photodetectors (PD) couldn’t promote it’s speed to GHz => far from application • The absorption length of 850 nm lightwave in Si (~16 um) is much larger than the Si depletion width. 9 hv Vg oxide Depletion width Silicon substrate • Photo-generated carriers in the bulk neutral region. • => collected by gate electrode through the slow diffusion process. • The large diffusion current limits the device bandwidth to hundreds MHz. 10 Simulation Details • Proposed MOS/SOI structure carried out by ISE. 11 Simulation Details • Thick buried oxide => stops the diffusion current from substrate • thin absorption layer => makes sure that the device is fully-depleted during operation. • The absorption region and ground electrode are separated by oxide and connected by buffer layer. • The grid structure of Al gate electrode => allows the light directly exposures on the absorption region. 12 Results and Discussion • The diffusion current is eliminated in SOI-MOS PD to increase speed => total photocurrent is reduced • Thicker absorption region increase the responsivity but reduces bandwidth. 0 Bulk-MOS PD SOI-MOS PD 2 Current Density ( A/cm ) 1x10 Photocurrent -4 1x10 -8 1x10 Dark current -12 1x10 -16 10 -6 -5 -4 -3 -2 -1 0 1 2 3 4 Gate Voltage ( V ) 13 Results and Discussion • Under inversion bias (Vg > 0), most voltage drops falls on Si substrate and the depletion width increases with Vg. => Tunneling MOS diode is deeply depleted under inversion bias. 5 oxide voltage drop Silicon surface potential buried oxide 4 Voltage (V) 3 2 1 0 -1 -2 -3 -4 -2 0 2 4 Gate voltage (V) 14 Results and Discussion • SOI-MOS devices with different absorption layer thickness. • Thicker absorption layers => higher responsivity => bandwidth decreases from 30 GHz to 0.9 GHz. • The absorption region outside the depletion region produces the diffusion current and reduces the bandwidth. Quantum Efficiency linear scale (a. u.) Active region 2 m 0.9 GHz Active region 1 m 17 GHz Active region 0.5 m 30 GHz 10M 10G 1G 100M Frequency ( Hz ) 100G 15 Results and Discussion band energy (eV) • Band diagrams of the SOI-MOS PDs with different buffer layer doping along the route of hole current. • A energy barrier for hole is observed for device with 1016 buffer layer doping. 1 Ec 0 Ev -1 -2 -3 16 10 18 10 20 10 Carrier Transport Path ( a. u. ) 16 Results and Discussion • The photocurrent of device with 1020 cm-3 buffer layer doping rises and falls quickest. • SOI-MOS PD generates more photocurrent than the bulk devices, unlike the result in DC condition. Bulk-MOS PD 20 -3 Buffer layer 10 cm 18 -3 Buffer layer 10 cm 16 -3 Buffer layer 10 cm 5 ps Optical impulse Photocurrent ( 10 -16 A) 12 8 4 0 0 10 20 Time ( ps ) 30 40 17 Analytical Model • Depletion region hv Vn Vp V>0 Electron-hole pairs V Vp: hole saturation velocity N (t ) Vn Vn: electron saturation velocity P W [exp( vn t ) exp( W )][u (t ) u (t t 2 )] ; t 2 hv vn N(t) Vp V P(t) P(t ) P W [1 exp( W v p t )][u (t ) u (t t3 )] ; t3 hv vp q J (t ) [vn N (t ) v p P(t )] Wd 18 Analytical Model • Fourier transform : e N (t ) N ( ) [ h Wd i Wd vn (e j i Wd v p (1 e P(t ) P( ) [ h j i Wd vn Wd 1) (1 e ) ] j v n i Wd v p Wd ) (1 e ) ] v p j q J ( ) [vn N ( ) v p P( )] Wd • Considering depletion capacitance Cd and series resistance Rs : q vn N ( ) v p P( ) J ( ) [ ] Wd 1 j Cd Rs 19 Analytical Model • Because of symmetry, we can just analyze right half side of the device, and transform it into equalized circuit. Vg Vg Wd C3 C2 C1 R1 R2 R3 • There are three currents with different capacitance and resistance. The total frequency response was formed by linearly adding currents together. q vn N ( ) v p P( ) J ( ) [ ] 1 j Ci Ri i 1 Wd 3 20 Analytical Model W3 W2 W1 • Buffer layer of 1016 doping is depleted and holes from center are blocked by depletion region. • Only holes generated in the outside part could transport to ground contact. => lower responsivity (1e16) W1 1 W1 W2 W3 5 21 Analytical Model • The parameter values used in the analytical model are given as followed. Wd absorption thickness 5x10-5 cm vn electron saturation velocity 1x107 cm/s vp hole saturation velocity 6x106 cm/s 2C1 C2 C3 R201 R181 R161 R202 R182 R162 R203 R183 R163 capacitance A Si 0.2 f F Wd resistance for 1E20 doping l A 240 3k 60k 2.4k 30k 600k 4.8k 60k 1.2M absorption coefficient 382 cm-1 quantum efficiency 0.024 light intensity 1x10-6 W/cm2 h light energy 1.459 eV For 850nm light 22 Analytical Model • The analytical model precisely fits the simulation results. 20 Quantum Efficiency linear scale (a. u.) 10 18 16 DC 10 10 20 10 frequency (Hz) 10m 10 18 10 16 10 10k 10M 10G simulation analytical formula 1G 10G Frequency ( Hz ) 100G 23 Bandwidth of SOI PD For tsi>0.5um , diffusion process ↑;bandwidth↓ For tsi>0.5um ,capacitance↑;bandwidth ↓ 11 10 10 Bandwidth (Hz) 10 9 10 8 10 7 10 6 10 0.1 1 absorption thickness (m) 10 24 Bandwidth of SOI PD As tsi ↑,diffusion length↑ ,bandwidth↓ ISE simulation analytic model 9 Bandwidth (Hz) 10 t diff L2 2D 1 2f 3dB 8 10 t drift t diff RC 2 7 10 0 5 10 15 Device Thickness ( m ) 20 25 2 Bragg reflector 2 i 2 cos( n h cos ) sin( n h cos ) n n 0 n n pn 0 n n mn 2 2 ip sin( nn hn cos n ) cos( nn hn cos n ) n 0 0 pn n cos n n pn n cos n n Transform matrix of layer n for TE wave for TM wave m12 m M N m1m2 ......mN 1mN 11 m21 m22 r t (m11 m12 p f ) p0 (m21 m22 p f ) (m11 m12 p f ) p0 (m21 m22 p f ) 2 p0 (m11 m12 p f ) p0 (m21 m22 p f ) reflectance transmittance 26 Bragg reflector Reflectivity has period relation with silicon thickness 0.7 0.6 Reflectivity 0.5 445, 560, 675....... 0.4 850 (2, 2.5, 3......) nsi 0.3 0.2 0.1 0.0 TM SOI TE TM wo BOX TE 400 500 600 700 800 Si layer thickness (nm) 27 Bragg reflector Reflectivity has minimum values at 850nm and 1300nm. Reflectivity 1.0 0.8 850 2.5 560nsi ( ) 0.6 1020 2 560nsi ( ) 0.4 1300 1.5 560nsi ( ) 0.2 0.0 700 800 900 1000 1100 1200 1300 1400 1500 1600 wavelength (nm) 28 Bragg reflector When incident angle is smaller than 40o, reflectivity of SOI device is smaller than bulk one. 1.0 TM with BOX TE TM without BOX TE Reflectivity 0.8 0.6 0.4 0.2 0.0 0 20 40 60 80 100 Angle (degree) 29 Bragg reflector The TEM and thickness of SOI MOS PD Tox (2nm) << 850nm, gate oxide was neglected. SiO2 2nm Si 0.56um SiO2 0.25um 30 Bragg reflector The measured photocurrent of ~30o incident light is 80% higher than normal incident one. Gate current (A) 1E-6 1E-7 1E-8 dark current normal 0.28 mA/W 0 ~30 0.52 mA/W 1E-9 -4 -2 0 2 4 Gate voltage (V) 31 Metal-Insulator-silicon tunneling LED Al SiO2 p-Si h Light emitted from electron hole recombination at accumulation EF VGS < 0 32 Metal-Insulator-silicon tunneling LED -6 Efficiency (10 ) The light efficiency of metal-HfO2-silicon LED is 4 times larger than MOS LED. 2.0 k↑ capacitance( t ox ) ↑ charge (Q=CV) ↑ recombination ↑ efficiency ↑ HfO2 1.5 1.0 0.5 SiO2 0.0 0 20 40 60 80 Gate Current (mA) 100 33 Surface plasmon Enhanced transmission Surface plasmon at metal-dielectric interface resonance with TM light. dielectric 2 1 kz kx metal 34 Surface plasmon Enhanced transmission 14 Dispersion relation dispersion of Al/SiO2 light line Si emitting energy 12 m d k sp c m d hw (eV) 10 8 6 4 2 Drude model 0 0.00 0.02 0.04 kx (1/nm) 0.06 0.08 m/ 1 p2 /( 2 c2 ) m// p2c / ( 2 c2 ) 35 Surface plasmon Enhanced transmission c sin 0 2 SP Lig ht lin e 1 SP right at light line imaginary kz kx k kx c sin 0 k x x m d k sp c m d Radiative resonance 36 Surface plasmon Enhanced transmission T. W. Ebbesen, Nature (London) 391, 667 (1998) single subwavelength hole I (d / ) 4 transmission increase larger than area 37 Surface plasmon Enhanced transmission max (i, j ) a0 i2 j2 m d m d The periodicity of the array determines the position of the peaks, independent of metal hole diameter and film thickness. 38 Surface plasmon Enhanced transmission air Aluminum Oxide silicon 0 Al ox Al si c Al ox c Al si 1 d1 2 2nm d2 3 1/ 1/ 2 2 1 k x (d 2 ) ( / )2 / c 2 1 1 1 1 1 1/ 2 d 2 a=316nm, r=50nm, and h=100nm. 39 Summary •Photodetectors using NMOS tunneling structures are demonstrated. • The novel SOI-MOS PDs can reach high bandwidth (22 GHz) and are fully compatible with ULSI technology. • The device structure could be optimized with Bragg reflector by tuning the doping and thickness of epi-layers. 40 Summary •The light emission from Al/HfO2/p-Si tunneling diodes has an enhanced intensity because of the high dielectric constant of HfO2 to increase the hole concentration at Si/HfO2 interface •Surface plasmon could enhance the transmission through hole array on metal film. The size of hole array is predicted. 41