Download Implementation of grid-connected photovoltaic system with power

2004 35th Annual IEEE Power Elecrronics Specialists Conference
Aachpn, Germany, 2W4
Implementation of Grid-Connected Photovoltaic System with Power Factor Control and
Islanding Detection
S. Mekhilef
Department of Electrical
Engineering University Malaya,
50603 Kuala Lumpur, Malaysia
Email: [email protected]
N.A. Rabim
Department of Electrical
Engineering University Malaya,
50603 Kuala Lumpur, Malaysia
Email: [email protected]
Abstract- An approach to power factor control and islanding
detection of a grid connected photovoltaic system using Field
Programmable Gate Array (FPGA) is proposed. The proposed
method has been tested through different situations, including
the loss of the utility supply, and the deviation at the output of
the inverter helps to detect islanding more effectively.
Hardware design was constructed to validate the effectiveness
of the approach proposed. Experimental results have been
chosen to shew the effectivenessof the proposed technique.
compensating theory in which a large number of
multiplication were required, thereby complicating the
circuits and system as a whole. A new method capable of
power-factor control and islanding detection for a gridconnected PV system is proposed.
11. THE OVERALL SYSTEM CONFIGURATION
The overall circuit of the proposed three-phase grid
connected inverter system consists of a solar array, DC-DC
converter, power conditioning unit, a low pass LC filter, a
high power transformer, a phase-locked loop circuit, FPGA,
and a personal computer as shown in figure 1.
1. INTRODUCTION
The encouragement of energy-efficient appliances and
tighter government restrictions on thermal power plants bas
attracted the use of grid-connected photovoltaic (PV)
systems in a modem utility at remote sites [ I , 21. The grid
connected PV system can directly feed energy into the
existing AC grid system, where the cost of batteries for
energy storage can be reduced [3]. However, some problems
exist in the operation of this grid [4] exist, among which,
one critical concern lies in the need to guard against the
occurrence of islanding and
Islanding is a scenario where dispersed generators could
be severed off from the utility network but continue to
operate after the utility supply is disconnected. The
occurrence of islanding may complicate the orderly
reconnection of the utility network and pose a hazard to
utility personnel. To solve this problem, several techniques
have been recently proposed; yet it remains an unsettled
question that existing methods may fail to sense the
abnomlality once the amount of power mismatch generation
and load within the island is not significant [SI. A more
eficient method to solve this problem becomes crucially
important.
A further concern in the operation of grid-connected
system is that inverter topology design is often limited to the
feeding of active power to the AC system without injecting
reactive power. This design may deteriorate the power
factor of AC source, leading to an overcharge of energy hill.
To cope with this issue, the control of real and active power
in a PV system has been addressed recently [6].However,
most of the control strategies were made primarily based on
the instantaneous reactive power
0-7803-8399-0/04/$20.00 02004 IEEE.
Fig. I. Overall block diagram of three-phase grid connected invcner
A six-power switching device bridge topology bas been
chosen to form a controlled bridge that simplified the circuit
since fewer power switching devices are involved. High
frequency three-phase PWM with less noise interference is
generated using Xilinx FPGA. The closed loop system is
formed by the feedback of the output voltage tn a personal
computer via an isolation amplifier. Program developed
using Genie software is used as a main feedback controller
of the system that processes the reference input and the
feedback signal to produce the required modulation index to
the DC-DC converter and also the power-conditioning unit.
The modulation index is then fed into the PWM generator
circuit that consists of a FPGA and phase-locked loop. The
pulses produced from the generator unit are used to drive
the power switching devices via isolated driver circuits.
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2004 35th Annul IEEE Power Elecrronics Specialists Conference
111. POWER FACTOR CORRECTION UNIT
The phase shift is designed to provide flexibility in order
to produce lagging, leading or unity displacement angle.
Adjustment on power factors is accomplished by using
internal reset unit. Two eight-hit counters, two eight-hit
comparators, a VHDL code block, a four channel
multiplexer and a few logic gates are used to form a reset
unit. This unit is clocked from the signal derived from
carrier units. During positive cycle, counter A starts
counting from 0 to 180. Figure 2 shows the concept of
controlling the phase shifter.
Aachen. German)'. 2004
intervals and the overhinder voltage detection is employed
to bring the inverter off-line. Under normal interconnection
conditions, the low impi:dance of the grid prevents this from
occurring. However, if the inverter is able to change the
frequency, then the utility is no longer present and the
inverter has islanded with the local load. Testing at Power
Electronics Laboratory has demonstrated the efficiency of
this technique under the condition specified in IEEE 929
and UL 1741.
V. RESULTS
Power factor adjustment is demonstrated in figure 3(a)
for leading, figure 3(h) for lagging, and figure 3 (c) for
unity power factor. The: inverter could he forced to operate
at unity power at any load condition. The power factor
adjustment data is enlered via personal computer using
Genie software.
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Fig. 2. Operation of thc reset signal for phase shiR
During the counting process, the comparator compares
the counter value with the external input data. If the values
are equal, it produces a pulse output signal. The pulse will
reset all the modules and the PWM patterns restart. Thus,
this signal determines the lagging phase shift. Similarly for
negative cycle, counter B starts counting; the comparator
compares the counter value with the external data. If the
values are equal, it produces a pulse output signal that will
reset all modules. This signal determines the leading phase
shifi. If the external data is set at 180 the PWM waveforms
become same phase with the reference voltage i.e. unity
power factor.
Shifting of PWM waveforms forward or backward with
respect to the signal waveform using external data could be
used to vary the power factor of the system. Theoretically,
the phase shift could be varied from -180' to 180'.
However, in practice, the range of angle is limited by the
circuit parameters and distortion on the AC current was
observed at higher phase shift angle. This is due to increase
of low order of harmonic component as the phase shiil angle
increases. The external data for phase shift angle may come
from a Personal Computer or feed hack controller unit.
1V. ISLANDING DETECTION
The approach implemented in this project involves a
voltage sensing as the anti-islanding perturbation. This
technique adjusts the inverter output voltage at regular
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2004 35th A n n u l IEEE Power Electronics Sp~cialisrsConference
Aachen. Germany, 2004
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2
-c
2 0
-s
i
10
IO
20
40
time. ms
(C)
Fig. 3. Power factor adjustmcnl
Figure 4 shows the load voltage waveform when the
commercial power is interrupted. About 30msec after
stopping the inverter, the magnetic switch turns off, and the
inverter begins to be stand-alone operation from a soft-start
mechanism.
Fig. 6. Load voltage waveform at OFF +ON operation
(SOV/div, 50msec/div)
.
.
.
.
, , ,l , . . . , , , , , , , , , , l ,
-
Figure 6 shows the load voltage when the inverter is
switched on it takes 8 cycles to reach the peak value.
.., . , . ,..) , , , ., , , . ,. , , ,
Fig.4. Load voltage wavcfam al power failure (ON-OFF-ON
VI. CONCLUSION
operation)
(SOVldiv, 3Omsccldiv)
Figures 5 shows the transient response of the utility
current while part of load was suddenly switched off. The
disconnection of partial load will cause the output power
generated by the proposed PV system may become larger
than load demand. The excess energy is thus fed back into
utility power system, thereby driving the utility current out
of phase with the utility voltage. Hence, the proposed
approach can help to operate the system in a stable state no
matter whether the power supplied form the system is larger
or smaller than load demand.
The prototype of the three-phase grid connected inverter
with power factor correction and islanding detection was
tested with and without the maximum power point tracker
MPPT. The tests were carried out at a power greater than
3kW. The current performance proved to be satisfactoly and
complies with IEEE recommended practice on utility
interface of PV system, IEEE Std 929-2000 and UL17411999.
The inverter response to potential local islanding
conditions when there is supply outage. An active method of
anti-islanding was proposed. The approach implemented in
this project is disconnecting the inverter from the grid using
voltage-sensing method. The PWM pattern is equipped with
adjustable modulation index to regulate the output voltage
and phase shifter to adjust the power factor.
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2004 35th Annual IEEE Power Electronics Specialists Conference
REFERENCES
131
[41
[51
191
S . Mekhilef and N.A. Rahim, “Gcneralian O f Threc-Phase PWM
Inverter With Powcr Factor Comction Using Ficld Programmablc
Gate A m y (FPGA)” hternaiionol Journal of Engineering Science
ondTechnology, Vo1.2,No.I, 2003, pp.123-136.
N.A.Rahirn, T.C.Green, B.W.Williams, “PWM ASIC Design For
The Three-phase Bidirectional Buck Convcrtcr”, h i . J.Electronics.
1996, Volume: 81, NoS. pp. 603-615.
The Programmable Logic Data Book, Xilinx Databook, 1998
Ying-Yu Tzou, Hau-lean Hsu, “FPGA bascd SVPWM Control IC
for PWM Inverters”, IEEE Trans. On Power Elecnonics, April
10,1997, pp. 138-143.
S. Mckhilef and N.A. Rahim, “Field Programmable Gatc A m y
Bascd Thhrcc-Phase PWM Inverter” IEEEPES Transmission ond
Distribuiion Conference and Exhihilion 2002 Asia Pacific October
6-10,2002, Japan ~01.3,pp. 1953-1958.
S . Nonaka, Y. Ishitaka; “A PWM currcnt source type converterinvcrtcr system for bidirectional power flow ’’ IEEE IAS Proceeding
annuolmeeting 1988, pp. 143-151.
J. M. Relif, B. Allard, X. Jarda, A. Pcrcr. “Usc Of ASIC‘s In PWM
Techniques For Powcr Converters”, IEEE hiemotional Conference
on Industrial Electronics. Conirol and hstrumentorion, Volume: 2 ,
1993, pp. 6 8 3 4 8 8 .
J.Hollz, ‘‘Pulsewidth Madulalion for Power Electronic Pawcr
Conversion”. Proceedings of Ihc IEEE, Volume: 82, No.8 Aug.
1994.p~.1194-1214.
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