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Contemporary Logic Design
Arithmetic Circuits
Chapter # 5: Arithmetic Circuits
5.1 -- Number Systems
© R.H. Katz Transparency No. 10-1
Chapter Overview
Contemporary Logic Design
Arithmetic Circuits
• Binary Number Representation
Sign & Magnitude, Ones Complement, Twos Complement
• Binary Addition
Full Adder Revisted
© R.H. Katz Transparency No. 10-2
Contemporary Logic Design
Arithmetic Circuits
Number Systems
Representation of Negative Numbers
Representation of positive numbers same in most systems
Major differences are in how negative numbers are represented
Three major schemes:
sign and magnitude
ones complement
twos complement
Assumptions:
we'll assume a 4 bit machine word
16 different values can be represented
roughly half will represent positive numbers and zero,
remainder will represent negative numbers
© R.H. Katz Transparency No. 10-3
Contemporary Logic Design
Arithmetic Circuits
Number Systems
1. Sign and Magnitude Representation
-7
-6
-5
1111
1110
+0
+1
0000
0001
1101
0010
+2
+
-4
1100
0011
+3
0 100 = + 4
-3
1011
0100
+4
1 100 = - 4
-2
1010
0101
1001
-1
+5
-
0110
1000
-0
0111
+6
+7
Most significant bit is sign: 0 = positive (or zero), 1 = negative
Three low order bits is the magnitude: 0 (000) thru 7 (111)
n-1
Number range for n bits = +/-2
-1 ==>  2 3 - 1 =  7 for 3 bits
2 Representations for 0: 0000, 1000
© R.H. Katz Transparency No. 10-4
Contemporary Logic Design
Arithmetic Circuits
Number Systems
2. Ones Complement
N is positive number, then N is its negative 1's complement
n
N = (2 - 1) - N
2 4 = 10000
-1
= 00001
Example: 1's complement of 7
1111
-7
Shortcut method:
=
0111
1000
= -7 in 1's comp.
simply compute bit wise complement
0111 -> 1000
© R.H. Katz Transparency No. 10-5
Contemporary Logic Design
Arithmetic Circuits
Number Systems
Ones Complement
-0
-1
-2
1111
1110
+0
+1
0000
0001
1101
0010
+2
+
-3
1100
0011
+3
0 100 = + 4
-4
1011
0100
+4
1 011 = - 4
-5
1010
0101
1001
-6
+5
-
0110
1000
-7
0111
+6
+7
All negative numbers have a 1 in their sign bit.
Still two representations of 0! This causes some problems
© R.H. Katz Transparency No. 10-6
Contemporary Logic Design
Arithmetic Circuits
Number Representations
3. Twos Complement
-1
-2
-3
like 1's comp
except shifted
one position
clockwise
1111
1110
+0
+1
0000
0001
1101
0010
+2
+
-4
1100
0011
+3
0 100 = + 4
-5
1011
0100
+4
1 100 = - 4
-6
1010
0101
1001
-7
+5
-
0110
1000
0111
+6
+7
-8
Only one representation for 0
One more negative number than positive number
Negative numbers have a 1 in the highest order
bit ==> sign bit
© R.H. Katz Transparency No. 10-7
Contemporary Logic Design
Arithmetic Circuits
Number Systems
Twos Complement Numbers
n
N* = 2 - N
4
2 = 10000
Example: Twos complement of 7
sub 7 =
0111
1001 = repr. of -7
Example: Twos complement of -7
4
2 = 10000
sub -7 =
1001
0111 = repr. of 7
Shortcut method:
Twos complement = bitwise complement + 1
(+7) 0111 -> 1000 + 1 -> 1001 (representation of -7)
(-7) 1001 -> 0110 + 1 -> 0111 (representation of 7)
© R.H. Katz Transparency No. 10-8
Number Representations
Addition and Subtraction of Numbers
Contemporary Logic Design
Arithmetic Circuits
1. Sign and Magnitude
result sign bit is the
same as the operands'
sign
when signs differ,
operation is subtract,
sign of result depends
on sign of number with
the larger magnitude
4
0100
-4
1100
+3
0011
+ (-3)
1011
7
0111
-7
1111
4
0100
-4
1100
-3
1011
+3
0011
1
0001
-1
1001
Adder and subtractor required to implement addition and subtraction.
© R.H. Katz Transparency No. 10-9
Number Representations
Contemporary Logic Design
Arithmetic Circuits
Sign and Magnitude
Cumbersome addition/subtraction
Must compare magnitudes to determine sign of result
Ex. 0111 + 1010
7 + (-2)=> One number is positive and one number is negative.
+7 > (-2)=> Subtract 7-2
111
- 010
101
assign sign of largest number ===> 0101
© R.H. Katz Transparency No. 10-10
Contemporary Logic Design
Arithmetic Circuits
Number Systems
Addition and Subtraction of Numbers
2. Ones Complement Calculations
Same Signs
4
0100
-4
+3
0011
+ (-3)
7
0111
-7
If result yields a
carryout, add it to
the lsb (least significant bit)
(+4)
0100 --->
0011 -->
(+3)
1011
1100
10111
End around carry
1
1000
Different Signs
4
0100
-4
(+4)
0100 ---> 1011
-3
0011 --> 1100
(+3)
10000
+3
0011
-1
1110
1
End around carry
1
0001
© R.H. Katz Transparency No. 10-11
Contemporary Logic Design
Arithmetic Circuits
Number Systems
Addition and Subtraction of Numbers
Subtraction implemented by addition & 1's complement.
A-B = A + (-B)
Some complexities in addition due to two zeros.
© R.H. Katz Transparency No. 10-12
Contemporary Logic Design
Arithmetic Circuits
Number Systems
Addition and Subtraction of Binary Numbers
Ones Complement Calculations
Why does end-around carry work?
n
Its equivalent to subtracting 2 and adding 1
n
n
M - N = M + N = M + (2 - 1 - N) = (M - N) + 2 - 1
n
n
-M + (-N) = M + N = (2 - M - 1) + (2 - N - 1)
n
n
= 2 + [2 - 1 - (M + N)] - 1
n
after end around carry: - (2 - 1 )
n
= 2 - 1 - (M + N)
(M > N)
M+N<2
this is the correct form for representing -(M + N) in 1's comp!
© R.H. Katz Transparency No. 10-13
n-1
Number Systems
Addition and Subtraction of Binary Numbers
Same
Sign
3. Twos Complement Calculations
If carry-in to sign =
carry-out then ignore
carry
Contemporary Logic Design
Arithmetic Circuits
carry-in
4
0100
-4
1
1100
+3
0011
+ (-3)
1101
7
0111
-7
11001
if carry-in differs from
carry-out then overflow.
overflow -- arithmetic operation
results in a number outside the
range of those that can be
represented.
carry-out
Different
Sign
4
0100
-4
1100
-3
1101
+3
0011
1
10001
-1
1111
Simpler addition scheme makes twos complement the most common
choice for integer number systems within digital systems
© R.H. Katz Transparency No. 10-14
Contemporary Logic Design
Arithmetic Circuits
Number Systems
Addition and Subtraction of Binary Numbers
Twos Complement Calculations
Why can the carry-out be ignored?
-M + N when N > M:
n
n
M* + N = (2 - M) + N = 2 + (N - M)
Ignoring carry-out is just like subtracting 2
n
-M + -N where N + M < or = 2 n-1
n
n
-M + (-N) = M* + N* = (2 - M) + (2 - N)
n
n
= 2 - (M + N) + 2
After ignoring the carry, this is just the right twos compl.
representation for -(M + N)!
© R.H. Katz Transparency No. 10-15
Contemporary Logic Design
Arithmetic Circuits
Number Systems
Overflow Conditions
Add two positive numbers and result is a negative number
or two negative numbers and result is a positive number
-1
-2
1111
0001
-4
1101
0010
1100
-5
0100
1010
0101
1001
-7
0110
1000
-8
0111
+6
+7
5 + 3 = -8
-3
+2
0011
1011
-6
-2
+1
0000
1110
-3
-1
+0
+3
-4
1111
+1
0000
1110
0001
1101
0010
1100
-5
1011
+4
+5
+0
1010
-6
0110
1000
-8
0011
+3
0100
+4
0101
1001
-7
+2
0111
+5
+6
+7
-7 - 2 = +7
© R.H. Katz Transparency No. 10-16
Contemporary Logic Design
Arithmetic Circuits
Number Systems
Overflow Conditions -- Two’s complement
5
0111
0101
-7
1000
1001
3
0011
-2
1110
-8
1000
7
10111
Overflow
Overflow
5
0000
0101
-3
1111
1101
2
0010
-5
1011
7
0111
-8
11000
No overflow
No overflow
Overflow when carry in to sign does not equal carry out
© R.H. Katz Transparency No. 10-17
HW #10 -- Section 5.1
Contemporary Logic Design
Arithmetic Circuits
© R.H. Katz Transparency No. 10-18
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