Download Electronics - lectures for Mechanical Engineering part 4a

Electronics
- lectures for Mechanical Engineering
part 4a
Dr. Bogusław Boratyński
Faculty of Microsystems Electronics and Photonics,
Wroclaw University of Technology,
2011
Basic literature & figure sources:
G. Rizzoni, Fundamentals of Electrical Engineering, McGraw-Hill
R.F. Pierret, Semiconductor Device Fundamentals, Addison-Wesley Publ.,
B.G. Streetman, Solid State Electronic Devices, Prentice-Hall,
W. Marciniak, Przyrządy półprzewodnikowe i układy scalone, WNT,
A. Świt, J. Pułtorak, Przyrządy półprzewodnikowe, WNT,
From the course syllabus
SYMBOLS
Chapter 4a. FET devices
D- Drain
Types of FETs
G
Gate
JFET – structure and I-V dependences
MOSFET – structure and I-V dependences
DC bias and Q-point
Small signal equivalent models for L.F.
FET amplifier
Bipolar Trans.
C - Colector
B - Base
E - Emitter
FET
D - Drain
G - Gate
S - Source
S- Source
Field Effect Transistors (unipolar transistors)
P-N Junction FET
Insulated gate FET (MOSFET)
Field Effect Transitors – electric field controls the flow of carriers
Source
Gate
Drain
S
Gate
oxide
Tlenek
bramkowy
SiO2
G
D
Gate
Al
SiO2
Tlenek izolacyjny
p+
p+
Si typ - n
n-type Si
substrate
B (Podłoże
-"Bulk")
Channel (here: p-type,
accumulation of holes from the substrate)
Channel (here: n-type)
Reverse biased gate-to-channel p-n junction
All FETs have:
very large input resistance Rwe (M)
(thus, they get negligible input current)
- Input voltage controls the output current
MIS capacitor CSiO2 (gate-channel)
MIS – metal - insulator - semiconductor
or more frequently
MOS - metal-oxide (SiO2)-semiconductor
Rinput  Routput
Source: G . Rizzoni, Fundamentals of Electrical Engineering,
McGraw-Hill
JFET – device structure, dc bias
JFET – Junction Field Effect Transistor (n-channel)
Source
--
Gate
Drain
+ drain bias
Bias schematics
channel
Source: G . Rizzoni, Fundamentals of Electrical Engineering,
McGraw-Hill
JFET and MESFET
JFET – Junction Field Effect Transistor (n-channel)
usually – made of Si
Source
Gate
JFET with metal-semiconductor junction (Schottky)
MESFET– Metal Semiconductor FET
(n - channel), usually GaAs, GaN
Drain
Substrate - GaAs
Channel
Source: G . Rizzoni, Fundamentals of Electrical Engineering, McGraw-Hill
JFET I-V dependence
n-channel JFET
Output characteristics:
ID – UDS
Transfer characteristics:
ID – UGS
UGS – parameter
UDS – const.
I – linear region, II – saturation region
[mA] ID
I
6
II
UDS – const.
UDS=const
UGS=0V
5
4
IDSS 5
ID ~ (UGS ) 2
UGS=-0,5V
4
3
3
2
UGS=-1V
1
UGS=-2V
0
ID [mA]
6
2
4

U
ID  IDSS  1  GS
Up





2
2
6
8
UDS
-UGS
[V]
[V]
1
Up
2
1
UP – pinch-off voltage
(JFET parameter)
0
Source: G . Rizzoni, Fundamentals of Electrical Engineering, McGraw-Hill
E-MOSFET dc bias, I-V dependence
MOSFET normally-OFF
( for UGS =0 no ID )
S
Tlenek bramkowy
SiO2
G
Bias schematics
n-channel
E-MOSFET (Enhancement mode)
ID
D
Al
SiO2
G
Tlenek izolacyjny
p++
n
D
B
n+p+
Si typ -p
n
n-type Si
substrate
UDS
UGS
S
B (Podłoże
I-V dependences:
output: ID – UDS
-"Bulk")
Channel (n-type) is created after
applying gate bias UGS > UT .
Thus, drain current, ID can flow from the
source to the drain
transfer: ID – UGS
UGS – parameter
[mA]
UDS – const.
[mA]
ID
ID
UGS=10V
20
20
UGS=9V
β
2
I D  UGS  UT 
2
β – material parameter (depends on CSiO2, μ - mobility)
UT – threshold voltage (MOSFET parameter)
UDS=const
UGS=7V
10
10
UGS=6V
UGS=UT
0
5
10
15
UGS
UDS
[V]
0
UT 5
10
[V]
D-MOSFET dc bias, I-V dependence
D-MOSFET normally-ON
S
Tlenek bramkowy
SiO2
G
Bias schematics
n-channel
D-MOSFET (Depletion mode)
ID
D
Al
SiO2
G
Tlenek izolacyjny
p++
n
n+p+
Si typ - np
D
B
UGS
p-type Si
substrate
UDS
B (Podłoże
Built-in channel (n-type doped layer)
The drain current, ID can flow if UGS =0
Channel pinch-off for UGS = UT
S
I-V dependences:
output ID – UDS
-"Bulk")
transfer: ID – UGS
UGS – parameter
UDS – const.
[mA] ID
[mA] ID
UGS=2V
20
20
UGS=1V
UDS=const
UGS=0V
10
10
UGS=-1V
UGS=-2V
0
5
10
15
UDS
[V]
-3
0
3
UGS
[V]
MOSFET- symbol and bias summary
normally-ON MOSFET
D-MOSFET
(for UGS =0 ID is possible)
ID
G
normally-OFF MOSFET
E-MOSFET
( for UGS =0 no ID )
D
ID
D
UDS
B
G
UDS
B
UGS
P-channel
UGS
P-channel
S
S
ID
G
N-channel
D
ID
B
G
UGS
UDS
D
B
N-channel
UDS
UGS
S
S
B – Bulk terminal (substrate)
Small signal equivalent models
Elements of the JFET and MOSFET equivalent circuit
models are similar: gate voltage controlled current
source, drain conductance gd (gds) and the gate-channel
capacitance Cgs + C gd
Small signal parameters:
Transconductance , gm = g21s
output conductance , gd = gds
gm 
g ds 
low freq.
did
du gs
for
did
du ds
U DS  const
for
U GS  const
Large input resistance (1M) (Rin ∞)
- equivalent to open circuit at the input
For high frequency signals important elements
are gate-source Cgs and gate –drain C gd
capacitances
high freq.
The voltage gain is given:
AV   g m RD
where:
gmvg– output current source controlled
by the input voltage
RD - load resistor included
in the drain circuit
FET parameters
High freq.
amplifier
Application
Type
channel
power
switching
BF245B
IRF520
JFET
MOSFET
N
N
Enhanced
Rated parameters
Drain-source voltage
UDSmax
Drain current
IDmax
Gate-source voltage
UGSmax
Admission power
Prmax
30V
100V
25mA
9.2A
-30V
±20V
300mW
60W
1.5 - 4,5V
-
Typical parameters
Pinch-off voltage
UP
Threshold voltage
UT
-
2.0 - 4.0V
Drain current at UGS=0
IDSS
6 - 15mA
250A
Transconductance
gm
5mA/V
5A/V
On –state resistance
Rdson
200
0,27
Common source MOSFET amplifier
DC biasing circuit with a voltage
devider at the input to stabilise the
gate voltage:
N-channel E-MOSFET
CS
Output characteristics: ID – VDS dla VGS – parametr,
the load line:
VDD = RD ID + VDS
operating point-Q: (IDQ, VGSQ, VDSQ)
ID = - VDS /RD +VDD /RD
The small signal
voltage gain :
Av   g m RD
Source: G . Rizzoni, Fundamentals of Electrical Engineering, McGraw-Hill
CS
MOSFET as a current switch
Input control signal UG = UGS
Result: rise of output current iD = iload
VDD dc power supply
Switching circuit requirements:
- short switching times (μs).
- small ON state voltage: UDSon,
since the power dissipated in MOSFET
while in ON-state is: P = IDon UDSon
MOSFET as a current switch
N-channel E-MOSFET
1/RDSon
ON
OFF
RDS on on–state resistance (MOSFET parameter)
Source: G . Rizzoni, Fundamentals of Electrical Engineering, McGraw-Hill