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PSD Chip Calculations Energy Conversions Erad Energy of incident radiation (MeV) evis Energy of visible photon radiation (eV) εcon Conversion efficiency εcoll Visible light collection efficiency εq Photocathode quantum efficiency εsplit Split signal efficiency evis = 3 LY = 10 εvis ⋅ εcon 6 kcn = LY ⋅ εcoll ⋅ εq Ne = Erad ⋅ kcn ⎧ 0.17 for CsI(Tl) εcon = ⎨ ⎩0.045 for Liquid Scintillator εcoll = 0.8 εq = 0.25 εsplit = 0.5 Transresistive Gain Calculation ArGAIN = VIN ,max Emax ⋅ kcn ⋅ q ⋅ max( f (t )) Argain is the Transresistive Gain following the energy conversion of an incoming charge pulse. VIN,max is the maximum voltage allowed at the input of the chip. Emax is the maximum energy value that will produce the maximum voltage. Pulse Model Multi-Exponential (with rise and fall times) (Normalized) Pulse Creation Equations t t n ⎛ − − ⎛ τ τ f (t ) = n 1 ⋅ ∑ ⎜ τ F ,iA−1τ R ,i ⋅ ⎜ e F ,i − e R ,i ⎜ ∑ Ai i =1 ⎜ i =1 ⎝ ⎝ f (t ) fV (t ) = max( f (t )) Pulse Integration Equations F (t1 , t 2 ) = ∫ t2 t1 FV (t1 , t 2 ) = ⎞⎞ ⎟ ⎟ for n exponentials ⎟⎟ ⎠⎠ t ⎛ ⎛ − 2 ⎛ −τ t1 τ A ⎜ f (t )dt = n 1 ⋅ ∑ ⎜ τ F ,i −iτ R ,i ⋅ ⎜τ F ,i ⋅ ⎜ e F ,i − e F ,i ⎜ ⎜ ∑ Ai i =1 ⎜⎝ ⎝ ⎝ i =1 n 1 τ INT ⋅ F (t1 , t 2 ) max( f (t )) ∞ ∫ f (t ) = 1 0 max( fV (t )) = 1 t − 2 ⎞ ⎛ −τ t1 τ ⎟ − τ ⋅ ⎜ e R ,i − e R ,i ⎟ R ,i ⎜ ⎠ ⎝ ⎞ ⎞ ⎞⎟ ⎟⎟ ⎟ ⎟ ⎟⎟ ⎠⎠⎠ Noise Sources Poisson – noise due to random arrival of discrete electrons Electronics Noise – Jitter – noise created by an uncertainty in the integration start time and in the width of integration period – RI – thermal noise from the integrating resistor sampled onto the integrating capacitor – OTA – thermal noise of the op amp sampled onto the integrating capacitor – OTA (+) – continuous additive input-referred thermal noise of the op amp – 1/f – 1/f noise of the op amp sampled onto the integrating capacitor – 1/f (+) – continuous additive input-referred 1/f noise of the op amp ADC – quantization noise of a 12-bit converter Poisson Noise kOUT = q ⋅ ArGAIN τ INT σ p 2 = kOUT ⋅ VOUT kOUT represents the gain from incoming charge packet to voltage output σp2 is the variance of the Poisson noise at the output of the integrator. Jitter Noise VOFi = A τ Fi −τ Ri VORi = − ⋅τ Fi ⋅ e A τ Fi −τ Ri − τTi Fi ⋅τ Ri ⋅ e ( ⋅ 1− e − τTi Ri ( − τT F ⋅ 1− e ) − τT Ri ci ,Ti = − ) ( VOFi τ Fi i ci ,T = VOF τ Fi i + VOR τ Ri e − T τ Fi 1− e − T τ Fi ) i + VOR τ Ri e − T τ Ri 1− e − T τ Ri where i = 1, 2, …, n for n exponentials 2 σ j2 2 ⎛ n ⎞ ⎛ n ⎞ 2 2 = ⎜ ∑ ci ,Ti ⎟ σ Ti + ⎜ ∑ ci ,T ⎟ σ T ⎝ i =1 ⎠ ⎝ i =1 ⎠ VOF and VOR are the separate voltages at the output for the falling and rising exponentials. Ci,Ti and Ci,T are the constants for n exponentials involved in the calculation of variance at the output. σj2 is the variance at the output due to jitter in the starting integration, Ti, and integration period, T at the input. Integrating Resistor Thermal Noise (Sampled) σ RI ,t 2 = 4 CkT INT T τ INT σRI,t2 is the variance sampled onto the integrating capacitor due to thermal noise in the integrating resistor. OTA Thermal Noise (Sampled) σ OTA,t 2 = σ RI ,t 2 ⋅ RRN INT RN is the equivalent thermal resistance of the OTA. σOTA,t2 is the variance sampled onto the integrating capacitor due to thermal noise in the OTA. OTA Thermal Noise (Continuous) σ OTA+ ,t 2 = 4 ⋅ kT ⋅ RN ⋅ BW RN is the equivalent thermal resistance of the OTA. BW is the close-loop bandwidth of the OTA. σOTA,t2 is the continuous-time variance at the output due to thermal noise in the OTA. OTA 1/f Noise (Sampled) [ σ OTA, f = Kf ⋅ ln (2 ⋅ Tcal ⋅ Fs ) 2 ] 0.62 2 Tcal is the time span between calibrations of the output voltage. Fs is the sampling frequency, or twice the bandwidth of the voltage at the output. Kf is the fitted 1/f constant that models the 1/f noise in the OTA. σOTA,f2 is the variance sampled onto the integrating capacitor due to 1/f noise in the OTA. OTA 1/f Noise (Continuous) σ OTA + , f 2 = σ OTA, f 2 ⋅ τ T INT σOTA+,f2 is the continuous-time variance at the output due to 1/f noise in the OTA. ADC Quantization Noise Qbin = σ ADC = 2 VOmax 2 ADCbits Qbin 2 12 Qbin is the quantization bin size of an ADC with ADCbits of resolution. σADC2 is the variance of the ADC at the output. Variance and SNR at the output σ TOTAL 2 = σ p 2 + σ j 2 + σ RI ,t 2 + σ OTA,t 2 + σ OTA+ ,t 2 + σ OTA, f 2 + σ OTA+ , f 2 SNR = σVOUT TOTAL Since each noise variance at the output is independent of each other, the total variance at the output is simply the sum of the variances. SNR = Signal to Noise Ratio Analytical Predictions of Variance of Angular PSD Plots sin 2 2θ var(θ ) = 4 FOM = ⎡ 1 1 ⎤ ⋅⎢ + 2 2 ⎥ SNR B ⎦ ⎣ SNR A θ1 − θ 0 var(θ1 ) + var(θ 0 ) Variance of angular PSD plot depends on the signal-to-noise ratio of the A and B integrators. Small signal-to-noise ratios, which correspond to low-energy particles, results in a larger variance in angle which is consistent with simulation. Figure of merit (FOM) is computed as the difference between the means divided by the square root of the sum of the variances.