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Engineering 43
Chp 2.3
Single-Loop
Circuits
Bruce Mayer, PE
Licensed Electrical & Mechanical Engineer
[email protected]
Engineering-43: Engineering Circuit Analysis
1
Bruce Mayer, PE
[email protected] • ENGR-43_Lec-02-4_Single_Loop_Ckts.ppt
Single Loop Ckts - Background
 Using KVL And KCL We Can Write
Enough Equations To Analyze ANY
Linear Circuit
 Begin The Study Of Systematic And
Efficient Ways Of Using The
Fundamental KCL & KVL Circuit Laws
• This Time →
Single LOOP Circuits
Engineering-43: Engineering Circuit Analysis
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Bruce Mayer, PE
[email protected] • ENGR-43_Lec-02-4_Single_Loop_Ckts.ppt
The Power of Loop Analysis
 Consider this
Circuit
 Alternative Analyses
• Write N-1 (5) KCL Equations
a
1
2
b
3
6 branches
6 nodes
1 loop
– An Easy Choice
 The Plan for Loop Analysis
• Begin With The Simplest One-Loop Circuit
• Extend Results To Multiple-Source
and Multiple-Resistor Circuits
3
4
f
6
e
5
d
ALL ELEMENTS IN SERIES
ONLY ONE CURRENT
• Determine Only the SINGLE Loop Current
Engineering-43: Engineering Circuit Analysis
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Bruce Mayer, PE
[email protected] • ENGR-43_Lec-02-4_Single_Loop_Ckts.ppt
The Voltage Divider
 Ohm’s Law
VR1  R1it 
KVL ON
THIS
LOOP
VR2  R2it 
 Ohm’s Law in KVL
vt   R1it   R2it 
 Find i(t)
vt 
i t  
R1  R2
Engineering-43: Engineering Circuit Analysis
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Bruce Mayer, PE
[email protected] • ENGR-43_Lec-02-4_Single_Loop_Ckts.ppt
Voltage Divider cont.
 Now Sub i(t) Into Ohm’s
Law to Arrive at The
Voltage Divider Eqns
KVL ON
THIS
LOOP
 vt  
 vt  
VR1  R1 
 and VR2  R2 

 R1  R2 
 R1  R2 
 Quick Chk → In Turn, Set R1, R2 to 0
 vt  
 vt  
R1  0  VR1  0

0
and
V

R
R2
2

  vt 
 0  R2 
 0  R2 
 vt  
 vt  


R2  0  VR1  R1 

v
t
and
V

0
R2


0
 R1  0 
 R1  0 
Engineering-43: Engineering Circuit Analysis
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

Bruce Mayer, PE
[email protected] • ENGR-43_Lec-02-4_Single_Loop_Ckts.ppt
V-Divider Summary
 Governing Equations
vR1 
R1
v(t )
R1  R2
R2
vR2 
v(t )
R1  R2
• The Larger the R, The Larger the V-drop
 Example
• Gain/Volume Control
– R1 is a Variable
Resistor Called A
Potentiometer, or
“Pot” for Short
Engineering-43: Engineering Circuit Analysis
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Bruce Mayer, PE
[email protected] • ENGR-43_Lec-02-4_Single_Loop_Ckts.ppt
Volume Control Example
• Case-I → R1 = 90 kΩ
 R2 
V2  
 v(t )
 R1  R2 
30k


V2  
9V  2.25V

 90k  30k 
9V
30kΩ
• Case-II → R1 = 20 kΩ
 R2 
V2  
 v(t )
 R1  R2 
30k


V2  
9V  5.4V
20
k


30
k



Engineering-43: Engineering Circuit Analysis
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Bruce Mayer, PE
[email protected] • ENGR-43_Lec-02-4_Single_Loop_Ckts.ppt
Practical Example  Power Line
 Using Voltage Divider
 Power Dissipated by the Line is a LOSS
8.25% of Pwr Generated is
Lost to Line Resistance!
* How to Reduce Losses?
Engineering-43: Engineering Circuit Analysis
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Bruce Mayer, PE
[email protected] • ENGR-43_Lec-02-4_Single_Loop_Ckts.ppt
Equivalent Circuit
 The Equivalent Circuit Concept Can
Simplify The Analysis Of Circuits
• For Example, Consider A Simple
Voltage Divider
– As Far As The
Current Is
Concerned Both
Circuits Are
Equivalent
i
vS
R1
i
vS
+
-
R2
i
+
-
vS
R1  R2
 The One On The Right Has Only One Resistor
SERIES Resistors →
Engineering-43: Engineering Circuit Analysis
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R1
R2

R1  R2
Bruce Mayer, PE
[email protected] • ENGR-43_Lec-02-4_Single_Loop_Ckts.ppt
R1  R2
Schematic vs. Physical
 Sometimes, For Practical Construction
Reasons, Components That Are Electrically
Connected May Be Physically Quite Apart
• Each Resistor Pair Below Has the SAME
Node-to-Node Series-Equivalent Circuit
Engineering-43: Engineering Circuit Analysis
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Bruce Mayer, PE
[email protected] • ENGR-43_Lec-02-4_Single_Loop_Ckts.ppt
CONNECTOR SIDE
ILLUSTRATING THE DIFFERENCE
BETWEEN PHYSICAL LAYOUT AND
ELECTRICAL CONNECTIONS
PHYSICAL NODE
PHYSICAL NODE
SECTION OF 14.4 KB VOICE/DATA MODEM
CORRESPONDING POINTS
COMPONENT SIDE
Engineering-43: Engineering Circuit Analysis
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Bruce Mayer, PE
[email protected] • ENGR-43_Lec-02-4_Single_Loop_Ckts.ppt
Generalization – Multiple Sources
– Voltage Rises Are
Subtracted From Drops

v5
R1
i(t)

R2

 v4 
 Apply KVL
vR1  v2  v3  vR 2  v4  v5  v1  0
Engineering-43: Engineering Circuit Analysis
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
v3

+ -
• We Select The Reference
Direction To Move Along
The Path
+
-
+
-
1
+ +
-
 Voltage Sources In Series

Can Be Algebraically
v
Added To Form An

Equivalent Source
 v2 
 v R1 
Bruce Mayer, PE
[email protected] • ENGR-43_Lec-02-4_Single_Loop_Ckts.ppt
vR2

Multiple-Source Equivalent
 Collect All SOURCES On One Side
v1  v2  v3  v4  v5   vR1  vR 2
v   v
eq
R1
 vR 2
R1
 The Equivalent
Circuit
Engineering-43: Engineering Circuit Analysis
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veq
+
-
R2
Bruce Mayer, PE
[email protected] • ENGR-43_Lec-02-4_Single_Loop_Ckts.ppt
Generalization – Mult. Resistors
 Apply KVL (rise = Σdrops)
 Now by Ohm’s Law
 And Define RS
 Then Voltage Division For Multiple Resistors
v R  Ri i 
i
Engineering-43: Engineering Circuit Analysis
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Bruce Mayer, PE
[email protected] • ENGR-43_Lec-02-4_Single_Loop_Ckts.ppt
Example
 Find: I, Vbd, P(30kΩ)
 Apply KVL & Ohm
 Solving for I

APPLY KVL
Vbd
TO
THIS LOOP

 Now Vbd
Vbd  12  20[k ] I  0
So by KVL  Vbd  10V
 Finally, The 30 kΩ Resistor Power Dissipation
P  I 2 R  (104 A) 2 (30 103 )  30 104 W  300W
Engineering-43: Engineering Circuit Analysis
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Bruce Mayer, PE
[email protected] • ENGR-43_Lec-02-4_Single_Loop_Ckts.ppt
“Inverse” Voltage Divider

 The Std V-Divider
VO 
R2
VS
R1  R2
Inverse
Divider
R1
VS 
R1  R2
VO
R2
VS
+
-
 Example Find VS
• Use Inverse Divider
R1  R2
VS 
VO
R2
20  220
VS 
458.3kV  500 kV
220
Engineering-43: Engineering Circuit Analysis
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Bruce Mayer, PE
[email protected] • ENGR-43_Lec-02-4_Single_Loop_Ckts.ppt
R2
VO

Student Exercise
 Lets Turn on the Lights for 5-7 min
 Students are invited to Analyze the
following Ckt
 Determine the
• CURRENT, I
• Vbd
+
Vbd
-
Engineering-43: Engineering Circuit Analysis
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Bruce Mayer, PE
[email protected] • ENGR-43_Lec-02-4_Single_Loop_Ckts.ppt
Examples
 Find: I, Vbd from Exercise
APPLY KVL
TO THIS LOOP
• Use KVL and Ohm’s Law
 6  80kI 12  40kI  0  I  0.05mA
Vbd   40kI    12V   0  Vbd  10V
 Find VS
• V20k Divider
20
3V  Vs
25  15  20
• The VS INVERSE
Divider
Engineering-43: Engineering Circuit Analysis
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
3V

25  15  20
VS 
3  9V
20
Bruce Mayer, PE
[email protected] • ENGR-43_Lec-02-4_Single_Loop_Ckts.ppt
When In Doubt → ReDraw
 From The Last Diagram
It Was Not Immediately
Obvious That This Was
a V-Divider Situation
• UnTangle/Redraw at Right
20
Vad 
VS  3V
20  15  25
or
20  15  25
20  15  25
VS 
Vad 
3V  9V
20
20
Engineering-43: Engineering Circuit Analysis
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Bruce Mayer, PE
[email protected] • ENGR-43_Lec-02-4_Single_Loop_Ckts.ppt

Example
2
b
 Find
VS 12V
• Vx, Vab
• P3Vx
VS
– The Power Absorbed
or Supplied By the
Dependent Source
Vab  12V  2V  0  Vab  10V
Engineering-43: Engineering Circuit Analysis
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-
 4V 
4k
1
a
+I

VX

3
• Passive Sign Conven.
1 12  4  3VX  VX  0  VX  2V
2 Vab  4  3VX  0  Vab  10V
Vab  VS  VX  0
+
3Vx
 Find DS Power
 Apply KVL
3

Vab
P( 3V X )  3V X I
• Ohm’s Law

I
4V
 1mA
4k
• Then Pwr ABSORBED
P(3VX )  3  2[V ]  1[mA]  6mW
Bruce Mayer, PE
[email protected] • ENGR-43_Lec-02-4_Single_Loop_Ckts.ppt
Example
 Find: VDA, VCD, I
20k
A
12V
9V
B
+ -
I
+
-
• Apply KVL & Ohm
2
E
-12  20k*I  9  30k*I  10k*I  0
1
3V
I
 0.05mA
60k
VDA  12 10k * I  0  VDA  11.5V
1
2
VCD  30k * I  30k  0.05mA  1.5V
21
30k
D
10k
• Ohm’s Law
Engineering-43: Engineering Circuit Analysis
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Bruce Mayer, PE
[email protected] • ENGR-43_Lec-02-4_Single_Loop_Ckts.ppt
WhiteBoard Work
 Let’s Work This Problem
8 k
120 mA
4 k
4 k
Io
Engineering-43: Engineering Circuit Analysis
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Bruce Mayer, PE
[email protected] • ENGR-43_Lec-02-4_Single_Loop_Ckts.ppt